JP3116985B2 - LSI - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION This invention, form a capacitance
Related to the LSI that has been formed .

[0002]

2. Description of the Related Art Normally, in manufacturing an LSI, a circuit
D, and a step of manufacturing a mask by reducing the circuit diagram and printing the pattern of the mask on a silicon wafer.

Conventionally, when forming capacitances having different capacities in such LSI technology, a method of forming a plurality of unit capacitances and connecting the unit capacitances in a number corresponding to the capacitances to form a composite capacitance is generally used. It is used regularly. For example, when forming a composite capacitance having a capacitance twice as large as the unit capacitance, a capacitance having an area obtained by connecting two unit capacitances is formed. With a quadruple capacitance, a capacitance having an area four times the unit capacitance is formed. Form.

[0004]

However, in the above-mentioned conventional method, the size of the formed capacitance differs depending on the capacitance. Therefore, when a large number of capacitances are to be arranged collectively, the capacitance itself is required. And the wiring layout becomes complicated.

In order to solve such a problem, when forming a large number of capacitances, a large number of unit capacitances are arranged as a two-dimensional matrix in a square arrangement, and a required number of these unit capacitances are connected to form a plurality of unit capacitances. A method for forming a composite capacitance has been proposed.

However, when forming the composite capacitance by the above method, if the unit capacitances of a certain area on the matrix are collectively connected and used as a single composite capacitance, the capacity of the unit capacitance is reduced to the area on the matrix. , The variation directly affects the accuracy of the composite capacitance, and the capacitance ratio of a plurality of composite capacitances formed by connecting the unit capacitances on the same matrix may include an error.

[0007]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems in the prior art. In an LSI in which a large number of unit capacitances arranged as a two-dimensional matrix are connected, the capacitance of the unit capacitance is reduced in the matrix. L can reduce the influence of the variation on the capacitance ratio of the composite capacitance even if there is variation due to the area of L.
The purpose is to provide SI .

[0008]

An LSI according to the present invention
In order to achieve the above object, the present invention is characterized in that unit capacitances in a close range in a matrix are allocated and used as components of different complex capacitances.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of an LSI according to the present invention will be described below.

[0010] Figure 1 is a circuit diagram of a capacitance on the LSI embodiment. In this example, 36 unit capacitances 1, 1,... Are formed as a 6 × 6 two-dimensional square matrix. The single planar shape of the unit capacitances 1, 1 ... is a chamfered square.

The wires 2, 2,... Are arranged in the column direction, which is the vertical direction in the figure, between both sides of the matrix and between the columns. The wiring at both ends is the same as the unit capacitance in every other row.
The wiring provided between the columns alternately connects six unit capacitances of the columns on both sides of the wiring.

In the connection indicated by A in the broken line, 18 unit capacitances are connected to the terminals a and b, respectively.
The capacitance ratio of the two formed composite capacitances is 1: 1
Becomes

If the wiring indicated by B in the broken line is used instead of A, twelve unit capacitances are connected to the terminals c, d, and e, respectively, and the capacitance ratio of the formed three composite capacitances is 1 : 1: 1.

FIG. 2 shows only the wiring connected to one terminal of the capacitance. The other wiring is connected in the same manner. However, depending on the application, for example, when one end of a plurality of composite capacitances is held at a common potential, the other wiring may be common to all unit capacitances.

In the example of FIG. 1, the unit capacitances are connected so that the capacitance ratio of the formed composite capacitance is 1: 1. However, for example, the connection can be made as 12:24, 9:27. Alternatively, there may be a unit capacitance that is not used by being connected as in 9:26.

As shown in FIG. 1, by using the unit capacitances in adjacent ranges in the matrix as components of different composite capacitances, even if the capacitances of the unit capacitances vary according to the area, the unit capacitances can be obtained. The influence of the dispersion can be reduced by dispersion.

FIG. 2 shows the capacitance on the LSI of the first embodiment. In this example, unit capacitances 1, 1,... Arranged as a 6 × 6 two-dimensional matrix are connected for each column in the vertical direction in the figure, and adjacent columns are configured as different composite capacitances, and 18 unit capacitances are respectively provided. Are connected to terminals a and b to form two composite capacitances.

FIG. 3 shows the capacitance on the LSI of Reference Example 2 . In this example, unit capacitances 1, 1,... Arranged as a 6 × 6 two-dimensional matrix are connected in a stepwise manner over a plurality of columns, and adjacent wirings are connected to different terminals a, b. Two complex capacitances each connecting 18 unit capacitances are formed.

In the above three embodiments, the unit capacitances are arranged as a 6 × 6 matrix, but the number of arrangements is not limited to this, and the number of arrangements is not limited to 4 × 10, 10 × 8.
The present invention can be similarly applied to any size matrix.

[0020]

As described above, according to the present invention, the unit capacitance within a close range in the matrix is
By distributing and using as components of different composite capacitances, even if there is a variation in unit capacitances due to areas, the influence can be reduced, and a composite capacitance having an accurate capacitance ratio can be formed. it can.

[Brief description of the drawings]

1 is a circuit diagram of a capacitance on the written that L SI to an embodiment of the present invention.

FIG. 2 is a circuit diagram of capacitance on an LSI according to Reference Example 1 ;

FIG. 3 is a circuit diagram of capacitance on an LSI according to Reference Example 2 ;

Continued on the front page (72) Inventor Makoto Yamamoto 3-5-18 Kitazawa, Setagaya-ku, Tokyo Takayama Building Co., Ltd. Examiner Takayamauchi Yoichi Oshima (56) References JP-A-58-103163 (JP, A) JP-A-7-86519 (JP, A) JP-A-7-74309 (JP, A) JP-A-5-55459 (JP, A) JP-A-56-112750 (JP, A) JP-A-60-60751 (JP , A) Japanese Utility Model Application 56-119670 (JP, U) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 27/04 H01L 21/822 H01L 21/82

Claims (1)

(57) [Claims] 1. A unit key formed as a two-dimensional matrix.
Line between the capacitance and the row or column of the unit capacitance.
And at least the unit capacitance of the row or column on both sides
An LSI comprising: wiring for alternately connecting one terminal .