JP3111796B2 - How to generate sequence data - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for generating sequence data which enables input at the time of creating a sequence program without restriction and at the same time increases processing speed.

[0002]

2. Description of the Related Art At present, the operation of most production machines used in a factory is controlled by a programmable controller. Since this programmable controller is a kind of computer, it is necessary to input a program to operate it. The input of this program is performed while drawing a ladder sequence using an input device.

For example, when a ladder program as shown in FIG. 8 is input, the input may be performed by an input device so as to obtain a ladder diagram as shown in FIG. Specifically, the A contact of R1 is inputted, and then the A contact of R2 is inputted in series with this contact.
Both A contacts R4, R5 are arranged in parallel with both A contacts of R2.
The circuit connected in series is input. A circuit as shown in the figure is formed while sequentially performing such input.

The ladder diagram input in this way is translated into a language such as a machine language, which can be interpreted by a programmable controller, and stored in a storage device. The procedure is as follows.

First, contacts and nodes are interpreted from the upper left to the upper right of the sequence block. In the ladder diagram shown in FIG. 8, the interpretation is performed sequentially from the A contact of R1 to the A contact of R2, and when the node 3 is reached, the circuit in the lower stage is interpreted. That is, the A contact of R4 is sequentially interpreted as the A contact of R5. When the signal reaches the node 6, the circuit in the lower stage is interpreted in the same manner as described above. Next, the circuit of the A contact of R8 and the B contact of R9 connected in series to this is interpreted.
The series circuit of 12 is interpreted, and finally the circuit of R13 is interpreted to complete all the interpretations of the circuit shown in FIG.

As described above, according to the conventional interpretation processing method, the interpretation of one serial circuit is continuously performed until the node hits a certain node. Is performed in a similar manner, and after the interpretation of all the parallel circuits is completed, the interpretation of the series circuit until the next node is hit is performed.

For this reason, as shown in, for example, FIG. 9A, a conventional ladder circuit can be translated as long as it does not cross a certain node. In the case of a ladder circuit that straddles nodes as shown in FIG. 9B, translation cannot be performed. In the case of a ladder circuit as shown in FIG. 10, the output result with respect to the input must be the same, whereas in the conventional two-register system, translation is performed even if only the vertical relationship between the contact and the output is different. In such a case, the result will be different. In order to solve such a problem, an input editor is used to avoid occurrence of erroneous input of the ladder program. Then, the sequence program in which the correct input is performed in this way is translated into a machine language according to a predetermined translation rule,
It will be stored in the storage device.

[0008]

However, even if such an input editor is used, it is not always possible to completely avoid erroneous input in a complicated ladder diagram, and no erroneous input is detected by any chance. If the translation is performed as it is, the operation state as originally planned cannot be realized, and there is a problem that it takes much time to resolve the bug.

When the input program is translated into a machine language and stored, in a conventional method of generating sequence data, when a ladder circuit as shown in FIG. Such logical expression expansion is performed, and translation is performed as if a circuit as shown in FIG. 14 is input, so that a part that must be interpreted redundantly occurs. Since it is necessary to process each time, there is a problem that the amount of data to be interpreted increases, and the processing speed decreases accordingly.

[0010]

[Table 1]

The present invention has been made to solve such a conventional problem. A first object of the present invention is to prepare a parts table used in an input ladder diagram prior to translation. It is another object of the present invention to provide a method of generating sequence data in which translation is performed based on the parts table so that the pattern of the input ladder diagram is not limited and the occurrence of a bug can be completely eliminated.

A second object of the present invention is to provide a method of generating sequence data in which input data is stored as a ladder diagram similar to the ladder diagram at the time of input.

[0013]

According to a first configuration of the present invention for achieving the above object, a ladder diagram is developed based on an input ladder program, and connection lines of respective components of the ladder diagram or A number is assigned to each connection point between the connection lines, and in order of the numbers of the connection lines or connection points on the input side of each component, a parts table in which the components are arranged is created for each type of the component, Based on the bill of materials,
It is characterized in that a program for sequence control is created.

In the second configuration, a ladder diagram is developed based on an input ladder program, and a number is assigned to a connection line of each component of the ladder diagram or a connection point between the connection lines. In the order of the number of connection lines or connection points on the input side of the component, a component table in which the components are arranged is created for each type of component, and among the component tables created for each type of component, each The input and output numbers assigned to components are compared with those of other components to determine whether they can be sorted into the same number.If they can be sorted into the same number, they are assigned the same number. It is characterized by performing a process of organizing and creating a program for sequence control based on the processing result.

In a third configuration, a ladder diagram is developed based on an input ladder program, and connection lines of each component of the ladder diagram or connection points between the connection lines are numbered. In the order of the number of connection lines or connection points on the input side of the component, a component table in which the components are arranged is created for each type of component, and among the component tables created for each type of component, input A number that appears multiple times on the side is assigned as a node number, a bit number is assigned to the node number, the node number is sorted, a logical expression is generated for the assigned bit number, and Assigns block numbers to the generated logical expressions, finds dependencies between the assigned block numbers, and performs sequence control based on the dependencies. It is characterized in that to create a program.

In a fourth configuration, a ladder diagram is developed based on an input ladder program, a number is given to a connection line of each component of the ladder diagram or a connection point between the connection lines, and the respective ladder diagram is numbered. In the order of the number of connection lines or connection points on the input side and output side of the component, a component table in which the components are arranged is created for each type of the component, and a component table created for each type of the component is created. Of these, a number that appears multiple times on the input side is assigned as a node number, a bit number is assigned to the node number, the node number is sorted, and a logical expression is generated for the assigned bit number. A block number is assigned to a logical expression generated for each bit number, a dependency between the assigned block numbers is obtained, and blocks are determined based on the dependency. And rearranging the logical expressions generated for each of the bit numbers based on the rearranged block numbers, and converting the logical expression for the connection point on the output side into a logical expression for each of the bit numbers. A program for sequence control is created by the combination.

[0017]

The present invention thus constructed operates as follows.

In the first configuration, first, a ladder diagram is developed based on an input ladder program, and numbers are assigned to connection lines of each component of the ladder diagram or connection points between the connection lines. In addition, since a parts table in which the components are arranged in the order of the numbers of the connection lines or connection points on the input side of each component is created for each type of the components, the input ladder program is Since the sequence code is generated only by the connection relation, there is no restriction on the input pattern of the ladder circuit, and accordingly, the occurrence of the bug is completely eliminated.

More specifically, all of the contacts of the ladder circuit and the joints of the contacts are numbered from upper left to lower right. The names of all the contacts and coils constituting the sequence circuit are listed, and the numbers on the left side of the contacts are input numbers, and the numbers on the right side are output numbers. These input / output numbers are simplified as much as possible using the relationship between the parts groups called wires to create a parts table.

As described above, the sequence circuit of any pattern can be converted into data of only parts by performing the above-described processing.

In the second configuration, in addition to the first configuration, in the parts table created for each type of component, the input and output numbers assigned to each component are changed to other components. The part numbers are compared with those numbers to determine whether they can be arranged into the same number, and if they can be arranged into the same number, processing is performed to arrange them into the same number, and sequence control based on the processing result is performed. To make a program for it.

More specifically, looking at the input number section of the completed parts table, the numbers appearing a plurality of times are listed. In other words, this means that there are a plurality of contacts in the column with the number listed. The output values of these contacts are the input values of the contacts and AND data of the contacts. Therefore, in order to obtain the output values of all the contacts, the values on the input side must be obtained each time. However, the value on the input side is the same regardless of which row is located. Therefore, it is necessary to register a block that outputs an input value.

In the third configuration, in addition to the first configuration, a number that appears a plurality of times on the input side in a parts table created for each type of component is assigned as a node number. A bit number is assigned to the node number, the node number is rearranged, a logical expression is generated for the allocated bit number, and a block number is allocated to the logical expression generated for each of the bit numbers. A dependency relationship between the block numbers is obtained, and a program for sequence control is created based on the dependency relationship.

This is a means for registering a block with a specific number and making it easy to understand and to see when a block whose output number is listed is obtained.

In the fourth configuration, in addition to the third configuration, the block numbers are rearranged based on the dependency, and the logical numbers generated for each of the bit numbers are rearranged based on the rearranged block numbers. A program for sequence control is created by combining expressions and combining a logical expression for the connection point on the output side with a logical expression combined for each of the bit numbers.

Therefore, the generated program can be made to match the input ladder diagram, and unnecessary processing at the time of execution can be eliminated, so that the execution speed can be improved. Become like

Specifically, a block appearing (processed) a plurality of times can be registered with a specific bit number. In addition, when performing processing for obtaining the output value of the block, a logical expression having a data configuration in which the bit number assigned to the block is called and the output value of the block is given can be obtained. Dependencies of blocks in logical expressions are also easy to understand and understand.

[0028]

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a schematic configuration of an apparatus for implementing a method of generating sequence data according to the present invention.
The sequence editing machine 10 in the figure is designed so that an operator can input a ladder diagram when creating a sequence program. Further, the sequence code generator 12 is configured to execute the generation method of the present invention and output an intermediate code with little dependence on the CPU. The sequence executor 14 converts the intermediate code from the sequence code generator 12 into a CPU-dependent machine language and executes a sequence process. The input / output unit 16 outputs the execution result of the sequence code execution unit 14 to the outside.

FIG. 2 is a diagram showing a schematic procedure of the generation method of the present invention.

The general procedure of the sequence data generating method of the present invention will be described as follows.

First, in the first stage, the sequence editing machine 10
A process is performed to number all of the parts corresponding to the nodes in the ladder program input by the above. This is because it is necessary to create a parts table performed in the next process.

Next, in the second stage, a parts table is created by arranging all parts constituting the input ladder program in numerical order based on the numbers assigned to the nodes. This parts list includes components such as coils of the relay, contacts of the relay, and wires connecting the contacts.

In the third stage, a process for organizing the created parts table based on the node numbers is performed. This process clarifies the connection relationship between the components.

In the fourth stage, a process of generating a sequence code based on the organized parts table is performed, and in the fifth stage, a process of rearranging the generated sequence code is performed. After the processing of the fifth stage is performed, the CPU
Will be output.

The processing from the first stage to the fourth stage is as follows.
Processed by the sequence code generator 12.

Finally, a process for generating machine language dedicated to various execution units is performed. This processing is performed by the sequence executor 1
4 and output to an external device via the input / output unit 16.

Next, the processing in each of the above steps will be described in detail with reference to the drawings.

First, in the first stage, when the operator inputs a ladder program as shown in FIG. 3 using the sequence editor 10, the ladder program is sent to the sequence code generator 12, as shown in FIG. Parts will be numbered. That is, numbers are assigned to all nodes and vertices existing in this ladder program. The rules for assigning this number are as follows.

1. The numbering order is from upper left to lower right.

2. A place where parts such as contacts and coils are in contact with each other is called a node.

3. The broken portion of the line is called a vertex.

4. All nodes in contact with the baseline are numbered zero.

When the nodes and the like of the ladder program in FIG. 3 are numbered according to the above rules, they are as shown in FIG.

After the numbers are assigned as described above, the second
Step processing is performed, and a parts list as shown in FIG. 5 is created.

For example, as for R1 of the A contact, which is a component, the input NO is described as 0 and the output NO is described as 1. Also, W
Reference numeral 1 denotes a wire simply connecting nodes, which is also registered as a component because there are input and output sides. As for this W1, the input NO is described as 5 and the output NO is described as 11. In this way, a parts table as shown in FIG. 5 is created in consideration of the input numbers and output numbers assigned to all the parts existing in the ladder program input by the sequence editor 10.

Since the parts table created as shown in FIG. 5 is not for each type of parts or for each input number, in the third stage, a process for organizing the parts for each part is performed. Also, the numbers assigned to the parts are arranged at the same time.

In performing the processing of the third stage, rules for organizing are set as follows.

1. The node numbers at both ends of the wire are assumed to be equivalent.

2. The node numbers at both ends of the contact cannot be interchanged.

3. Sort the node numbers in ascending order.

4. All the node numbers of the L type and the inverted L type (┘) vertex are deleted.

5. The termination condition is when all the wires have been erased.

Therefore, this third step is repeated until all the wires can be erased.

First, the parts table shown in FIG. 5 is divided for each type, and a parts table for each type as shown in FIG. 6 is created. Next, the parts list is arranged according to the rules. That is, since the node numbers of the wires are equivalent, the wire W1
Can be replaced with the input NO5 and the output NO11 of the wire W2.
The same applies to O13. In consideration of this relationship, FIG.
When the parts table is arranged, the input No. of the wire W9 is equivalent to the input No. 5 for the R5 of the A contact, so the input No. is changed from 5 to 1. R7 input NO of A contact
8 changes the NO from 8 to 6 with reference to the wire W6. In this manner, a process of repeatedly changing the input NO and the output NO of the relay contact with reference to the input / output NO of the wire until the input NO and the output NO cannot be replaced is performed. As a result of this process,
The parts list of each relay contact, output terminal, and wire finally obtained is as shown in FIG. The parts table created in this way is used as a basis for creating a sequence code in the next stage.

In the process of the fourth stage, a sequence code is created based on the parts table created by the processes up to the third stage. The following rules are also set in this processing.

1. The AND value of the contact and the input node is output.

2. When the input node number becomes 0, PUSH is performed.

3. The number of times of PUSH is counted.

4. When all the circuits have been pushed, the count POP_OR is repeated.

5. After the end of POP_OR, a predetermined coil,
Output to function.

Based on the above rules, the processing at this stage is performed as follows, for example.

First, the output terminal number O1 will be described. Since the output terminal O1 receives 4 as an input, a component whose output NO is 4 is searched. If this part can be found, write the number of the node as the input of the part and write a predetermined code in the line below it. Next, the node number is searched from the output item of the table, and the node number written in the input item of the corresponding contact item (part) is written. The node number and the contact are ANDed. This processing has two cases, that is, a case where there is only one output term and a case where there are a plurality of output terms.

For example, when there is only one output term, only the node number / AND is described, and the processing is performed as follows.

The conversion for 4 OUT 01 is 3 AND R 4 OUT 01.

On the other hand, when there are a plurality of output terms, PUSH is added after the node number / AND, and POP_OR is written by the number of PUSH after describing all output effects. For example, the conversion of 3 AND R4 OUT 01 is 2 AND R3 PUSH 6 AND R6 PUSH 6 AND R7 PUSH POP_OR POP_OR POP_OR AND R4 OUT O1.

Further, when the input node number is 0,
The process ends when all node numbers have disappeared as LD components.

After such processing is performed, expansion into a logical expression is performed as follows.

[0068]

[Table 2]

Then, the fifth stage processing is performed. The first rule is PUSH / POP
_OR is omitted. The second rule is that PUSH /
LD / POP_OR is converted to OR. Table 2 is obtained by converting the logical expression of Table 1 based on this rule.

[0070]

[Table 3]

The intermediate language of the logical expression arranged as described above is translated into a machine language. This conversion is performed based on the conversion table, and this conversion differs depending on the type of the target CPU. In the following example, the CP of 68020
The case where U is used is shown. This 68020 CPU
In the address mode, bit access is performed using the memory indirect mode with an index.

In performing this processing, the following contact table size is set.

[0073]

[Table 4]

Also, an initial base address, an offset value from the base address, and a register number are set as follows.

[0075]

[Table 5]

[0076]

[Table 6]

The machine language converted as described above is output from the input / output unit 4 to the outside. In the above embodiment, the above-described processing is performed by the sequence code generator 12 and the sequence executor 14.
It may be performed only by the user. In this case,
A machine language highly dependent on the CPU is output to the sequence executor 14. As described above, in the present invention, the sequential conversion of the input sequence ladder diagram is not performed, and all the contacts related to the output are once washed out, and the sequence code is logically generated again. There is no restriction on the format, and there is no need to check the input pattern using a sequence editor or the like. Further, since the sequence code is logically generated only by the connection relation of the contacts, the difference in the execution result due to the difference in the position on the screen is eliminated.

Next, a description will be given of a method of generating sequence data capable of increasing the execution speed.

The apparatus used in this embodiment is exactly the same as the apparatus shown in FIG. 1 exemplified in the above embodiment.
In the sequence data control method according to the present embodiment, the processing up to the third stage of the flowchart shown in FIG. 2 is exactly the same as that in the above-described embodiment. Detailed description is omitted. That is, the same processing as that shown in FIGS. 4 to 7 is performed on the ladder diagram shown in FIG.

Based on the parts table obtained as shown in FIG. 7, it is checked whether there is a node number that appears multiple times as the input number of each part, and the node numbers that appear multiple times are extracted and extracted. A process of assigning a bit number to the node number is performed. Specifically, as shown in FIG. 11, first, since there are a plurality of parts to which 1 is given as the input number, this input number 1 is extracted, and then a plurality of input numbers 3 also appear. Therefore, a process of extracting the number 3 is performed, and the extracted numbers are arranged in order.
1, 3, 6, and 10. Then, the bit numbers are assigned in the order of arrangement such as 0, 1, 2, and 3, respectively.
Performing this process means that different node numbers assigned to the same line are unified as the same bit number, as shown in FIG. That is, the contact points R1, R
2, R5, R9, R10, and R11 each have bit 0
Means that they are connected to the numbered line. When this process is completed, next, a process of generating a logical expression having each bit number as a final output is performed.

The generation of this logical expression is performed according to the following rules.

1. The final output of each block is STEB #
(# Is a bit number).

2. Outputs the value obtained by ANDing the contact (part) and the input number.

3. If there are a plurality of output nodes that match the input node, a logical expression is generated for each of them and joined using PUSH. POP_OR is repeated by the number of times of last PUSH.

4. The LD is used only when the input node is 0.

5. When a node number to which a bit number is assigned appears, it is replaced with GETB # (# is a bit number). 6. The logical expression generation ends until there is no more node number.

Here, SETB means putting the contents of Acc into the corresponding bit number of the bit score table, and GETB means loading the corresponding bit contents of the bit score table into Acc. .

According to the above rules, a logical expression is generated as follows. The procedure for generating the logical expression will be described based on the circuit of FIG.

First, the generation procedure for bit number 0 (node number 1) is performed as follows. Since node number 1 is the final output, set 1 and then SETB 0
Put. Then, the component outputting the node number 1 is searched from the component list shown in FIG. 11, and the logical expression generated according to the above rules 3 and 4 is as follows.

LD R1 PUSH LD R9 PUSH POP_OR POP_OR SETB 0 Similarly, in the case of bit number 1 (node number 3), the following logical expression is developed according to the above rule.

[0091]

[Table 7]

In this way, logical expressions are developed for all the bit numbers, that is, for each bit from bit 0 to bit 3, and the name after the logical expression is developed is referred to as a block. Specifically, logical expression expansion as shown in the following table is performed.

[0093]

[Table 8]

After such a block is generated, a process for obtaining the dependency between the blocks is performed. That is, for each block, the following table is created in which the GETB # existing in each block is associated.

Block GETB # 0 None 1 0,2 2 0 3 0,1 Next, a process of rearranging blocks based on the dependency obtained in the above process is performed. This sorting order is performed based on the following rules.

1. Put a block that does not depend on any bit numbers.

2. Next, a block that depends on only one block is placed.

3. Put blocks that depend on the blocks you put in order.

When the above blocks are rearranged based on this rule, the following table is obtained.

Block GETB # 0 None 2 0 3 0,2 1 0,1 Next, according to the blocks rearranged as described above, the above-described logical expressions divided for each block are arranged in order. I do. This processing is as follows.

[0101]

[Table 9]

Next, a logical expression is developed for the output terminal. In this case, OUT instead of SETB #
# Is set. Therefore, the logical expression expansion for each output is as follows.

[0103]

[Table 10]

Finally, the logical formula divided for each block is combined with the logical formula for the output terminal to obtain the following logical formula.

[0105]

[Table 11]

Since the sequence data generated through the above-described processing is stored as the data corresponding to the input ladder sequence diagram, if the stored sequence program is executed, it is useless. No processing is performed. Therefore, the capacity of the storage device for storing this program can be minimized, and the processing speed can be improved.

This is because the data amount of Table 1 showing the logical expression expansion of the program stored with respect to the ladder diagram of FIG. 12 and Table 11 when the same ladder diagram is logically expanded by using the present invention are shown in FIG. It is clear from comparison.

[0108]

As described above, according to the present invention, the following effects are produced.

In the first configuration, a parts table is created based on the input sequence program, and a program for sequence control is created based on the parts table. Input can be performed without restriction. Further, since a sequence circuit of any pattern can be converted, a sequence circuit can be assembled without any restrictions.

In the second configuration, the positions of blocks appearing a plurality of times can be clarified, and the circuit configuration can be understood.

In the third configuration, by registering with a specific number, it is possible to clarify how and where blocks appearing a plurality of times are located, and the dependency between the blocks is extremely high. It becomes easy to understand.

Since the fourth configuration has a very simple data configuration, it is possible to predict what kind of sequence circuit is from the data.
When restoration is actually performed on the basis of this data, the data can be faithfully converted to the sequence circuit that was initially written. In addition, since the amount of data is small, transmission / reception of data at the time of communication becomes very fast, and when saving as a file, the capacity can be reduced. Also, the sequence data that matches the input ladder diagram is stored, and the data processing also adopts the form of calling the bit number and giving the output value of the block.
The processing can be speeded up.

[Brief description of the drawings]

FIG. 1 is a diagram showing a schematic configuration of an apparatus for executing a sequence data generation method according to the present invention.

FIG. 2 is a diagram showing a schematic procedure of a generation method of the present invention.

FIG. 3 is a diagram illustrating an example of a ladder diagram developed based on an input ladder program.

FIG. 4 is a diagram showing an example of a number assigned to a node in the ladder diagram of FIG. 3;

FIG. 5 is a diagram showing a parts list obtained in the course of carrying out the method of the present invention.

FIG. 6 is a diagram showing a parts list obtained in the course of carrying out the method of the present invention.

FIG. 7 is a diagram showing a parts list obtained in the course of carrying out the method of the present invention.

FIG. 8 is a diagram provided for explanation of a conventional conversion method.

FIG. 9 is a diagram provided for explanation of a conventional conversion method.

FIG. 10 is a diagram provided for explanation of a conventional conversion method.

FIG. 11 is a diagram showing a parts list obtained in the course of implementing the method of the present invention and a relationship between node numbers and bit numbers created from the parts table.

FIG. 12 is a diagram provided for describing processing contents of a generation method according to the present invention.

FIG. 13 is a diagram provided for explanation of a conventional conversion method.

FIG. 14 is a diagram provided for explanation of a conventional conversion method.

[Explanation of symbols]

 10: Sequence editor, 12: Sequence code generator, 14: Sequence executor, 16: Input / output unit

Continuation of front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G05B 19/04-19/05

Claims (4)

(57) [Claims] 1. A ladder diagram is developed based on an input ladder program, a connection line of each component of the ladder diagram or a connection point between the connection lines is numbered, and an input of each component is input. Creates a parts table in which the component parts are arranged for each type of the component parts in the order of the number of connection lines or connection points on the side, and generates a sequence data for creating a program for sequence control based on the part list. Method. 2. Ladder diagram is developed based on the input ladder program, connection numbers of the respective components of the ladder diagram or connection points of the respective connection lines are respectively numbered, and input of the respective components is performed. A component list in which the components are arranged is created for each type of component in the order of the number of connection lines or connection points on the side, and a component list is created for each type of component. The input and output numbers are compared with those of other components to determine whether they can be sorted into the same number, and if they can be sorted into the same number, a process to sort them into the same number is performed. And generating a sequence control program based on the processing result. 3. A ladder diagram is developed based on the input ladder program, connection numbers of the respective components of the ladder diagram or connection points of the respective connection lines are numbered, and input of the respective components is performed. A component table in which the component parts are arranged in the order of the number of connection lines or connection points on the side is created for each type of the component part. In addition to assigning the appearing number as a node number, assigning a bit number to the node number and rearranging the node number, a logical expression is generated for the assigned bit number, and a logical expression is generated for each bit number. A block number is assigned to a logical expression, a dependency between the assigned block numbers is obtained, and a program for sequence control is determined based on the dependency. The method of generating the sequence data to create. 4. A ladder diagram is developed based on the input ladder program, connection numbers of the respective components of the ladder diagram or connection points between the connection lines are numbered, and input of the respective components is performed. A component table in which the components are arranged is created for each type of component in the order of the number of connection lines or connection points on the output side and the output side. Is assigned as a node number, a bit number is assigned to the node number, the node number is arranged, a logical expression is generated for the assigned bit number, and Assign block numbers to the generated logical expressions, find dependencies between the assigned block numbers, and arrange the block numbers based on the dependencies. For example,
A sequence is performed by combining the logical expressions generated for each of the bit numbers based on the rearranged block numbers, and combining the logical expression for the connection point on the output side with the logical expression for each of the bit numbers. A method of generating sequence data for creating a control program.