JP3108024B2 - Method of manufacturing build-up wiring board - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a build-up wiring board in which circuit patterns are stacked in a plurality of layers.

[0002]

2. Description of the Related Art The build-up method has an advantage that a printed wiring board having a multilayer structure connected through via holes can be manufactured, and wiring density can be significantly increased. The specific manufacturing procedure is as follows.

First, a core substrate 1 having a predetermined circuit pattern 2 is manufactured by, for example, processing a double-sided copper-clad laminate by an etching method (see FIG. 11A). Next, a photosensitive insulating resin layer 3 is applied so as to cover the circuit pattern 2 of the core substrate 1 (FIG. 2B), and via holes 4 are formed in the insulating resin layer 3 at predetermined positions by a photo process. (FIG. 2C). Thereafter, chemical plating and electrolytic plating are performed to form a plating layer 5 on the entire surface (FIG. (D)).
This is etched to form a second layer circuit pattern. By repeating the formation and etching of the insulating resin layer 3 and the plating layer 5 described above, a multilayer wiring board internally connected by the plating layer 5 in the via hole 4 can be manufactured.

[0004]

However, in the conventional manufacturing method, a wiring board having a circuit pattern 2 formed by etching a copper-clad laminate is used as the core board 1, so that the surface of the core board 1 is often large. Unevenness occurs. For this reason, if the thickness of the insulating resin layer 3 to be printed here is too small, the surface of the insulating resin layer 3 becomes uneven, which causes inconvenience in the subsequent steps, so that the insulating resin layer 3 has a considerable thickness. Must be applied. For example, when the thickness of the circuit pattern is 35 μm, conventionally, it is necessary to apply the insulating resin layer 3 to a thickness of about 100 μm, and even the insulating resin layer 3 on the circuit pattern 3 has a thickness of 60 to 80 μm. Had become.

However, it has been found that the following problems occur when the thickness of the insulating resin layer 3 is large. After the application of the insulating resin layer 3, as shown in FIG. 12 (A), the positive film 6 is set and exposed to ultraviolet light, and the exposed portion is developed to dissolve and remove the unexposed portion of the ultraviolet light to form the via hole 4. I do. At this time, when the thickness of the insulating resin layer 3 is large, the shade of the black portion 6a of the positive film 6 becomes deeper toward the deeper part of the insulating resin layer 3, as shown by the broken line in FIG. The shape of the via hole 4 becomes an inverted mortar shape as shown in FIG.

In such a shape, the via hole 4
Since the impurities in the inside cannot be completely washed with water or the periphery of the plating solution easily deteriorates, there arises a problem that the next plating layer 5 formed thereon tends to be incomplete. In addition, since an edge having a sharp cross section is likely to occur at the entrance of the via hole 4, the plating layer 5
However, there is a problem that the material may be broken as shown in FIG.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a method of manufacturing a highly reliable build-up wiring board which can optimize a shape of a via hole. .

[0008]

[0009]

[0010]

[0011]

[0012]

[0013]

Means for Solving the Problems and Functions / Effects <Invention of Claim 1> A method for manufacturing a build-up board according to claim 1 is a method for manufacturing a conductive layer of a wiring board having a conductive layer formed on a surface of a base material. A lower-layer circuit pattern forming step of forming an lower-layer circuit pattern by removing unnecessary portions, and a conductor embedding step of embedding a lower-layer circuit pattern by adhering a photocurable resin material to the surface of the wiring board thereafter; A resin curing step of irradiating the photocurable resin with light in a state where the wiring board coated with the resin material is immersed in the liquid, and curing the resin material, and polishing the resin material after the curing to expose the lower circuit pattern. A polishing step of forming a core substrate having a flat surface by doing
A resin laminating step of forming an insulating resin layer covering the lower circuit pattern of the core substrate, a via hole forming step of forming a via hole penetrating to the lower circuit pattern in the insulating resin layer, and thereafter, a surface of the insulating resin layer An upper layer circuit pattern forming step of forming an upper layer circuit pattern connected to the lower layer circuit pattern through the via hole by performing a plating process, and using a photocurable resin as a resin material for embedding the lower layer circuit pattern, It is characterized in that the resin material is irradiated with light in a state where the wiring substrate coated with the material is immersed in the liquid.

In the above manufacturing method, when manufacturing the core substrate, the lower circuit pattern is first formed by removing an unnecessary portion of the conductive layer, so that a general etching method can be employed and high productivity can be obtained. Further, the formed lower layer circuit pattern is embedded once with a resin material in a conductor embedding step, and after the resin is cured, is polished until the circuit pattern is exposed in a polishing step, so that the space between the circuit patterns is filled with the cured resin. As a result, a core substrate having a flat surface with the circuit pattern and the cured resin at the same height is obtained. A core substrate with a flat surface like this
Conventionally, it has been thought that it can only be manufactured by an expensive additive method. However, according to the present invention, it can be manufactured by a subtractive method using etching or the like, so that it is possible to greatly reduce the manufacturing cost. The above-mentioned core substrate is subjected to a resin laminating step of forming an insulating resin layer covering the lower circuit pattern. However, since the surface of the core substrate is flat, the thickness of the insulating resin layer applied thereon is reduced. Even if it is thin, its surface can be made flat. Therefore, when a via hole is formed in the insulating resin layer by a photo process, the via hole does not become inverted and mortar-shaped, and an effect of preventing plating defects and breakage of the plated layer can be obtained. Can be Further, since the photocurable resin is irradiated with light while being immersed in the liquid, the fluctuation of the resin temperature is suppressed by the heat sink function of the liquid in contact with the photocurable resin, and an excessive temperature rise is eliminated. As a result, a situation in which the curing reaction of the resin material is accelerated by the temperature rise and the crosslink density becomes higher than necessary is prevented, and the resin material can be easily polished while keeping the resin material at an appropriate hardness. .

[0015] Also, by immersing in the liquid in the exposure tank,
Apply pressure to fat from liquid or set resin to appropriate temperature
Or screen printing, for example.
Therefore, even if fine bubbles are contained in the resin layer,
These can be excluded from the resin layer. As a result,
Since voids can be prevented from forming in the
It is possible to improve the mechanical characteristics.

<Invention of Claim 2> According to the invention of claim 2, in the invention of claim 1, the photocurable resin material for embedding the lower layer circuit pattern is mixed with hollow fine powder made of glass. It has features.

According to the present invention, in addition to the function and effect of the first aspect, when polishing the cured resin in the polishing step, the glass hollow spheres are easily broken, so that the resin material is easily polished, The resin can be polished without damaging the lower circuit pattern. Moreover, since the hollow sphere is made of glass, it has excellent heat resistance, and since it is hollow, it has a structure excellent in electric characteristics and high frequency characteristics.

[0018]

[0019]

[0020]

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to FIGS.

In this embodiment, a copper-clad laminate is used as the wiring board 10 in which a copper foil 12 as a conductive layer is adhered to both surfaces of, for example, a glass epoxy board 11 as a base material (FIG. 1 ( A)). The following steps are sequentially performed on the wiring board 10.

<Lower Circuit Pattern Forming Step> First, a through hole 13 is formed in a required portion of the wiring board 10 using a well-known drill (not shown) (see FIG. 1B).

Next, the wiring board 10 is immersed in a chemical plating solution to form a copper chemical plating layer 14 over the entire area including the inner peripheral surface of the through hole 13 (see FIG. 2A). Since the chemical plating layer 14 is continuous with the copper foil 12, a copper electrolytic plating layer 15 is formed thereon using this as a base electrode (see FIG. 1B). Thus, the in-hole conductor layer 16 is formed on the inner peripheral surface of the through hole 13.

Thereafter, an unnecessary portion of the conductive layer is removed to form a lower circuit pattern. For this, a well-known photo etching method can be adopted. Specifically, for example, first, a photosensitive etching resist 17 is formed on the wiring substrate 10.
Is printed, and after drying, the circuit pattern film is overlaid and exposed. When this is developed, the wiring substrate 10 is obtained in which the cured etching resist 17 is superimposed on a portion to be left as a circuit pattern (see FIG. 3A). Then, the wiring board 10 is immersed in an etching solution to dissolve and remove the electrolytic plating layer 15, the chemical plating layer 14, and the copper foil 12 (see FIG. 1B). Then, as shown in FIG. 3C, if the etching resist 17 is removed, a required lower circuit pattern 18 is completed.

<Conductor Embedding Step> Next, the wiring board 10
A resin material is adhered to the surface of the lower circuit pattern 1
A conductor embedding step of embedding 8 is performed. Here, as a resin material, a solvent-free epoxy-based UV-curable resist ink is used, and a glass balloon having a diameter of 1 to 50 μm, which is a hollow fine powder made of glass, is mixed at a mixing ratio of 10 to 50% by weight. I have. This can be applied by a normal screen printing method.

First, a resist ink 19 containing a glass balloon 19a is printed from one side of the wiring board 10, and FIG.
The lower circuit pattern 18 is buried with the resist ink 19 as shown in FIG. In this case, the resist ink 1 is also provided in the through hole 13 of the wiring board 10.
9 penetrates and the through hole 13 is filled. And
After exposing and curing this with an exposure device described below,
A resist ink 19 containing a glass balloon 19a is also printed on the back side, and the lower circuit patterns 18 on both front and back sides are embedded with the resist ink 19 as shown in FIG.
It is exposed and cured again.

The exposure apparatus has the structure shown in FIGS. 5 and 6. That is, in the figure, reference numeral 20 denotes an exposure tank whose upper surface is open, in which water is stored. This exposure tank 2
Exposure windows 22 are respectively formed in a pair of side walls 21 facing each other, and a transparent plate 23 is fitted therein. An exposure light source 2 composed of an ultraviolet lamp is provided outside the transparent plate 23.
4 are arranged so that ultraviolet rays can be irradiated into the exposure tank 20 through both the exposure windows 22.

As shown in FIG. 6, the exposure tank 20 is formed thin at the portion where the exposure window 22 is formed.
The distance between the transparent plates 23 is set to about 20 cm. A transfer device (not shown) is provided above the exposure tank 20. The wiring board 10 is immersed in water on the right side of the exposure tank 20, and is transferred to the left through the space between the exposure windows 22. Then, it can be pulled out of the water on the left side of the exposure tank 20.

Further, a circulation pipe 27 having a circulation pump 25 and a heat exchanger 26 is connected to the exposure tank 20, and the water in the exposure tank 20 is circulated through the heat exchanger 26 by operating the circulation pump 25. be able to. And
In the heat exchanger 26, the refrigerant cooled by a cooling device (not shown) and the water in the exposure tank 20 exchange heat, so that the water temperature in the exposure tank 20 is set to, for example, 10 ° C.
The temperature is maintained within a constant temperature range of ２０20 ° C.

The wiring board 10 to which the resist ink 19 has been adhered is transported above the exposure tank 20 by a transport device.
First, it is immersed in water on the right side of the exposure tank 20. Since the resist ink 19 is not soluble in water, there is no particular chemical change even when immersed in water, but the temperature of the ink 19 is almost equal to the water temperature. Further, when the wiring board 10 is immersed in water, the water pressure acts evenly on the ink 19, so that fine bubbles inevitably mixed during the screen printing of the resist ink 19 tend to be pushed out. Become.

Then, the wiring substrate 10 is transported in the water in the exposure tank 20 and moves between the exposure windows 22 of the exposure tank 20,
At this time, the ultraviolet rays from the exposure light source 24
9 is irradiated to start its curing reaction. The irradiation time of the ultraviolet light is a time for securing the amount of ultraviolet light necessary for curing the resist ink 19, and is generally a short time of about 1 minute to 1 minute and 30 seconds. However, during the irradiation, the temperature of the resist ink 19 tends to increase due to the large radiant energy from the exposure light source 24. In this embodiment, however, the resist ink 19 is immersed in low-temperature water, and furthermore, has a wide area with water. Since the contact is made by the area, the temperature rise of the resist ink 19 is surely suppressed by the heat sink function of water, and the temperature of the resist ink 19 is kept within a fixed range of 10 ° C. to 20 ° C. which is the set water temperature.

Therefore, bubbles are not generated inside the resist ink 19 due to a rapid rise in temperature, and voids can be reliably prevented from remaining inside the cured resin layer. The ability to prevent voids from remaining as described above means that various properties of the cured resist 19, such as heat resistance, moisture resistance, and insulation properties, can be sufficiently improved, and a high-quality resist 19 can be obtained. Become.

Further, since the curing reaction of the ink 19 is performed at a constant temperature, the crosslinking density thereof can be kept within the planned value. Therefore, the resist 19 does not have an excessive hardness due to an excessively high crosslinking density. Further, especially in the exposure apparatus of the present embodiment, the exposure light source 24 is
Light source 2
The insulation structure of No. 4 is simple, and maintenance is also easy. Further, the heat from the exposure light source 24 is less likely to enter the exposure tank 20, so that the water temperature can be easily controlled, and the accuracy of the temperature control when the resist 19 is cured can be improved. The exposed wiring board 1
Numerals 0 are lifted out of the exposure tank 20 by a transport device and sent to a drying device (not shown) for drying.

<Polishing Step> Finally, after the resist 19 is cured, a polishing step is performed. As a polishing apparatus, for example, a belt sander or a buffing polisher is used, and the resist 19 covering and curing the lower layer circuit pattern 18 is polished smoothly until the lower layer circuit pattern 18 is exposed on the surface. After the polishing, as shown in FIG. 7, the upper surface of the lower circuit pattern 18 is exposed, but the space between the lower circuit patterns 18 is filled with a resist 19. In this polishing step, a large amount of glass balloons 19a are contained in the cured resist 19 and are destroyed one after another when the resist 19 is polished. Therefore, even if the cured resist 19 is hard, its grindability is good. . Thereafter, the core substrate 30 having a flat surface is completed through required post-processing steps such as washing and drying.

<Resin Laminating Step> A photosensitive insulating resin is applied on both surfaces of the core substrate 30 so as to cover the lower circuit pattern 18 and the resist ink 19, thereby forming an insulating resin layer 31.
At this time, since the lower circuit pattern 18 and the resist ink 19 have the same height and the surface of the core substrate 30 is flat, the coating of the insulating resin layer 31 is only required to be applied with a slight thickness of, for example, 15 to 20 μm. The surface is also sufficiently flat (see FIG. 8). As the photosensitive insulating resin used in this embodiment, a caustic soda developing type is adopted to enhance the resin characteristics such as heat resistance and high frequency characteristics.

<Via Hole Forming Step> Insulating Resin Layer 31
After the is dried to the touch, the exposure is performed first. For example, as shown in FIG. 9A, a positive film 32 developed so that a portion where a via hole is formed becomes a black image is superimposed on both surfaces of the core substrate 30, and ultraviolet light is applied to the insulating resin layer 31 through the positive film 32. Is performed by irradiating
This is a process similar to the conventional process. After the exposure, the photosensitive insulating resin irradiated with the ultraviolet light is cured and becomes insoluble. Therefore, if the photosensitive insulating resin is developed with a caustic soda solution, the unexposed portions are dissolved and removed, and as shown in FIG. A via hole 33 is formed at a position corresponding to the black portion of the positive film 32 among the holes 31. As a result, the lower circuit pattern 18 of the core substrate 30 is exposed through the via hole 33.

Further, in the present invention, as described above, the thickness of the insulating resin layer 31 can be reduced to half or less as compared with the prior art, so that the conventional manufacturing method shown in FIG. In comparison with the above, the via hole 33 is not formed into an inverted mortar shape, but is formed into a mortar shape having a larger opening diameter near the surface.

<Upper Circuit Pattern Forming Step> The core substrate 30 having the via holes 33 formed at required positions is subjected to a water washing / drying step and a catalyst applying step, and then immersed entirely in a chemical plating solution to form the insulating resin layer 31. A copper chemical plating layer 34 is formed on the entire surface (see FIG. 10A). further,
Using the chemical plating layer 34 as a base electrode, a copper electrolytic plating layer 35 is formed thereon (see FIG. 3B).

Thereafter, unnecessary portions of the electrolytic plating layer 35 and the chemical plating layer 34 are removed again to form an upper circuit pattern 36 (see FIG. 3C). The upper circuit pattern 36 is formed by forming the lower circuit pattern 1
As in the case of No. 8, a well-known photo-etching method can be employed, and therefore, duplicate description will be omitted.

By forming the upper circuit pattern 36 in this manner, a two-layer circuit of the lower circuit pattern 18 and the upper circuit pattern 36 is formed with the insulating resin layer 31 interposed therebetween. Thereafter, if necessary, the above-described resin laminating step,
By repeating the via hole forming step and the upper layer circuit pattern forming step, it is possible to sequentially increase the number of layers.

<Protective Resist Application Step> Thereafter, a protective resist is applied, if necessary, while leaving a component mounting portion on the outermost layer of the circuit board. In this embodiment, as the protective resist to be printed on the outermost layer, a light-sensitive insulating resin of a caustic soda development type is employed as in the case of the insulating resin layer 31 of the intermediate layer, so that the resin properties such as heat resistance and high frequency characteristics are improved. is there.

<Advantages of the present embodiment> As described above, according to the manufacturing method of the present embodiment, the following effects can be obtained. (1) The core substrate 30 is manufactured by filling the space between the lower circuit patterns 18 with the resist 19 and then polishing it to expose the lower circuit patterns 18.
0 indicates a flat surface shape. For this reason, the insulating resin layer 31 on it can be sufficiently flattened by applying only a small film thickness. Therefore, the via hole 33 formed thereafter does not have an inverted mortar shape, and an ideal shape in which the opening diameter becomes wider near the surface is obtained. For this reason, in the subsequent water washing step, the washing water sufficiently enters the via hole 33, so that foreign matters can be prevented from remaining. In the chemical plating step, the plating solution sufficiently enters the via hole 33, so that the inside of the via hole 33 can be prevented. Thus, a uniform chemical plating layer 34 can be formed.

Moreover, since the cross section of the opening edge of the via hole 33 is obtuse, even if stress occurs in the chemical plating layer 34 or the electrolytic plating layer 35 due to the difference in thermal expansion of the material, the opening edge is broken at the opening edge. And reliability is increased. (2) Conventionally, it is impossible to manufacture a core substrate having a flat surface by a subtractive method of etching a copper foil. A plating resist is formed on a surface of an insulating substrate in a required pattern and is covered with the plating resist. It is believed that the additive method must be used to deposit chemical copper on the non-existing portions, and the additive method substrate has a disadvantage that it is considerably expensive due to its low productivity.

In this regard, in this embodiment, the lower circuit pattern 18 is formed by a subtractive method having high productivity (lower pattern forming step), and the lower circuit pattern 18 is buried with a resin material (conductor burying step). This is further polished to form the lower circuit pattern 18.
By exposing the core substrate 30, the core substrate 30 having a flat surface similar to that of the subtractive method substrate can be manufactured at extremely low cost. (3) Moreover, in the present embodiment, in particular, in manufacturing the core substrate 30 as described above, the resist 19 for embedding the lower circuit pattern 18 is preliminarily mixed with the glass balloon 19a. can get. First
In addition, since the hardened resist 19 has an improved grindability and can be easily polished, only the resist 19 is polished to remove the lower circuit pattern 18 without shaving the soft copper electrolytic plating layer 15. Can be exposed.

Second, if inorganic fine particles are mixed in the resist 19, ultraviolet rays from the light source 24 may not enter the deep portion of the resist 19 such as in the through hole 13 during exposure. Since the fine particles are glass balloons 19a, the ultraviolet rays
a, and it is possible to prevent the occurrence of poor curing in the deep part. (4) Further, in this embodiment, in particular, since the exposure is performed in water, the following advantages can be obtained from this point. That is, in general, when the through hole is filled with a resin material and cured, it is necessary to increase the exposure amount in order to sufficiently cure the resin at the center of the through hole. There is a concern that the grinding property may be deteriorated due to excessive hardening of the part. However, if the underwater exposure is performed as described above, the air bubbles at the time of printing that have been included in the uncured resist ink 19 tend to be pushed out by the water pressure, and the temperature rise of the resist ink 19 due to the heat sink action of water does not occur. As a result, even if the exposure amount is increased, there is no generation of voids due to a rise in temperature, and excessive hardening of the surface is suppressed, so that the grindability is improved. (5) According to the present embodiment, the same caustic soda-developed photosensitive insulating resin as the insulating resin layer 31 located between the lower circuit pattern 18 and the upper circuit pattern 36 is used as the outermost protective resist. . Since it has excellent resin properties such as excellent heat resistance and low dielectric constant, it is possible to further improve the heat resistance and high frequency characteristics of the entire build-up wiring board.

<Other Embodiments> The present invention is not limited to the embodiments described above with reference to the drawings. For example, the following embodiments are also included in the technical scope of the present invention. In addition to the following, various changes can be made without departing from the scope of the invention.

(1) In the above embodiment, the flat core substrate 30 is manufactured through the lower circuit pattern forming step, the conductor embedding step, and the polishing step by the subtractive method. However, the present invention is not limited to this. A flat core substrate may be manufactured.

(2) In the above embodiment, an example was described in which a glass balloon was previously mixed into the resin material used in the conductor embedding step. However, when the resin material has good machinability, it may be omitted. it can.

(3) In the above embodiment, the resin material is exposed in the liquid in the conductor embedding step. However, ordinary aerial exposure may be performed. Also, in the case of performing the in-liquid exposure, not only water but also a desired liquid can be employed as long as it does not dissolve the photocurable resin to be exposed. For example, when light irradiation at an extremely low temperature is preferable, liquid nitrogen may be used, or an alcohol-based liquid such as methanol, ethanol, or isopropyl alcohol may be used depending on the type of the photocurable resin. In addition, hydrocarbon liquids such as heptane, mineral spirit, liquid paraffin, xylene, methylene chloride, trichloroethane, perchloroethylene, methyl bromide, propyl bromide, and chlorofluorocarbon 11
3, halogen-based liquids such as HCFC225 and xylene hexachloride, polyhydric alcohol derivatives such as ethylene glycol and ethylene glycol dimethyl ether, and oils such as turpentine, kerosene and silicone oil. Of course, it may be a mixture of these or a liquid to which various additives such as preservatives are added.

(4) The resin material used in the conductor embedding step is not limited to the photocurable resin described in the present embodiment, but may be a thermosetting resin. A network structure (IPN) may be configured.

(5) In the above embodiment, the case where the epoxy-based solventless permanent resist ink is exposed in the conductor embedding step is exemplified. However, a phenol-based ultraviolet curable ink can be similarly applied.

(6) Further, in the above embodiment, the case where the water in the exposure tank 20 is cooled to 10 ° C. to 20 ° C. has been exemplified. However, the invention is not limited to this. The temperature can be set as desired. Furthermore, it is also possible to select a liquid having a particularly high specific gravity to increase the pressure applied to the photocurable resin in the liquid, thereby further improving the bubble elimination performance.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a drilling procedure in a lower circuit pattern forming step according to an embodiment of the present invention.

FIG. 2 is a sectional view showing a plating procedure in a lower-layer circuit pattern forming step.

FIG. 3 is a cross-sectional view showing an etching procedure in a lower circuit pattern forming step.

FIG. 4 is a sectional view showing a conductor embedding step.

FIG. 5 is a sectional view showing the exposure apparatus.

6 is a sectional view taken along the line VI-VI in FIG.

FIG. 7 is a cross-sectional view showing a finished state of the polishing step.

FIG. 8 is a cross-sectional view showing the same resin lamination process.

FIG. 9 is a cross-sectional view showing the same via hole forming step.

FIG. 10 is a cross-sectional view showing the same upper-layer circuit pattern forming step.

FIG. 11 is a cross-sectional view illustrating a method of manufacturing a conventional build-up wiring board.

FIG. 12 is a sectional view showing a via hole shape in a conventional manufacturing method.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 ... Wiring board 11 ... Base material 12 ... Copper foil (conductor layer) 13 ... Through-hole 14, 34 ... Chemical plating layer 15, 35 ... Electrolytic plating layer 16 ... Conductor layer in a hole 17 ... Etching resist 18 ... Circuit pattern 19 ... Resist ink 19a Glass balloon 30 Core substrate 31 Insulating resin layer 33 Via hole 36 Upper circuit pattern

──────────────────────────────────────────────────続 き Continuation of front page (56) References JP-A-63-137499 (JP, A) JP-A-4-186796 (JP, A) JP-A-5-218659 (JP, A) JP-A-1- 140698 (JP, A) JP-A-3-268392 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H05K 3/46

Claims (2)

(57) [Claims] 1. A lower circuit pattern forming step of forming a lower circuit pattern by removing an unnecessary portion of a conductive layer of a wiring board having a conductive layer formed on the surface of a base material, and thereafter, forming an optical circuit on the surface of the wiring board. A conductor embedding step of embedding the lower circuit pattern by attaching a curable resin material,
A resin curing step of irradiating the photocurable resin with light in a state where the wiring substrate coated with the photocurable resin material is immersed in the liquid, and curing the resin material; A polishing step of forming a core substrate having a flat surface by exposing a circuit pattern, a resin laminating step of forming an insulating resin layer covering the lower circuit pattern on the core substrate, and a lower circuit pattern on the insulating resin layer. A via hole forming step of forming a penetrating via hole, and thereafter, an upper layer circuit pattern forming step of forming an upper layer circuit pattern connected to the lower layer circuit pattern through the via hole by plating the surface of the insulating resin layer. A method of manufacturing a build-up wiring board. 2. The method for manufacturing a build-up wiring board according to claim 1, wherein the photocurable resin material for embedding the lower circuit pattern is mixed with hollow fine powder made of glass.