JP3105650B2 - Semiconductor integrated circuit device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor integrated circuit device, and more particularly to a function selection circuit.

[0002]

BACKGROUND ART Conventional function selection circuit as shown in FIG. 3, the N-type MOSFET Q _31, Q _33, P-type MOSFET
And a Q ₃₂ and a waveform shaping circuit for MOSFETI _31, I ₃₂ Prefecture. When the internal operation is switched by the function selection circuit, the power supply potential is applied to the pad P of the function selection circuit shown in FIG. 3 or the ground potential is applied.

When not used, the pad P is left floating. However, the conventional function selecting circuit has a MOSFET Q ₃₁ for for fixing the internal signals, for fixing the MOSFET Q _32, Q ₃₃ as the first stage gate of the function selection circuit a constant potential as shown in FIG.

[0004]

This conventional function selecting circuit is designed to be arranged such that when a pad P is floating, a MOSFET
As for the floating prevention of the gate of Q _32, Q _33, M
We are using the OSFETQ _31. Therefore, for functional switching, the application of a power supply level to the pad P, via the MOSFET Q ₃₁ function selection circuit, has a drawback that feedthrough current I flows between the power supply terminal and the ground terminal.

[0005] In recent years, products have become multifunctional and low power consumption, and it is necessary to use low power consumption circuits.

An object of the present invention is to provide a semiconductor integrated circuit device having a low-consumption type function selection circuit in which a through current does not flow between a power supply terminal and a ground terminal even when a power supply level is applied to a pad of the function selection circuit. Is to do.

[0007]

In order to achieve the above object, a semiconductor integrated circuit device according to the present invention is a semiconductor integrated circuit device having a function selecting circuit, wherein
The first-stage gate connected to the external input terminal is
Between the input terminal of the first stage and the ground terminal.
With MOSFET controlled by
When a power supply potential is applied to the input terminal of the first stage gate,
The MOSFET is turned off . Also the first
The stage gate is composed of P-type MOSFET and N-type MOSFET.
A configured inverting circuit, wherein the input terminal of the inverting circuit is
The capacitor has a capacitive element between the ground terminal.

[0008]

When a power supply potential is applied to the pad, the flow of through current between the power supply terminal and the ground terminal is prevented by the capacitive element.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram showing one embodiment of the present invention.

In FIG. 1, a P-type MOSFET Q ₄ and an N-type MOSFET Q ₅ as the first stage gate of the function selection circuit constitute a complementary circuit. MOSFETQ ₄ and MO
The subsequent stage of the SFETQ _5, MOSFE waveform shaping circuit
TI ₁ and I ₂ are connected. In addition, MOSFET Q ₄
Between the gate and the ground potential of the Q ₅ and, N-type MOSF
ETQ ₃ is connected. The base of N type MOSFET Q ₃ is connected to the connection point of the MOSFET Q _4, Q _5.

Furthermore, between the gate and the ground potential of the MOSFET Q _4, Q _5, connects the capacitor C _1.

[0012] In the embodiment, a pad P is floating state, when the power is turned on, since the pad P, as shown in FIG. 2 is the capacitor C _1, the power-on simultaneously, not a power supply level. Thereby, MOSFET
The potential difference between the power supply and the pad P of Q ₄ is, V of the transistor Q ₄
When it becomes more than _T, MOSFET Q ₄ is turned ON, a point becomes the power supply potential, MOSFET Q ₃ is turned ON, the pad P is stabilized at the ground potential.

Further, even if a power supply level is applied to the pad P, there is no path through which a through current flows between the power supply terminal and the ground terminal.

[0014]

As described above, according to the present invention, the through current flows between the power supply terminal and the ground terminal even when the power supply potential is applied to the pad by changing the floating prevention MOSFET of the pad to a capacitance element. Absent. Therefore, a semiconductor integrated circuit with low power consumption can be provided.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing one embodiment of the present invention.

FIG. 2 is a diagram showing a potential change of each contact when the power supply of the circuit shown in FIG. 1 is turned on.

FIG. 3 is a circuit diagram showing a conventional function selection circuit.

[Explanation of symbols]

C ₁ capacitance element Q ₃ , Q ₅ , Q ₃₁ , Q ₃₃ N-type MOSFET Q ₄ , Q ₃₂ P-type MOSFET I ₁ , I ₂ , I ₃₁ , I ₃₂ MOSFET for waveform shaping circuit

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H03K 3/353 H03K 17/16 H03K 19/0175 H03K 19/173 101 G11C 29/00

Claims (2)

(57) [Claims] 1. A semiconductor integrated circuit device having a function selection circuit, wherein a first stage gate connected to an external input terminal of the function circuit
Is provided between the input terminal of the first stage gate and a ground terminal.
MOS whose switching is controlled by the output of the first stage gate
A power supply potential at the input terminal of the first stage gate.
A semiconductor integrated circuit device wherein the MOSFET is turned off when the voltage is applied . 2. The method according to claim 1, wherein the first stage gate is a P-type MOSFET.
An inverting circuit composed of an N-type MOSFET;
A capacitor is provided between the input terminal of the inverting circuit and the ground terminal.
2. The semiconductor integrated circuit according to claim 1, wherein
apparatus.