JP3103741B2 - Resin-sealed semiconductor device and method of manufacturing the same - Google Patents
Resin-sealed semiconductor device and method of manufacturing the sameInfo
- Publication number
- JP3103741B2 JP3103741B2 JP07016832A JP1683295A JP3103741B2 JP 3103741 B2 JP3103741 B2 JP 3103741B2 JP 07016832 A JP07016832 A JP 07016832A JP 1683295 A JP1683295 A JP 1683295A JP 3103741 B2 JP3103741 B2 JP 3103741B2
- Authority
- JP
- Japan
- Prior art keywords
- external connection
- package
- semiconductor device
- resin
- connection electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は、樹脂封止型半導体装置
のパッケージ部より突出して設けられた外部電極端子の
配列効率を向上させた樹脂封止型半導体装置およびその
製造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-encapsulated semiconductor device in which the arrangement efficiency of external electrode terminals protruding from a package portion of the resin-encapsulated semiconductor device is improved, and a method of manufacturing the same. .
【０００２】[0002]
【従来の技術】図５は従来の樹脂封止型半導体装置を示
す平面図であり、図６はその側面図、図７はその底面図
である。図５，図６および図７において、従来の樹脂封
止型半導体装置は、半導体素子をその内部に封止したパ
ッケージ部１と、前記パッケージ部１の側面より突出し
た外部接続電極２より構成されている。前記外部接続電
極２は、その形状において、表面実装可能なように、外
部接続電極の先端部２ａは接合面に対して平坦な形状と
なってる。2. Description of the Related Art FIG. 5 is a plan view showing a conventional resin-sealed semiconductor device, FIG. 6 is a side view thereof, and FIG. 7 is a bottom view thereof. 5, 6 and 7, the conventional resin-encapsulated semiconductor device includes a package portion 1 in which a semiconductor element is encapsulated, and an external connection electrode 2 protruding from a side surface of the package portion 1. ing. In the shape of the external connection electrode 2, the tip 2a of the external connection electrode is flat with respect to the bonding surface so that the external connection electrode 2 can be surface-mounted.
【０００３】そして従来の樹脂封止型半導体装置は、パ
ッケージ部１の側面に設けた外部接続電極２をプリント
回路基板上にはんだ付けすることにより実装されるもの
である。The conventional resin-encapsulated semiconductor device is mounted by soldering an external connection electrode 2 provided on a side surface of a package portion 1 onto a printed circuit board.
【０００４】[0004]
【発明が解決しようとする課題】しかしながら、近年は
電子機器の小型化に伴う樹脂封止型半導体装置の小型
化、外部接続電極の狭ピッチ化の要望が強く、外部接続
電極間がこれまで以上に狭くなるとプリント回路基板に
実装不可能となり、またプリント回路基板面積の縮小化
に伴い、実装面積もできる限り縮小化することが必要と
なってくる。このような背景により、従来の樹脂封止型
半導体装置の構成、特に外部接続電極の構成では、パッ
ケージ部の周辺部に外部接続電極をリードとして設けて
いるので、小型化・狭ピッチ化に対応することはできな
くなり、面積の縮小したプリント回路基板には実装する
ことができないという課題があった。However, in recent years, there has been a strong demand for miniaturization of resin-encapsulated semiconductor devices and reduction in the pitch of external connection electrodes in accordance with miniaturization of electronic equipment. When the printed circuit board becomes smaller, the mounting area becomes smaller as much as possible. Against this background, the conventional resin-encapsulated semiconductor device configuration, especially the external connection electrode configuration, is provided with external connection electrodes as leads at the periphery of the package section, and thus can be reduced in size and pitch. And there is a problem that it cannot be mounted on a printed circuit board having a reduced area.
【０００５】本発明は、前記課題を解決し、小型化・狭
ピッチ化を実現できる樹脂封止型半導体装置を提供する
ことを目的とするものである。An object of the present invention is to solve the above-mentioned problems and to provide a resin-sealed semiconductor device capable of realizing miniaturization and narrow pitch.
【０００６】[0006]
【課題を解決するための手段】前記課題を解決するため
に、本発明の樹脂封止型半導体装置は、半導体素子をパ
ッケージ部内に封止してなる樹脂封止型半導体装置であ
って、前記パッケージ部側面に設けられ、封止された前
記半導体素子と電気的に接続された側面外部接続電極
と、前記側面外部接続電極と電気的に接続し、前記パッ
ケージ部の上下両表面に配列して設けられた外部接続電
極とを有し、前記外部接続電極においてパッケージ部の
上下両表面のどちらか一面の外部接続電極は、パッケー
ジ部に対して凹形状であり、他の一面の外部接続電極
は、パッケージ部に対して凸形状であることを特徴とす
る。According to another aspect of the present invention, there is provided a resin-encapsulated semiconductor device in which a semiconductor element is encapsulated in a package. A side surface external connection electrode provided on the package portion side surface and electrically connected to the sealed semiconductor element, electrically connected to the side surface external connection electrode, and arranged on both upper and lower surfaces of the package portion provided was closed and the external connection electrodes, the package part in the external connection electrode
External connection electrodes on either one of the upper and lower surfaces
The external connection electrode is concave with respect to the
Is characterized by having a convex shape with respect to the package portion .
【０００７】製造方法においては、リードフレーム部上
に半導体素子を接合した後、接合した半導体素子を含む
領域を封止材で封止し、パッケージ部を形成する第１工
程と、前記第１工程で形成したパッケージ部の全面に金
属を蒸着する第２工程と、前記第２工程で形成した金属
蒸着物を部分的に除去し、前記パッケージ部の一表面に
対して、前記リードフレーム部と接続した電極パターン
を配列形成する第３工程と、前記第３工程で配列形成し
た電極パターンに対して、メッキ処理し、パッケージ部
の一表面に外部接続電極を形成する第４工程と、リード
フレーム部とパッケージ部とを分断する第５工程とより
なることを特徴とする。In the manufacturing method, after a semiconductor element is bonded on a lead frame part, a region including the bonded semiconductor element is sealed with a sealing material to form a package part, and a first step of forming the package part. A second step of depositing a metal on the entire surface of the package portion formed in step 2, and partially removing the metal deposit formed in the second step, and connecting the lead frame portion to one surface of the package portion. A third step of arranging the formed electrode patterns, a fourth step of plating the electrode patterns arranged and formed in the third step, and forming external connection electrodes on one surface of the package section, and a lead frame section. And a fifth step of dividing the package and the package portion.
【０００８】[0008]
【作用】前記構成により、側面外部接続電極の電極間ピ
ッチが狭い場合でも、側面外部接続電極と電気的に接続
された表面外部接続電極もしくは裏面外部接続電極、ま
たは表面外部接続電極と裏面外部接続電極の両方とを用
いることにより、パッケージ部の面を利用して電極配列
の効率化を図ることができ、より狭ピッチ化、多ピン化
に対応できる。また、実装面積の縮小化が要求される場
合でも、従来より外部接続電極が短いため、より実装面
積を狭くできる。According to the above construction, even when the pitch between the side external connection electrodes is narrow, the front external connection electrode or the rear external connection electrode electrically connected to the side external connection electrode, or the front external connection electrode and the rear external connection. By using both of the electrodes, the efficiency of the electrode arrangement can be improved by utilizing the surface of the package portion, and it is possible to cope with narrower pitch and more pins. Further, even when a reduction in the mounting area is required, the mounting area can be further reduced because the external connection electrodes are shorter than before.
【０００９】また、本発明の樹脂封止型半導体装置の表
面外部接続電極を凹型、裏面外部接続電極を凸型などと
することにより、樹脂封止型半導体装置同士を重ね合わ
せて実装することができる。Further, the resin-encapsulated semiconductor device of the present invention may be formed such that the front external connection electrodes are concave and the rear external connection electrodes are convex, so that the resin-encapsulated semiconductor devices are mounted one on top of the other. it can.
【００１０】[0010]
【実施例】以下、本発明の一実施例について図面を参照
しながら説明する。An embodiment of the present invention will be described below with reference to the drawings.
【００１１】図１は本発明の実施例における樹脂封止型
半導体装置を示す平面図であり、図２はその側面図、図
３は底面図である。FIG. 1 is a plan view showing a resin-sealed semiconductor device according to an embodiment of the present invention, FIG. 2 is a side view thereof, and FIG. 3 is a bottom view.
【００１２】図１，図２および図３において、本実施例
の樹脂封止型半導体装置は、その内部に半導体素子を封
止しているパッケージ部１の側面に形成された側面外部
接続電極３をそれぞれ表面外部接続電極４、もしくは裏
面外部接続電極５と電気的に接続している。すなわち、
側面外部接続電極３から表面側に表面外部接続電極４と
して引き回し、また側面外部接続電極３から裏面側に裏
面外部接続電極５として引き回している。前記表面外部
接続電極４は、側面に形成された側面外部接続電極３の
ピン数と、実装するべきプリント回路基板の接合電極の
配列とを考慮して、パッケージ部１の表面上に対して、
パッケージ部１の面積を有効に利用できる最適条件で引
き回して配列している。なお、図においては、格子状配
列としているが、ちどり配列であっても何等問題ない。Referring to FIGS. 1, 2 and 3, the resin-sealed semiconductor device of this embodiment has a side-surface external connection electrode 3 formed on a side surface of a package portion 1 in which a semiconductor element is sealed. Are electrically connected to the front surface external connection electrode 4 or the back surface external connection electrode 5, respectively. That is,
It is routed from the side surface external connection electrode 3 to the front surface side as the front surface external connection electrode 4, and is routed from the side surface external connection electrode 3 to the back surface side as the back surface external connection electrode 5. In consideration of the number of pins of the side surface external connection electrodes 3 formed on the side surface and the arrangement of the bonding electrodes of the printed circuit board to be mounted, the front surface external connection electrodes 4
The area of the package section 1 is arranged under the optimum condition that can be used effectively. In the drawing, although a lattice-like arrangement is used, there is no problem even in a staggered arrangement.
【００１３】したがって、側面外部接続電極３が多ピン
となったり、狭ピッチとなったり、あるいはプリント回
路基板の実装面積が狭い場合でも、前記表面外部接続電
極４もしくは前記裏面外部接続電極５によって、プリン
ト回路基板等に実装することが可能となる。なお、前記
パッケージ部１の側面に形成された側面外部接続電極３
は、前記パッケージ部１の内部に封止されている半導体
素子の電極と電気的に内部接続されているものである。Therefore, even when the side surface external connection electrode 3 has a large number of pins, a narrow pitch, or a small mounting area of the printed circuit board, the front surface external connection electrode 4 or the rear surface external connection electrode 5 can be used for printing. It can be mounted on a circuit board or the like. In addition, the side surface external connection electrode 3 formed on the side surface of the package portion 1
Are electrically connected internally to the electrodes of the semiconductor element sealed inside the package portion 1.
【００１４】また、たとえば前記表面外部接続電極４を
パッケージ部１に埋め込んだ凹型、前記裏面外部接続電
極５を厚みを持たせた凸型とし、表面外部接続電極４と
裏面外部接続電極５とを重ね合わせることができる形状
とすることにより、樹脂封止型半導体装置のパッケージ
部１同士を重ね合わせて実装することも可能である。さ
らに、たとえば前記表面外部接続電極４も前記裏面外部
接続電極５もプリント回路基板に両面実装することによ
り、体積的に小型化できる。本実施例においては、パッ
ケージ部１の表面・裏面の両面に外部接続電極４，５を
形成しているが、どちらか一方の面に形成してもよく、
プリント回路基板への実装構成を考慮して形成する。Further, for example, the front surface external connection electrode 4 is formed into a concave shape in which the front surface external connection electrode 4 is embedded in the package portion 1, and the back surface external connection electrode 5 is formed into a convex shape having a certain thickness. By adopting a shape that can be superimposed, the package portions 1 of the resin-encapsulated semiconductor device can be superimposed and mounted. Further, for example, by mounting both the front surface external connection electrode 4 and the back surface external connection electrode 5 on both sides of the printed circuit board, the volume can be reduced. In the present embodiment, the external connection electrodes 4 and 5 are formed on both the front and back surfaces of the package portion 1. However, the external connection electrodes 4 and 5 may be formed on either one of the surfaces.
It is formed in consideration of a mounting configuration on a printed circuit board.
【００１５】次に、本発明の一実施例にかかる樹脂封止
型半導体装置の製造方法について図面を参照しながら説
明する。Next, a method for manufacturing a resin-sealed semiconductor device according to one embodiment of the present invention will be described with reference to the drawings.
【００１６】図４（ａ）〜（ｅ）は、本実施例の樹脂封
止型半導体装置の製造方法を示す工程図である。図４に
おいては、各工程の処理を明瞭に示すために、ハッチン
グを一部に付している。FIGS. 4A to 4E are process diagrams showing a method for manufacturing the resin-encapsulated semiconductor device of this embodiment. In FIG. 4, hatching is partially applied to clearly show the processing of each step.
【００１７】まず図４（ａ）においては、リードフレー
ム６上に半導体素子を接合した後、接合した半導体素子
を含む領域を樹脂封止し、パッケージ部１を形成した状
態を示している（第１工程）。First, FIG. 4A shows a state in which a semiconductor element is bonded on a lead frame 6 and then a region including the bonded semiconductor element is sealed with a resin to form a package portion 1 (No. 1). 1 step).
【００１８】次に図４（ｂ）においては、前記第１工程
で形成したパッケージ部１の表面・側面・裏面の全面に
金属蒸着物７を蒸着した状態を示している（第２工
程）。Next, FIG. 4B shows a state in which the metal deposit 7 is deposited on the entire surface, side surface and back surface of the package portion 1 formed in the first step (second step).
【００１９】次に図４（ｃ）においては、マスクを用い
て、レーザー技術やエッチング技術により前記第２工程
で形成した金属蒸着物７を部分的に除去し、表面、裏面
に対して、目的とする配列を構成できるように電極パタ
ーン８を形成した状態を示している（第３工程）。Next, in FIG. 4 (c), using a mask, the metal deposition 7 formed in the second step is partially removed by a laser technique or an etching technique. 3 shows a state in which the electrode pattern 8 is formed so as to be able to form an arrangement (third step).
【００２０】次に図４（ｄ）においては、前記第３工程
で形成した電極パターン８に対して、メッキ処理するこ
とにより表面外部接続電極４もしくは裏面外部接続電極
５を形成した状態を示している（第４工程）。Next, FIG. 4D shows a state in which the surface external connection electrode 4 or the rear surface external connection electrode 5 is formed by plating the electrode pattern 8 formed in the third step. (Fourth step).
【００２１】最後に図４（ｅ）においては、リードフレ
ーム６とパッケージ部１とを分断（フレームカット工
程）した状態を示している（第５工程）。この状態にお
いて、パッケージ部１の側面のリードフレーム６の破断
面と表面外部接続電極４もしくは裏面外部接続電極５と
は、接続しているものである。Finally, FIG. 4E shows a state in which the lead frame 6 and the package section 1 are separated (frame cutting step) (fifth step). In this state, the fractured surface of the lead frame 6 on the side surface of the package portion 1 is connected to the front surface external connection electrode 4 or the back surface external connection electrode 5.
【００２２】なお、パッケージ部１上に凹形状の電極パ
ターン８を形成する際は、第２工程の金属蒸着物７を蒸
着する前に予め、パッケージ部１に凹部を形成すること
により、凹形状の電極パターン８を形成し、凹形状の表
面（裏面）外部接続電極４（５）を形成することができ
る。また、凸形状の電極パターン８を形成する際は、第
２工程の金属蒸着物７の蒸着量を多くすることにより、
凸形状の電極パターン８を形成し、凸形状の表面（裏
面）外部接続電極４（５）を形成することができる。When the concave electrode pattern 8 is formed on the package 1, a concave is formed in the package 1 in advance before depositing the metal deposit 7 in the second step. Of the external connection electrode 4 (5) can be formed. Further, when forming the electrode pattern 8 having a convex shape, by increasing the deposition amount of the metal deposition 7 in the second step,
The protruding electrode pattern 8 can be formed to form the protruding front (back) external connection electrode 4 (5).
【００２３】[0023]
【発明の効果】以上説明したように、本発明は多ピン、
狭ピッチ、実装面積の縮小化により実装が困難と思われ
る樹脂封止型半導体装置の表面もしくは裏面に、側面外
部接続電極と電気的に接続された表面外部接続電極もし
くは裏面外部接続電極を形成することにより、実装可能
とし、多ピン、狭ピッチ、実装面積の縮小化に大きな効
果をもたらすことができる。As described above, the present invention provides a multi-pin,
Forming a surface external connection electrode or a back surface external connection electrode electrically connected to a side surface external connection electrode on a front surface or a back surface of a resin-encapsulated semiconductor device which is considered to be difficult to mount due to a narrow pitch and a reduction in mounting area. Accordingly, mounting is possible, and a great effect can be brought about in reducing the number of pins, the narrow pitch, and the mounting area.
【図１】本発明の一実施例にかかる樹脂封止型半導体装
置を示す平面図FIG. 1 is a plan view showing a resin-encapsulated semiconductor device according to one embodiment of the present invention.
【図２】本発明の一実施例にかかる樹脂封止型半導体装
置を示す側面図FIG. 2 is a side view showing a resin-sealed semiconductor device according to one embodiment of the present invention.
【図３】本発明の一実施例にかかる樹脂封止型半導体装
置を示す底面図FIG. 3 is a bottom view showing a resin-sealed semiconductor device according to one embodiment of the present invention;
【図４】本発明の一実施例にかかる樹脂封止型半導体装
置の製造方法を示す工程図FIG. 4 is a process chart showing a method for manufacturing a resin-encapsulated semiconductor device according to one embodiment of the present invention.
【図５】従来の樹脂封止型半導体装置を示す平面図FIG. 5 is a plan view showing a conventional resin-encapsulated semiconductor device.
【図６】従来の樹脂封止型半導体装置を示す側面図FIG. 6 is a side view showing a conventional resin-encapsulated semiconductor device.
【図７】従来の樹脂封止型半導体装置を示す底面図FIG. 7 is a bottom view showing a conventional resin-encapsulated semiconductor device.
１ パッケージ部 ２ 外部接続電極 ３ 側面外部接続電極 ４ 表面外部接続電極 ５ 裏面外部接続電極 ６ リードフレーム ７ 金属蒸着物 ８ 電極パターン DESCRIPTION OF SYMBOLS 1 Package part 2 External connection electrode 3 Side surface external connection electrode 4 Front surface external connection electrode 5 Back surface external connection electrode 6 Lead frame 7 Metal deposit 8 Electrode pattern
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平１−128891（ＪＰ，Ａ) 特開 昭63−258050（ＪＰ，Ａ) 特開 平４−37057（ＪＰ，Ａ) 特開 平４−277636（ＪＰ，Ａ) 特開 平６−140738（ＪＰ，Ａ) 実開 平２−68446（ＪＰ，Ｕ) (58)調査した分野(Int.Cl.7，ＤＢ名) H01L 23/12 H01L 23/28 H01L 21/60 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-1-1288891 (JP, A) JP-A-63-258050 (JP, A) JP-A-4-37057 (JP, A) JP-A-4- 277636 (JP, A) JP-A-6-140738 (JP, A) JP-A-2-68446 (JP, U) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 23/12 H01L 23 / 28 H01L 21/60
Claims (2)
なる樹脂封止型半導体装置であって、前記パッケージ部
側面に設けられ、封止された前記半導体素子と電気的に
接続された側面外部接続電極と、前記側面外部接続電極
と電気的に接続し、前記パッケージ部の上下両表面に配
列して設けられた外部接続電極とを有し、前記外部接続
電極においてパッケージ部の上下両表面のどちらか一面
の外部接続電極は、パッケージ部に対して凹形状であ
り、他の一面の外部接続電極は、パッケージ部に対して
凸形状であることを特徴とする樹脂封止型半導体装置。1. A resin-encapsulated semiconductor device in which a semiconductor element is sealed in a package portion, wherein the semiconductor device is provided on a side surface of the package portion and is electrically connected to the sealed semiconductor element. the connection electrode, said side and external connecting electrode electrically connected, possess an external connection electrode provided arranged in both the upper and lower surfaces of the package portion, the external connection
Either one of the upper and lower surfaces of the package part on the electrode
External connection electrodes are concave with respect to the package
The external connection electrode on the other side is
A resin-sealed semiconductor device having a convex shape .
した後、接合した半導体素子を含む領域を封止材で封止
し、パッケージ部を形成する第１工程と、前記第１工程
で形成したパッケージ部の全面に金属を蒸着する第２工
程と、前記第２工程で形成した金属蒸着物を部分的に除
去し、前記パッケージ部の一表面に対して、前記リード
フレーム部と接続した電極パターンを配列形成する第３
工程と、前記第３工程で配列形成した電極パターンに対
して、メッキ処理し、パッケージ部の一表面に外部接続
電極を形成する第４工程と、リードフレーム部とパッケ
ージ部とを分断する第５工程とよりなることを特徴とす
る樹脂封止型半導体装置の製造方法。 2. A semiconductor element is bonded on a lead frame portion.
After that, the area including the bonded semiconductor element is sealed with a sealing material
And a first step of forming a package portion, and the first step
2nd process to deposit metal on the entire surface of the package part formed by
And partially removing the metal deposit formed in the second step.
And remove the lead from one surface of the package section.
Third to form an array of electrode patterns connected to the frame part
Process and the electrode pattern arranged and formed in the third process.
And plating, then externally connected to one surface of the package
A fourth step of forming electrodes, a lead frame portion and a package
And a fifth step of separating the storage section from the storage section.
Manufacturing method of a resin-encapsulated semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP07016832A JP3103741B2 (en) | 1995-02-03 | 1995-02-03 | Resin-sealed semiconductor device and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP07016832A JP3103741B2 (en) | 1995-02-03 | 1995-02-03 | Resin-sealed semiconductor device and method of manufacturing the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08213504A JPH08213504A (en) | 1996-08-20 |
| JP3103741B2 true JP3103741B2 (en) | 2000-10-30 |
Family
ID=11927179
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP07016832A Expired - Fee Related JP3103741B2 (en) | 1995-02-03 | 1995-02-03 | Resin-sealed semiconductor device and method of manufacturing the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3103741B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101660221B1 (en) * | 2014-11-26 | 2016-09-27 | 전창열 | Umbrella with case for rainwater |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63258050A (en) * | 1987-04-15 | 1988-10-25 | Mitsubishi Electric Corp | Semiconductor device |
| JP2654034B2 (en) * | 1987-11-14 | 1997-09-17 | 松下電工株式会社 | Semiconductor IC device |
| JPH0268446U (en) * | 1988-11-14 | 1990-05-24 | ||
| JP2799472B2 (en) * | 1990-05-31 | 1998-09-17 | イビデン株式会社 | Substrate for mounting electronic components |
| JP2962586B2 (en) * | 1991-03-05 | 1999-10-12 | 新光電気工業株式会社 | Semiconductor device, method of manufacturing the same, and joined body used therefor |
| JP2794972B2 (en) * | 1991-03-12 | 1998-09-10 | イビデン株式会社 | Leadless chip carrier |
-
1995
- 1995-02-03 JP JP07016832A patent/JP3103741B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101660221B1 (en) * | 2014-11-26 | 2016-09-27 | 전창열 | Umbrella with case for rainwater |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH08213504A (en) | 1996-08-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5240588A (en) | Method for electroplating the lead pins of a semiconductor device pin grid array package | |
| US5953589A (en) | Ball grid array semiconductor package with solder balls fused on printed circuit board and method for fabricating the same | |
| JP3011233B2 (en) | Semiconductor package and its semiconductor mounting structure | |
| JP4731021B2 (en) | Semiconductor device manufacturing method and semiconductor device | |
| JPH11195733A (en) | Semiconductor device and manufacture thereof, and conductive board thereof | |
| JP4068336B2 (en) | Semiconductor device | |
| JP2001326295A (en) | Semiconductor device and frame for manufacturing the same | |
| JP2005353700A (en) | Surface mounting electronic component and its manufacturing method | |
| US20040094833A1 (en) | Semiconductor package | |
| KR20030076199A (en) | Semiconductor Device and Method of Manufacturing the Same | |
| JP3292082B2 (en) | Terminal land frame and method of manufacturing resin-encapsulated semiconductor device using the same | |
| JP3103741B2 (en) | Resin-sealed semiconductor device and method of manufacturing the same | |
| US5118556A (en) | Film material for film carrier manufacture and a method for manufacturing film carrier | |
| JPH07307409A (en) | Semiconductor device and its production method | |
| JPH1070211A (en) | Tape carrier and production thereof | |
| JP2533011B2 (en) | Surface mount semiconductor device | |
| JP3467410B2 (en) | Lead frame manufacturing method | |
| JP2901941B2 (en) | High frequency power semiconductor device | |
| JP3271500B2 (en) | Semiconductor device | |
| JPH11163197A (en) | Semiconductor mounting board | |
| JP2500610B2 (en) | Semiconductor device | |
| JPH07249707A (en) | Semiconductor package | |
| JPS63307762A (en) | Semiconductor device | |
| KR100246848B1 (en) | Land grid array and a semiconductor package having a same | |
| JP3230318B2 (en) | Lead frame for semiconductor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20070825 Year of fee payment: 7 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080825 Year of fee payment: 8 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080825 Year of fee payment: 8 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090825 Year of fee payment: 9 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090825 Year of fee payment: 9 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100825 Year of fee payment: 10 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110825 Year of fee payment: 11 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110825 Year of fee payment: 11 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120825 Year of fee payment: 12 |
|
| LAPS | Cancellation because of no payment of annual fees |