JP3100797B2 - Power supply - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply. More particularly, the present invention relates to a power supply device having a high voltage output suitable for an image forming apparatus such as a copying machine and a printer using an electrophotographic method.

[0002]

2. Description of the Related Art FIG. 14 is a circuit diagram showing an example of a conventional power supply device.

Conventionally, in a power supply device that generates a low-voltage output and a high-voltage output by a single transformer, as shown in FIG. 14, a pulse signal from a control circuit 30 is supplied to a drive circuit 25 via a transformer 24, The switching transistor 27 performs a switching operation, and supplies the energy required by the output load via the transformer 26.

A low voltage output 52 is provided by one transformer 26.
In the power supply circuit for generating the high voltage output 53, the voltage of the low voltage output 52 is controlled by the control circuit 39 so as to be a constant voltage. For this reason, the voltage of the high-voltage output 53 is controlled by turning on and off the transistor 34 by the voltage comparator 43 and the like, irrespective of the switching operation of the switching transistor 27, and controlling the voltage to a constant voltage. .

[0005] Corona charging is used in the process of transferring the toner powder image on the photosensitive drum, which has been developed by a color copying machine or a color printer, onto transfer paper, and the corona wire is generally 6 to 9 KV, 0.1 to 10 kV. Power was supplied by a 1 mA constant current power supply.

As the output voltage generating means of both positive and negative polarities, a positive and negative power supply is connected in series, the output side having a small output range is fixed output, and the reverse polarity side is variable to cover the required positive and negative output ranges. What we did was normal.

In the conventional power supply device, the method of detecting the overcurrent of the switching element is such that the current flowing through the collector (drain) is detected, and when the current exceeds a certain value, the drive is stopped or intermittently oscillated. ing.

That is, regardless of whether the signal applied to the gate (base) of the switching element is on or off, if the signal exceeds a certain value, the switching element is immediately turned off as it is. I have.

[0009]

However, in the above-described method of detecting the overcurrent of the switching element, for example, when the current is detected by a resistor, the inductance component of the resistor is required.
Surge noise occurs at turn-on and turn-off. Due to this surge, the overcurrent protection circuit malfunctions.

[0010] In particular, when the oscillation frequency becomes higher, there is a problem that this defect becomes remarkable besides the resistance detection.

[0011]

[0012]

[0013]

[0014]

[0015]

[0016]

[0017]

The present invention has been made to solve the above-mentioned problems of the prior art, and can more reliably control the output.
It is an object of the present invention to provide a power supply device suitable for an image forming apparatus such as a copying machine and a printer.

[0019] Therefore, the power supply device according to the present invention, co
Voltage detection to detect the secondary output voltage of the inverter transformer
Means having a pulse width modulated signal based on the detected voltage
In controlling child the primary side of the on / off switching device
A said converter transformer primary power supply apparatus that controls the excitation period by a, out to the switching element
A first pulse width for generating a first pulse width modulation signal to be applied
Modulation signal generating means, for the first pulse width modulation signal
To turn on at a timing later than the time t1,
The second pulse width modulation signal that turns off at an early timing
A pulse width modulation signal generating means for generating a current, a current detecting means for detecting a current of the switching element, a comparing means for comparing a value detected by the current detecting means with a designated value, and a detecting means for detecting the current by the current detecting means. Is the specified value.
The second pulse width modulation signal generating means.
ON when the generated second pulse width modulation signal is ON
A stop signal output means for outputting a stop signal becomes, the stop
It is off the switching element when turned on the signal
With the configuration, characterized in that a overcurrent protection device that allowed, it is intended to achieve the above object.

[0020]

[0021]

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A power supply device according to the present invention will be described with reference to embodiments.

(First Embodiment) FIG. 1 is a block diagram of the first embodiment, and the configuration of the first embodiment will be described with reference to FIG. The + output obtained by rectifying and smoothing the AC line input voltage 1 is connected to one end of the N1 winding of the transformer T1. The other end of the N1 winding is connected to a switching transistor (F in this embodiment).
ET) The drain of the Tr1 is connected, and the source of the switching transistor Tr1 (hereinafter, referred to as a transistor Tr1) is connected to the rectified and smooth negative output. A resonance capacitor C2 is inserted between the drain and the source of the transistor Tr1. This is for efficiently transmitting power to the secondary side of the transformer T1 by resonating with the inductance of the N1 winding. A pulse signal for driving the transistor Tr1 is generated by a pulse width modulation (hereinafter, referred to as PWM) output circuit 8, and drives the gate of the transistor Tr1 via the drive circuit 3. In this embodiment, since the PWM output circuit 8 is placed on the secondary side, the drive circuit 3 includes an insulating means.

The output of the secondary winding N2 of the transformer T1 is rectified and smoothed by diodes D1 and D2, an inductance L1 and a capacitor C2, and output as an output 2.
The output of the secondary winding N3 of the transformer T1 is rectified and smoothed by a diode D3 and a capacitor C3 and output as an output 1. Then, this output 1 is fed back to the control system, and PWM control is performed. In this embodiment, power is supplied to the secondary side control circuit from another auxiliary power supply (not shown).

Reference numeral 7 denotes an A / D conversion circuit for taking the value of the output 1 into a central processing unit (hereinafter referred to as a CPU) 14;
Is an oscillation circuit of the CPU 14, and 10 and 11 are memory RAM and ROM for the CPU 14. Reference numeral 12 denotes a down counter for determining the on / off time when performing the PWM control, and controls the time and the time ratio by changing the initial value.

Reference numeral 13 denotes a pulse width modulation (PWM) control calculation circuit, which controls the output voltage fetched by the A / D conversion circuit 7 and other information such as input voltage and output timing. On / off of the transistor Tr1 based on parameters such as sequence control
Calculate off time.

Numeral 8 denotes a PWM output circuit, which outputs a transistor Tr based on the value calculated by the PWM control calculation circuit 13.
Drive one. Reference numerals 5 and 15 denote delay circuits, which generate signals slightly shifted in timing from the drive signal of the transistor Tr1. This signal deviation prevents the overcurrent protection circuit from malfunctioning.

Reference numeral 4 denotes a logical product circuit (hereinafter, referred to as an AND circuit), in which the output of the comparator Q1 is high, that is, an overcurrent is flowing, and a signal whose timing is slightly different from the drive signal comes. An AND circuit whose output becomes high (High: hereinafter, H) only when the state, that is, the state where a timing signal that does not pick up a current surge comes, occurs at the same time.

Reference numeral 9 denotes P when the output of the AND circuit 4 is high.
This is a latch type output stop circuit for stopping the output of the WM circuit 8. R2 and R3 are resistors for determining the reference voltage of the comparator Q1, and R1 is a resistor for detecting overcurrent.

Next, the operation of this embodiment will be described.

FIG. 2 is a timing chart of the first embodiment, in which points (a) to (g) correspond to the points in FIG. However, (a) to (e) are the present embodiment, and (f) and (g) are conventional examples.

FIG. 2A shows the gate voltage of the transistor Tr1 from the output of the PWM output circuit 8. When the N3 winding output 1 is lower than a predetermined value, the transistor Tr1 is turned on.
The operation is performed such that the period (the period of H in this figure) is lengthened, and if it is higher than a predetermined value, the ON period of the transistor Tr1 is shortened.

While the transistor Tr1 is ON, a negative voltage is generated in the N3 winding, the diode D3 is non-conductive, and energy is not released through the N3 winding, and electromagnetic energy is stored in the primary inductance. I do. When the transistor Tr1 is turned off, a flyback pulse is generated in the N1 winding, and at the same time, the voltage waveform of the N3 winding is also inverted, and the energy stored in the primary inductance is discharged to the secondary side by conducting the diode D3. I do. The flyback pulse has a pulse width determined by the primary inductance, the resonance capacitor C2, and the winding capacitance.

The PWM output circuit 8 includes a transistor Tr1
Operate during the OFF period so that the flyback pulse width is constant. This is to eliminate switching loss by zero potential switching that turns on the transistor Tr1 when the voltage waveform is at the zero level. That is, a frequency control operation is performed in which the OFF period is constant and the pulse width of the ON period is varied.

FIG. 2B shows a drain current waveform of the transistor Tr1 (without a limiter). In (b), the first ON and the second ON are current waveforms in a state where the overcurrent limiter does not need to be applied, and the third ON has an overcurrent flowing to the load and the overcurrent limiter is applied. Each of the current waveforms in the required state is shown.

FIG. 2C shows the input 2 of the AND circuit 4,
The timing of this signal is shorter than the timing of the signal of (a) by t1 at the time of turn-on and t1 at the time of turn-off.
It is off by two. Because of this deviation, even if the comparator Q1 is turned on, that is, the input 1 of the AND circuit 4 becomes H, the output does not turn on because the input 2 is low (LOW: hereinafter, L).

That is, the limiter function does not function only at the time of turn-on / turn-off. This allows
It is possible to prevent the surge of the drain current at the time of turn-on / turn-off from causing the overcurrent limiter to malfunction. However, if the deviation width is too large, it is not necessary to apply the overcurrent limiter, so care must be taken in setting the deviation width.

The control of the timing shift width is performed by
This is performed by the delay circuits 1 and 2 shown in FIG. The shift width control and the shift width calculation can be easily performed because the CPU 14 owns the timing data necessary for the calculation.

FIG. 2D shows a state where the output of the AND circuit 4 becomes H due to the third overcurrent at the time of ON. Since the surge is not picked up by the current at the time of the first ON or the second ON, the output of the AND circuit 4 does not become H.

FIG. 2E shows a state where the drain current is limited by the signal of the AND circuit output (d).

Here, the operation of the conventional example is shown in FIG.
This will be described with reference to FIG. In the conventional example, the AND circuit 4
There is no. Therefore, when the comparator Q1 is turned on, an overcurrent limiter is immediately applied, and the output stops. (F) and (g) show a state in which the surge of the drain current causes the overcurrent limiter function to malfunction when the first transistor is turned on, and the latch-type output stop circuit 9 to operate.

With the above configuration and control, during the period in which the surge noise is generated, the AND circuit 4, that is, the overcurrent protection function switching means prevents the overcurrent protection function from functioning. The turning off of the transistor Tr1 can be prevented.

Since the CPU 14 itself knows the timing of the ON / OFF drive signal, the switching of the overcurrent protection function can be performed simply and reliably. That is, since it is not necessary to provide a separate circuit that picks up the timing of the on / off drive signal, it can be realized with a simple circuit configuration.

(Second Embodiment) FIG. 3 is a block diagram of a second embodiment. The same or corresponding parts as in the first embodiment are denoted by the same reference numerals, and redundant description will be omitted.

In the first embodiment, one PWM output circuit is provided, whereas in the second embodiment, two PWM output circuits 8 and 16 are provided. In the first embodiment, the AND circuit 4 is provided. The difference between the timing to the input 2 and the timing to the driver 3 is determined by inputting the same signal from the PWM output circuit 8 to the delay circuit 1 (15) and the delay circuit 2 (5). However, the second embodiment has a configuration in which the two PWM output circuits (8, 16) perform the operations independently.

The second embodiment has an advantage that a delay circuit is not required as compared with the first embodiment, but the load on the PWM control calculation circuit 13 increases.

(Third Embodiment) FIG. 10 is a block diagram of a third embodiment, in which the same or corresponding parts as those in the first embodiment are denoted by the same reference numerals, and redundant description will be omitted.

In the first embodiment, the resistor R1 is used for current detection, whereas in the third embodiment, a current transformer 17 is used. There is an advantage that the insulation in the driver circuit 3 becomes unnecessary. Then, as compared with the resistance detection of the first embodiment, the components are slightly larger, but when the switching frequency of the transistor Tr1 becomes higher, there is a problem that the influence of the surge due to the inductance component cannot be ignored in the resistance detection. However, such a problem does not occur in the configuration of the third embodiment.

(Fourth Embodiment) FIG. 5 is a block diagram of a fourth embodiment. The same or corresponding parts as those of the above-described embodiment are denoted by the same reference numerals, and redundant description will be omitted.

In the fourth embodiment, the CPU, R
Digital circuits such as OM, RAM, counter and A / D
An analog circuit such as a conversion circuit and the above-described overcurrent limiter function circuit are integrated on a single chip.

In FIG. 5, reference numeral 18 denotes a portion formed of the same chip. In this way, for example, while the sequence control of the copying machine, the printer, etc. is performed by the copying machine control microcomputer 19, the state is most adapted to the state. Power control can be performed.

For example, if the delay circuits 5 and 15 are constituted by programmable counters, PW may be changed depending on the load state.
Even when the optimum value to be output by the M output circuit 8 changes, the CPU 14 keeps track of the load state, so that the optimum value can be set in the programmable counter. Further, by switching the comparison voltage of the comparator Q1 between the stationary state and the stationary state, low power consumption can be achieved.

By integrating them on the same chip as described above, versatility is enhanced and more intelligent power supply control becomes possible.

(Fifth Embodiment) FIG. 6 is a circuit diagram of a fifth embodiment.

21 is an AC power supply, 22 is a rectifier diode,
23 is a smoothing capacitor, 24 is a drive transformer for the switching transistor 27, 25 is a drive circuit for the switching transistor 27, 26 is a transformer for transmitting energy to the loads 52 and 53, 27 is a switching transistor, 28 is a rectifier diode, and 29 is a smoothing capacitor. , 3
0 is a control circuit, 31, 35, and 38 are high-voltage capacitors, 32, 36, and 37 are high-voltage diodes, 33 is a current limiting resistor, 34 is a high-voltage control transistor, and 39 and 40.
Is a high-voltage output voltage detection resistor, 41, 42, 50, and 51 are reference voltage generation resistors, 43 and 49 are voltage comparators, 44 is a flip-flop, 45 and 54 are resistors, 46 is a capacitor,
47 is a diode, 48 is a current transformer, 52, 5
3 is a load.

When an AC voltage is applied, a pulse voltage is supplied from the control circuit 30 to the drive circuit 25 of the switching transistor 27 via the transformer 24, and the switching transistor 27 performs a switching operation and requires the loads 52 and 53. Energy is supplied to the loads 52 and 53 via the transformer 26.

The voltage supplied to the load 52 is controlled by the control circuit 30 to a voltage required by the load 52. Further, the voltage supplied to the load 53 is
3, 49, flip-flop 44, current transformer 4
8, diode 47, capacitor 46, resistors 39, 4
0, 41, 42, 45, 50, 51, 54 and the high-voltage control transistor 34.

The feature of this embodiment resides in a control circuit for controlling the high output voltage of the load 53.

In order to synchronize the on / off of the high voltage control transistor 34 for controlling the high voltage output voltage of the load 53 with the switching operation of the switching transistor 27, the current between the collector and the emitter of the switching transistor 27 is controlled by the current transformer 48. Is detected, the signal is converted into a voltage by a diode 47 and a capacitor 46, and the value is supplied to a voltage comparator 49.
Is used as the clock signal of the flip-flop 44, the detection output of the high-voltage output voltage of the voltage comparator 43 is used as the D terminal signal of the flip-flop 44,
4 Q terminal signal to turn on the high voltage control transistor 34,
An off signal is used to control the high output voltage.

According to the above configuration, if the high-voltage output voltage is controlled, the switching transistor 27 can be synchronized with the on / off state.
Since the high-voltage control transistor 34 can be turned on and off while the voltage between the collector and the emitter of the transistor No. 4 is zero, switching loss due to the on and off of the high-voltage control transistor 34 can be eliminated as before, Efficiency reduction and heat generation of the device can be eliminated.

As described above, according to the configuration of the present embodiment, high efficiency, high reliability, and downsizing of the power supply device can be realized. For example, in the conventional method, the T
Although the O-3 package was used, the control circuit of the present invention almost eliminated heat generation in the TO-220 package. Further, when the high voltage control transistor 34 is turned on,
Off loss is zero.

That is, the high-voltage control transistor for controlling the high-voltage output voltage can be turned on and off at a point where the voltage between the collector and the emitter of the high-voltage control transistor is zero. , And high reliability, high efficiency, and downsizing can be realized.

(Sixth Embodiment) FIG. 7 is a circuit diagram of a sixth embodiment, in which the same or corresponding parts as in the fifth embodiment are denoted by the same reference numerals.

That is, 21 is an AC power supply, 22 is a rectifier diode, 23 is a smoothing capacitor, 24 is a drive transformer for the switching transistor 27, 25 is a drive circuit for the switching transistor 27, and 26 is a transformer for transmitting energy to the loads 52 and 53. , 27 are switching transistors, 28 is a rectifier diode, 29 is a smoothing capacitor, 30 is a control circuit, 31, 35 and 38 are high voltage capacitors, 32, 36 and 37 are high voltage diodes, 33
Is a current limiting resistor, 34 is a high voltage control transistor, 3
Reference numerals 9 and 40 are high-voltage output voltage detection resistors, 41 and 42 are reference voltage generation resistors, 43 is a voltage comparator, 44 is a flip-flop, 54 is a resistor, 46 is a capacitor, 47 is a diode, and 52 and 53 are loads.

When an AC voltage is applied, a pulse voltage is supplied from the control circuit 30 to the drive circuit 25 of the switching transistor 27 via the transformer 24, and the switching transistor 27 performs a switching operation, so that the loads 52 and 53 are required. Energy is supplied to the loads 52 and 53 via the transformer 26.

The voltage supplied to the load 52 is controlled by the control circuit 30 to a voltage required by the load 52. Further, the voltage supplied to the load 53 is
3, a flip-flop 44, a diode 47, a capacitor 46, resistors 39, 40, 41, 42, 54, and a high-voltage control transistor 34.

The feature of this embodiment resides in a control circuit for controlling the high output voltage of the load 53.

That is, in order to synchronize the on / off of the high voltage control transistor 34 for controlling the high voltage output voltage of the load 53 with the switching operation of the switching transistor 27, the winding voltage from the low voltage output voltage winding is controlled. , The signal is converted into a DC voltage by a diode 47 and a capacitor 46, the value is used as a clock signal of a flip-flop 44, the detection output of the high voltage output voltage of the voltage comparator 43 is used as a D terminal signal of the flip-flop 44, The Q terminal signal of the loop 44 is supplied to the high voltage control transistor 34.
To control the high-voltage output voltage.

By controlling the high-voltage output voltage by the above configuration, the switching transistor 27 can be synchronized with the on and off states.
Since the high-voltage control transistor 34 can be turned on and off while the voltage between the collector and the emitter of the transistor No. 4 is zero, switching loss due to the on and off of the high-voltage control transistor 34 can be eliminated as before, Efficiency reduction and heat generation of the device can be eliminated. Thereby, high efficiency, high reliability, and downsizing of the power supply device can be realized.

(Seventh Embodiment) FIG. 8 is a circuit diagram of a seventh embodiment, in which the same or corresponding parts as in the fifth embodiment are denoted by the same reference numerals.

That is, 21 is an AC power supply, 22 is a rectifier diode, 23 is a smoothing capacitor, 24 is a driving transformer for the switching transistor 27, 25 is a driving circuit for the switching transistor 27, and 26 is a transformer for transmitting energy to the loads 52 and 53. , 27 are switching transistors, 28 is a rectifier diode, 29 is a smoothing capacitor, 30 is a control circuit, 31, 35 and 38 are high voltage capacitors, 32, 36 and 37 are high voltage diodes, 33
Is a current limiting resistor, 34 is a high voltage control transistor, 3
Reference numerals 9 and 40 are high-voltage output voltage detection resistors, and 53 and 53 are loads.

When an AC voltage is applied, a pulse voltage is supplied from the control circuit 30 to the drive circuit 25 of the switching transistor 27 via the transformer 24, and the switching transistor 27 performs a switching operation and requires the loads 52 and 53. Energy is supplied to the loads 52 and 53 via the transformer 26.

The voltage supplied to the load 52 is controlled by the control circuit 30 to a voltage required by the load 52. Similarly, the voltage supplied to the load 53 is also controlled by the control circuit 30 by transmitting ON / OFF signals to the high voltage control transistor 34.

The feature of this embodiment resides in a control circuit for controlling the high output voltage of the load 53.

In order to synchronize the on / off of the high voltage control transistor 34 for controlling the high voltage output voltage of the load 53 with the switching operation of the switching transistor 27, a microprocessor is used for the control circuit 30 and the high voltage output voltage is controlled. The value of the detection port and the timing of the switching pulse are compared inside the microprocessor, and synchronized with the switching pulse, the high-voltage control transistor 3 is adjusted according to the high-voltage output voltage detection port value.
4 is supplied with an on / off signal to control a high output voltage.

By controlling the high-voltage output voltage with the above configuration, the switching transistor 27 can be synchronized with the on / off state.
Since the high-voltage control transistor 34 can be turned on and off while the voltage between the collector and the emitter of the transistor No. 4 is zero, switching loss due to the on and off of the high-voltage control transistor 34 can be eliminated as before, Efficiency reduction and heat generation of the device can be eliminated. Thereby, high efficiency, high reliability, and downsizing of the power supply device can be realized.

(Eighth Embodiment) FIG. 9 is a block diagram of an eighth embodiment, and FIG. 10 is a schematic diagram of a peripheral structure of a transfer brush and a suction brush to which an output of this embodiment is supplied.

In FIG. 10, 1 is placed on the photosensitive drum 310.
The powder image formed by the next charging 311, the image exposure by the laser beam 312, and the developing process by the developing device 313 is transferred to the transfer paper 320 adsorbed on the transfer drum 314.

The transfer drum 314 is formed by winding a thin mylar film around a cylindrical frame.
The image forming portion in contact with 10 is formed of a film alone.

The suction brush 318 transfers the transfer paper 320 having passed through the transfer guide to the transfer drum 314 with electrostatic force.
Serves to adsorb to The transfer brush 317 serves to transfer the toner on the photosensitive drum 310 onto transfer paper by electrostatic force.

The outer static eliminator 316 is used to lower the absolute value of the voltage applied to the transfer brush 317 described later. Reference numeral 315 denotes an inner static eliminator.

The separation charger 319 carries out corona charging of AC + DC, thereby transferring the transfer paper 320 and the transfer drum 3.
It serves to completely eliminate the electrostatic attraction force between the 14.

The high-voltage power supply of this embodiment shown in FIG. 9 is for supplying power to the transfer brush 317 and the suction brush 318.

FIG. 11 is a timing chart showing the operation sequence of the charger and the charging brush around the transfer drum.

The transfer drum 314 has a circumference enough to vertically attach one sheet of A3 transfer paper. FIG. 11 shows a case where one A4 transfer sheet is copied.

When the transfer paper 320 is sent from the paper transport system, +15 μA is applied to the suction brush 318 in the constant current control mode.
Then, the transfer paper is sucked to the transfer drum.

A negative high voltage is applied to the inner static eliminator 315 to charge the inside of the transfer drum 314 to -6 kV. At the same time, a positive high voltage is applied to the outer static eliminator 316 to prevent the transfer paper from peeling.

When the transfer paper 320 is attracted to the transfer drum 314 and the inside of the transfer drum is charged to −6 kV, +10 μA is supplied to the transfer brush 317 in a constant current control mode, and the toner image from the photosensitive drum to the transfer paper is transferred. Is performed.

It goes without saying that the transfer process is repeated for each of the four colors of magenta, cyan, yellow and black. The transfer brush power supply voltage at this time remains almost -6 kV between papers as shown in FIG. 10B, but at the timing of transfer to the transfer paper, since the previous charge is held, about 2 kV for each color. Rise in steps.

When the transfer of the fourth color is completed, although not shown, a high voltage of AC + DC is applied to the separation charger 319,
The charge on the transfer paper and the transfer drum is removed by corona charging, and the transfer paper 320 is separated from the transfer drum 314.

As is apparent from the above description, the power supply for supplying power to the transfer brush 317 and the suction brush 318 must be a power supply of both positive and negative polarities.

In the eighth embodiment shown in FIG. 9, 320 is an oscillator, T2 is a step-up transformer, and its secondary winding NS
1, a positive output forward converter is formed by diodes D3 and D4 and an inductance L6, and a secondary winding NS
A negative output flyback converter 2 is constituted by a diode D5. Then, both converter outputs are connected in series.

The primary winding Np is connected to a transistor (FET) Q
7 and its ON / OFF and DUTY are subjected to PWM control by a pulse width (PWM) controller 321.
Here, assuming that PWM and DUTY are D, a voltage of Vin * (NS1 / NP) * D on the forward side is −Vin * (NS2 / NP) * {D / (1-D)} on the flyback side. Then, in the series connection, Vo = Vin * D / (1-D) * {(AB) -AD} where A = NS1 / NP B = NS2 / NP where A> B Thus, if A and B are selected, the positive and negative voltages can be continuously controlled by clearly controlling the value of D.

(Ninth Embodiment) FIG. 12 is a block diagram of a ninth embodiment, in which the same or corresponding parts as those in the eighth embodiment are denoted by the same reference numerals, and redundant description will be omitted.

In this embodiment, the duty of the oscillator 320 is operated at two specific values. That is, one is output Vo
Is selected to have a positive voltage, and the other is selected to have a value at which the output Vo has a negative voltage. The control circuit 322 controls the input voltage of the step-up transformer T2. By combining these two, a positive and negative power supply is realized.

(Tenth Embodiment) FIG. 13 is a block diagram of a tenth embodiment, in which the same or corresponding parts as those in the eighth and ninth embodiments are denoted by the same reference numerals, and redundant description will be omitted.

In the present embodiment, the inductance L6 of the secondary NS1 circuit is cut, and the forward side has a peak rectification configuration, so that the configuration is suitable for high voltage and low current.

With the configuration and control of the twelfth, thirteenth, and fourteenth embodiments, the number of transformers is smaller than that of the conventional bipolar high-voltage generation system in which a fixed output DC-DC converter and a variable output DC-DC converter are connected in series. Can be reduced from two to one. In addition, only one PWM controller can be realized.

Further, a constant current can be supplied automatically and stably with respect to all fluctuations of the resistance component and the voltage source component included on the load side.

Since the positive and negative DC-DC converters are switched by one PWM controller and one transformer, the operation of the positive and negative outputs is switched smoothly, and the output may be abnormal. Absent.

As described above, since each of the transformer and the PWM controller is constituted by one, it is possible to greatly reduce the cost and improve the reliability.

[0102]

As described above in detail in each embodiment,
According to the present invention, it is possible to provide a power supply device that can reliably control output and is suitable for an image forming apparatus such as a copying machine or a printer.

That is, by using a drive signal sent from the control means CPU to the switching element, a composite power supply free from malfunction of the overcurrent limiter can be realized with a simple circuit configuration.

[0104]

[0105]

[0106]

[Brief description of the drawings]

FIG. 1 is a block diagram of a first embodiment.

FIG. 2 is a timing chart of the first embodiment.

FIG. 3 is a block diagram of a second embodiment.

FIG. 4 is a block diagram of a third embodiment.

FIG. 5 is a block diagram of a fourth embodiment.

FIG. 6 is a circuit diagram of a fifth embodiment.

FIG. 7 is a circuit diagram of a sixth embodiment.

FIG. 8 is a circuit diagram of a seventh embodiment.

FIG. 9 is a block diagram of an eighth embodiment.

FIG. 10 is a schematic view showing a configuration around a transfer drum of a copying machine.

FIG. 11 is a timing chart of the eighth embodiment.

FIG. 12 is a block diagram of a ninth embodiment.

FIG. 13 is a block diagram of a tenth embodiment.

FIG. 14 is a circuit diagram of a conventional power supply device.

[Explanation of symbols]

 Reference Signs List 1 AC input voltage 4 AND circuit (AND circuit) 5, 15 delay circuit 6 oscillation circuit 9 latch-type output stop circuit 14 central processing unit (CPU) C delay signal Q1 comparator R1 overcurrent detection resistor T1 converter transformer Tr1 Switching transistor

────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Satoshi Saito 3-30-2 Shimomaruko, Ota-ku, Tokyo Inside Canon Inc. (56) References JP-A-5-30734 (JP, A) JP-A-4 -312351 (JP, A) JP-A-4-46560 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H02M 3/28 G05F 1/10

Claims (7)

(57) [Claims] An output voltage of a secondary side of a converter transformer is determined.
It has a voltage detecting means for detecting, based on the detected voltage
ON / OFF of the primary side switching element by the pulse width modulation signal
By controlling off , one of the converter transformers
A next-side power supply device that controls the excitation period, the first pulse width modulation signal to be output to the switching element
A first pulse width modulation signal generating means for generating a signal, and a time delay of time t1 with respect to the first pulse width modulation signal.
Turn on at the moment
A second pulse for generating a second pulse width modulation signal to be turned off
Width modulation signal generating means, current detecting means for detecting a current of the switching element, comparing means for comparing a value detected by the current detecting means with a designated value, and a value detected by the current detecting means being the designated value Greater than
Generated by the second pulse width modulation signal generating means.
Turns on when the generated second pulse width modulation signal is on.
That a stop signal output means for outputting a stop signal, the power supply apparatus characterized by comprising a overcurrent protection device that turns off the switching element when turned on of the stop signal. 2. The power supply device according to claim 1, wherein the current detection means for detecting the current of the switching element is constituted by a resistor. 3. The power supply device according to claim 1, wherein the current detection means for detecting the current of the switching element is constituted by a current transformer. 4. The first pulse width modulation signal generating means,
A reference pulse width modulation that generates a reference pulse width modulation signal
Tuning signal generating means, and the reference pulse width modulation signal.
Delaying to generate the first pulse width modulation signal
Comprising a Nobete stage, the second pulse width modulation signal generating means, the said reference
The second pulse width modulation is performed by delaying the pulse width modulation signal.
Claims 1 and generates a tone signal of 3
The power supply according to any one of the above. 5. The apparatus according to claim 5, further comprising :
A pulse width modulation signal serving as the reference based on the applied voltage
Wherein the timing of turn-on / turn-off calculated
Pulse width modulation set in the reference pulse width modulation signal generator
The power supply device according to claim 4, further comprising a control calculation circuit . 6. The power supply device according to any one of 5 claims 1, characterized in that formed on the same chip. 7. Further, the voltage is detected by said voltage detecting means.
The first and second pulse width modulation signals based on the applied voltage.
Before calculating the turn-on / turn-off timing of the issue
The parameters to be set in the first and second pulse width modulation signal generating means.
Claim 1 Symbol placement of the power supply characterized by comprising a pulse width modulation control calculation circuit.