JP3088767B2 - Dot clock frequency detection circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dot clock frequency detecting circuit used in a video signal converter or a video receiver for detecting the frequency of a basic clock, that is, a dot clock of an arbitrary input video signal.

[0002]

2. Description of the Related Art FIG. 3 is a block diagram of a conventional dot clock frequency detection circuit. In the figure, 2 is a pulse converter,
5 is a gate circuit, 4 is a reference pulse oscillator, 10 is a gate control circuit, 6 is a measurement counter, and 9 is a calculator. FIG. 4 is an input waveform diagram of the circuit of FIG. In FIG. 3, an input signal like a waveform v in FIG. 4 is converted into a pulsed signal shown in a waveform p in FIG. Also, the gate control circuit 10
Supplies a gate signal to the gate circuit 5 to open the gate for N clocks of a fixed period T output from the reference pulse oscillator 4 to the gate circuit 5 and a reset signal to the measurement counter 6 every time the gate signal is output. Gate circuit 5
Outputs the input signal p pulsed by the pulse converter 2 to the measurement counter 6 during the period t _{2 of the} gate signal supplied from the gate control circuit 10, and the measurement counter 6 counts the number of pulses passing through the gate circuit 5. And output it to the calculator 9,
The arithmetic unit 9 calculates the dot clock frequency f to be obtained by the following (1)
Calculate and output according to the formula. f = 1 / t ₂ = n / NT (1) where n is the number of pulses counted by the measurement counter 6 and N is the clock from the reference pulse oscillator 4 counted by the gate control circuit 10. And T is the cycle of the output clock of the reference pulse oscillator 4.

[0003]

However, in the above-mentioned prior art, the input video signal is not constant in pulse width and interval as shown by a waveform a in FIG. In the case of a signal having a burst period due to a signal, the dot clock frequency f obtained from the output of the arithmetic unit 9 has a burst portion, so that the number of pulses counted by the measurement counter 6 decreases, and the gate time N ×
Even if T is shortened, the pulse width and interval of the video signal are not constant, and it is not known which part of the video signal was measured, so the number of pulses counted by the measurement counter 6 is also reduced, and the frequency obtained from the output of the arithmetic circuit 9 The value of f is the actual value (f ₁
= 1 / t ₁ ), and an accurate value cannot be obtained. An object of the present invention is to accurately detect a dot clock frequency of an arbitrary video signal.

[0004]

A dot clock frequency detection circuit according to the present invention extracts a dot portion of a video signal, repeatedly measures a reference pulse in a dot period, and obtains an average of the reference pulse. , Which is characterized in that an accurate frequency is obtained. That is, an arbitrary one scanning line of the input video signal is designated by the horizontal scanning line designation counter 1, and an arbitrary dot period within one scanning line designated by the horizontal scanning line designation counter 1 is designated by the dot period designation counter 3. The number of reference pulses in the designated one dot period is repeatedly measured by the measurement counter 6, the average value is calculated by the calculator 9, and a value substantially close to the frequency of the dot clock is detected. It is characterized by the following.

[0005]

FIG. 1 is a block diagram showing an embodiment of the present invention. Fig. 2 is a waveform diagram of signals at various parts in Fig. 1, in which the time axis is reduced by waveforms d '-> d "and waveforms e-> g. In Figs. A horizontal scanning line designation counter for inputting horizontal scanning line designation data and a horizontal synchronization signal d of an input video signal with a signal g as a trigger and outputting a horizontal scanning period pulse e indicating a designated one horizontal scanning line period. Reference numeral 2 denotes a pulse converter that receives an input video signal a and outputs a pulsed video signal b.3 receives a pulsed video signal b from the pulse converter 2 and performs a horizontal scanning period A dot period designation counter which opens the gate only during the input of the pulse e and outputs a dot period pulse c indicating the interval between dots designated by the dot period designation data 4. Reference numeral 4 denotes an estimated clock frequency of the input video signal a. A reference pulse oscillator for outputting a reference pulse s in a constant period T of several times the frequency.
Reference numeral 5 denotes a gate circuit that opens the gate of the reference pulse s from the reference pulse oscillator 4 and passes the reference pulse s only while the dot period pulse c from the dot period designation counter 3 is being input. Reference numeral 6 denotes a measurement counter that counts the number of reference pulses s that have passed through the gate circuit 5. Reference numeral 7 denotes a measurement frequency setting counter that receives the vertical synchronization signal g, counts the number of pulses of the vertical synchronization signal for the number of times specified by the measurement frequency setting data, and outputs a measurement period pulse h. Reference numeral 8 denotes an adder which receives measurement data output from the measurement counter 6 and adds the measurement data only while the measurement period pulse h output from the measurement frequency setting counter 7 is being input.
Reference numeral 9 designates an input value of the addition data output from the adder 8 and the data for setting the number of times of measurement, divides the added data by the number of times of measurement, obtains an average value, and calculates the dot clock frequency of the input video signal in consideration of the period of the reference pulse. This is a computing unit that extracts the pulse output shown.

According to the present invention, an arbitrary one scanning line of the input video signal is selected, one dot interval in the scanning line is designated, and a reference pulse having a period T is counted by the measurement counter 6 during that period. The measurement data n is input to the adder 8, and the number of times (m times) specified by the data for setting the number of times of measurement is added.
The arithmetic unit 9 performs the calculation of f = m / nT to detect the frequency f of the dot clock to be obtained.

The frequency of the reference pulse s is the clock frequency of the input video signal, for example, about 10 MHz to 50 MHz.
The value is selected from 4 to 16 times the estimated value within the range of z, and is set from the viewpoint of accuracy and economy along with the number of measurements.

[0008]

As described above, according to the present invention, a reference pulse at a designated dot interval in any one scanning line of an input video signal is measured and averaged over a plurality of dots, thereby obtaining a burst-like signal. Since it is possible to detect the frequency of the basic clock of the video signal, i.e., the dot clock, in which the pulse interval is not constant, it is possible to detect a video signal whose dot clock is unknown and generate a sampling clock for image processing, and In the case of measurement, there is a particularly great effect in practical use.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention.

FIG. 2 is a waveform chart for explaining the operation of the present invention.

FIG. 3 is a block diagram showing a conventional configuration example.

FIG. 4 is a waveform diagram for explaining a conventional operation.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Horizontal scanning line designation counter 2 Pulse converter 3 Dot period designation counter 4 Reference pulse oscillator 5 Gate circuit 6 Measurement counter 7 Measurement count setting counter 8 Adder 9 Arithmetic unit 10 Gate control circuit

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G09G 5/12 G09G 5/18

Claims (1)

(57) [Claims] In order to detect a dot clock frequency of an input video signal, an arbitrary scan line is designated by horizontal scan line designation data using a horizontal synchronization signal of the input video signal as an input and a vertical synchronization signal as a trigger. A horizontal scanning line designation counter for outputting a horizontal scanning period pulse, and a dot period designation data by opening a gate only during a period in which the input video signal is pulsed and the horizontal scanning period pulse is being inputted. A dot period designation counter that outputs a dot period pulse designated by: a reference pulse oscillator that outputs a reference pulse having a frequency higher than the dot clock frequency of the input video signal;
A gate circuit that passes the reference pulse only during the period in which the dot period pulse is input, a measurement counter that counts the number of pulses that have passed through the gate circuit and outputs it as measurement data, and a vertical synchronization signal of the input video signal. A counter for setting the number of times of counting the number of pulses of the vertical synchronization signal as an input and outputting a measuring period pulse indicating a measuring period by counting the pulses of the vertical synchronization signal, and measuring data from the measuring counter in the measuring period An adder that adds the period during which the pulse is input and outputs the data as addition data, and an arithmetic unit that outputs a signal indicating the dot clock frequency to obtain the addition data from the adder and the measurement count setting data as inputs. Dot clock frequency detection circuit provided with