JPH054688U - Dot clock frequency detection circuit - Google Patents

Abstract

(57) [Abstract] [Purpose] To provide a detection circuit capable of inputting a video signal to automatically obtain optimum designated data and accurately detecting the dot clock frequency. [Structure] A counter for measuring the position of the minimum pulse interval, a register for recording the measured data, and means for repeatedly measuring using a dot period designated by the data are provided.

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 The present invention relates to a dot clock frequency detecting circuit used in a video signal converting device, a video receiving device, or the like, and relates to a circuit for detecting a basic clock of an arbitrary input video signal, that is, a dot clock frequency.

[0002]

[Prior Art]

 When generating a sampling clock for performing image processing by receiving a video signal of which the dot clock frequency is unknown, it is necessary to detect the dot clock frequency, and a dot clock frequency detection circuit for that purpose is used.

A conventional dot clock frequency detection circuit has a configuration as shown in FIG. That is, the horizontal scanning line designating data and the horizontal synchronizing signal d of the input video signal are input, and the vertical synchronizing signal g of the input video signal is used as the trigger signal to set the period of one designated horizontal scanning line. The horizontal scanning line designation counter 1 for outputting the horizontal scanning line period pulse e shown, the pulse converter 2 for inputting the input video signal a and outputting the pulsed video signal b, and the pulsed video It is provided with a dot period designating counter 3 which receives a signal b, opens a gate only while a horizontal scanning period e is being inputted, and outputs a dot period pulse c indicating a dot period designated by the dot period designating data. There is.

Further, a reference pulse oscillator 4 that outputs a reference pulse s having a constant period T and a frequency that is several times the estimated clock frequency of the input video signal a, and a dot period pulse c from the dot period specifying counter 3 A gate circuit 5 that opens the gate only while is input, and passes the reference pulse s from the reference pulse oscillator 4, and a measurement counter 6 that counts the number of reference pulses s that have passed through this gate circuit 5, A counter 7 for setting the number of times of measurement is provided, which inputs the vertical synchronizing signal g, counts the number of pulses of the vertical synchronizing signal g by the number of times specified by the data for setting the number of times of measurement, and outputs the pulse h for the measurement period.

Further, an adder 8 that receives the measurement data output from the measurement counter 6 and adds the measurement data only while the measurement period pulse h output from the measurement number setting counter 7 is input, The addition data output from the adder 8 and the measurement number setting data are input, the addition data is divided by the measurement number to obtain an average value, and the period T of the reference pulse s is added to obtain the input video signal It is provided with an arithmetic unit 9 which outputs a pulse output representing the dot clock frequency.

In the conventional dot clock frequency detection circuit having such a configuration, an arbitrary portion of the video signal is taken out, the reference pulse s in the dot period is repeatedly measured, and an average value thereof is obtained to obtain an arbitrary value. I try to get the exact frequency of the dot clock of the video signal. That is, the horizontal scanning line designating counter 1 designates an arbitrary scanning line of an input video signal, and the dot period designating counter 3 designates an arbitrary dot period in the designated 1 scanning line. The number of reference pulses s in one dot period was repeatedly measured by the measurement counter 6 and the average value thereof was calculated by the calculator 9 to detect a value almost close to the frequency of the dot clock.

That is, in the conventional dot clock frequency detection circuit, an arbitrary one scanning line of the input video signal is selected, one dot interval in the scanning line is designated, and the measurement counter 6 is used as a reference for the period T for that period. The number of pulses is counted, the measured data n is input to the adder 8, the number of times of measurement (m times) is added, and the calculator 9 calculates f = m / nT to obtain the frequency f of the dot clock. It is the one.

It should be noted that the frequency of the reference pulse s is selected to be 4 to 16 times the clock frequency of the input video signal, for example, an estimated value within the range of 100 MHz to 50 MHz, and is set in consideration of the number of measurements and the accuracy and economical efficiency. It

[0009]

[Problems to be solved by the device]

 However, in the configuration of FIG. 3, when determining the horizontal scanning line designation data to be input to the horizontal scanning line designation counter 1, it is necessary to check an appropriate horizontal scanning line using an oscilloscope or the like, so the data is determined. There is a drawback that it is time consuming and error-prone, and the dot period designation data must be examined in the same way, so there was a similar drawback.

Therefore, an object of the present invention is to provide a dot clock frequency detection circuit which can input a video signal to automatically obtain optimum designated data and thereby accurately detect a dot clock frequency. It is in.

[0011]

[Means for Solving the Problems]

 The dot clock frequency detection circuit according to the present invention is provided with means for automatically extracting the minimum dot period of a pulsed video signal, and repeatedly measuring the extracted minimum dot period with a reference pulse to obtain an arbitrary video. It is characterized by obtaining an accurate frequency of the signal dot clock. That is, in the present invention, the position of the minimum pulse interval is measured by using a counter, the data is recorded in a register, and the dot period designated by the data is repeatedly measured by using a reference pulse. It is characterized in that the frequency of is calculated.

[0012]

【Example】

 FIG. 1 is a block diagram showing an embodiment of a dot clock frequency detection circuit according to the present invention. 2 is a waveform diagram of the signal of each part of FIG. 1, in which the time axis is reduced by the waveform d ′ → d ″ and the waveform e → g. In FIG. 1, in addition to the configuration of FIG. The counters 10, 11 and 12, the minimum value register 13, the comparator 14 and the registers 15 and 16 are added.

The counter 10 receives the horizontal synchronizing signal d and the pulsed video signal b output from the pulse converter 2, and determines the position of the pulsed video signal from the horizontal synchronizing signal. Is a counter for measuring. The counter 11 is a counter that inputs the vertical synchronizing signal g and the horizontal synchronizing signal d and measures the position of each horizontal synchronizing signal d from the vertical synchronizing signal. The counter 12 is a counter for measuring the pulse interval (t _{1 in} FIG. 2B) of the pulsed video signal b with the reset signal b as the reset signal for the pulsed video signal. The minimum value register 13 has a function of holding the minimum value of the counter 12 at the initial value (FFFF) _H. The comparator 14 has a function of comparing the value of the minimum value register 13 with the current count value of the counter 12, and the register 15 has a function of horizontal scanning in which a pulsed video signal having a minimum pulse interval exists. It has the function of keeping the line number from the vertical sync signal. Further, the register 16 has a function of holding the position of the pulsed video signal having the minimum pulse interval from the horizontal synchronizing signal.

To further explain the operation of the configuration of FIG. 1, the pulsed video signal b output from the pulse converter 2 and the reference pulse s output from the reference pulse oscillator 4 are input to the counter 12, Each pulse interval of the video signal b is measured by the reference pulse s, and the comparator 14 compares it with the value held in the minimum value register 13. When the value of the counter 12 is small, the value is stored in the minimum value register. 13 is input. On the other hand, the counter 10 measures the position of the pulse of the video signal b input to the counter 12 on the horizontal scanning line, and the counter 11 measures the position of the horizontal scanning line from the vertical synchronizing signal g. When the comparator 14 determines that the value of the counter 12 is smaller than the value of the minimum value register 13, the values of the counters 10 and 11 are recorded in the registers 15 and 16, respectively. The register 15 is configured to output as horizontal scanning line data as dot period designation data.

[0015]

[Effect of the device]

 As is apparent from the above description, according to the present invention, the burst shape is obtained by measuring and averaging the dots of the reference pulse at the specified dot interval in any one scanning line of the input video signal. Since the basic clock of the video signal whose pulse interval is not constant, that is, the frequency of the dot clock can be detected, a sampling clock for receiving the video signal of which the dot clock is unknown and performing image processing is generated. In this case and the dot clock measurement, the operation becomes easy, which is extremely effective in practice.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a dot clock frequency detection circuit according to the present invention.

FIG. 2 is a waveform diagram for explaining the operation of the circuit of FIG.

FIG. 3 is a block diagram showing a configuration of a conventional dot clock frequency detection circuit.

[Explanation of symbols]

 1 horizontal scanning line designation counter 2 pulse converter 3 dot period designation counter 4 reference pulse oscillator 5 gate circuit 6 measurement counter 7 measurement number setting counter 8 adder 9 calculator 10-12 counter 13 minimum value register 14 comparator 15, 16 registers

Claims (1)

Claims for utility model registration: Claim 1. The position of the minimum pulse interval of a pulsed video signal in one horizontal scanning line with a pulsed video signal, a horizontal synchronization signal and a vertical synchronization signal as input. And a means for recording the measurement data, and a means for repeatedly measuring the dot period designated by the measurement data by using a reference pulse.