JP3088179B2 - Manufacturing method of multilayer thin film capacitor - Google Patents

Manufacturing method of multilayer thin film capacitor

Info

Publication number
JP3088179B2
JP3088179B2 JP5986192A JP5986192A JP3088179B2 JP 3088179 B2 JP3088179 B2 JP 3088179B2 JP 5986192 A JP5986192 A JP 5986192A JP 5986192 A JP5986192 A JP 5986192A JP 3088179 B2 JP3088179 B2 JP 3088179B2
Authority
JP
Japan
Prior art keywords
thin film
forming
film capacitor
multilayer thin
plasma
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP5986192A
Other languages
Japanese (ja)
Other versions
JPH05267091A (en
Inventor
淳 勝部
祐助 高田
善一 吉田
初彦 柴崎
久雄 松浦
幹夫 羽賀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP5986192A priority Critical patent/JP3088179B2/en
Publication of JPH05267091A publication Critical patent/JPH05267091A/en
Application granted granted Critical
Publication of JP3088179B2 publication Critical patent/JP3088179B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/30Stacked capacitors

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、有機誘電体薄膜を用い
た積層薄膜コンデンサの製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multilayer thin film capacitor using an organic dielectric thin film.

【0002】[0002]

【従来の技術】近年、電子機器の小型・軽量化により、
電子部品の表面高密度実装化の進展はめざましく、電子
部品に対するチップ化、小型化の要望が強くなってい
る。その中にあってコンデンサにおいても小型化への種
々の取り組みが行われ、その中の一つとして有機誘電体
薄膜を用いた積層薄膜コンデンサが検討されている。
2. Description of the Related Art In recent years, as electronic devices have become smaller and lighter,
2. Description of the Related Art There has been remarkable progress in mounting electronic components on the surface at high density, and there has been a strong demand for electronic components to be formed into chips and miniaturized. Among them, various approaches to miniaturization of capacitors have been made, and as one of them, a multilayer thin film capacitor using an organic dielectric thin film has been studied.

【0003】図3に積層薄膜コンデンサの内部構造を示
す。図において、11は基板であって、この基板11上
に薄膜電極12と有機誘電体薄膜13とが交互に形成さ
れ、片面が保護膜14で保護され、両側に外部電極15
が設けられている。
FIG. 3 shows the internal structure of a multilayer thin film capacitor. In the figure, reference numeral 11 denotes a substrate, on which thin film electrodes 12 and organic dielectric thin films 13 are alternately formed, one surface of which is protected by a protective film 14, and external electrodes 15 on both sides.
Is provided.

【0004】このような積層薄膜コンデンサの素子部の
形成は、真空槽内で薄膜電極12と有機誘電体薄膜13
とを交互に積層して得られる。パタ−ン形成には板状固
定マスクを使用して、図3に示す素子構造を得る。有機
薄膜の形成手段としては蒸着などがあり、電極の形成は
電子ビ−ム法、スパッタリングなどを用い金属を蒸着し
て行う。このようにして製造した積層薄膜コンデンサの
素子は耐環境性、特に耐湿性を高めるために保護膜14
による封止を行い、外部電極15を設けて積層薄膜コン
デンサとして完成する。
The element portion of such a multilayer thin film capacitor is formed by forming a thin film electrode 12 and an organic dielectric thin film 13 in a vacuum chamber.
Are alternately laminated. An element structure shown in FIG. 3 is obtained by using a plate-shaped fixing mask for pattern formation. Means for forming an organic thin film include vapor deposition and the like, and formation of an electrode is performed by vapor deposition of a metal using an electron beam method, sputtering, or the like. The element of the multilayer thin film capacitor manufactured in this manner is provided with a protective film 14 for improving environmental resistance, particularly, moisture resistance.
And the external electrodes 15 are provided to complete the multilayer thin film capacitor.

【0005】以下に従来の積層薄膜コンデンサの製造方
法について説明する。図4は従来の積層薄膜コンデンサ
の素子部の形成装置の概略図を示したものである。この
図4において、16は薄膜電極形成室で、17は誘電体
薄膜形成室であって、これらの形成室16,17は、真
空ポンプ18で空気が抜かれている。薄膜電極形成室1
6と誘電体薄膜形成室17の上部に板状固定マスク19
が設けられており、この板状固定マスク19の上部に基
板搬送テ−ブル20を備え、基板11が搬送されるよう
に構成されている。なお、21はシャッタ−、22は仕
切り板である。
Hereinafter, a method for manufacturing a conventional multilayer thin film capacitor will be described. FIG. 4 is a schematic view of a conventional device for forming an element portion of a multilayer thin film capacitor. In FIG. 4, reference numeral 16 denotes a thin-film electrode forming chamber, and 17 denotes a dielectric thin-film forming chamber. These forming chambers 16 and 17 are evacuated by a vacuum pump 18. Thin-film electrode formation chamber 1
6 and a plate-shaped fixing mask 19 on the upper part of the dielectric thin film forming chamber 17.
A substrate transport table 20 is provided above the plate-shaped fixed mask 19 so that the substrate 11 is transported. In addition, 21 is a shutter, and 22 is a partition plate.

【0006】以上の形成装置を用いて積層薄膜コンデン
サを製造する場合は、それぞれの形成室16,17は、
真空ポンプ18により排気される。この形成室16,1
7に導入された基板11は、基板搬送テ−ブル20に素
子形成面を下向きに取りつけらて搬送される。素子の形
成は、薄膜電極12を板状固定マスク19により所定の
パタ−ンに形成したのち、仕切り板22で仕切られた有
機誘電体薄膜形成室17に搬入され、誘電体薄膜13を
同じく板状固定マスク19により所定のパタ−ンに形成
する。なお、膜厚はシャッタ−21の開閉によって所定
の膜厚に制御される。以上の工程を所定の積層数くり返
して素子部を完成する。
When a multilayer thin film capacitor is manufactured using the above forming apparatus, the forming chambers 16 and 17 are
The gas is exhausted by the vacuum pump 18. This forming chamber 16, 1
The substrate 11 introduced in 7 is conveyed with the element forming surface attached to the substrate conveying table 20 facing downward. The element is formed by forming the thin-film electrode 12 in a predetermined pattern using a plate-shaped fixing mask 19, and then carrying the thin-film electrode 12 into an organic dielectric thin-film forming chamber 17 partitioned by a partition plate 22, and disposing the dielectric thin film 13 in the same manner. A predetermined pattern is formed by the shape fixing mask 19. The thickness is controlled to a predetermined thickness by opening and closing the shutter 21. The above steps are repeated a predetermined number of times to complete the element portion.

【0007】[0007]

【発明が解決しようとする課題】しかしながら上記構成
の積層薄膜コンデンサを上記の工程で製造する際に、特
性と生産性の両面で大きな問題が生じていた。
However, when manufacturing the laminated thin-film capacitor having the above-mentioned structure in the above-mentioned steps, there have been serious problems in both characteristics and productivity.

【0008】まず、特性面については、板状固定マスク
19の間隙からの有機材料の漏れによって、コンデンサ
素子のパターン外の不必要な場所にモノマー成分や不完
全重合成分や誘電体成分そのものが付着し、保護膜の付
着力を低下させ封止性が劣化するという問題があった。
First, regarding a characteristic surface, a monomer component, an incompletely polymerized component, or a dielectric component itself adheres to unnecessary places outside the pattern of the capacitor element due to leakage of the organic material from the gap of the plate-shaped fixed mask 19. However, there has been a problem that the adhesion of the protective film is reduced and the sealing property is deteriorated.

【0009】必要パターン以外の場所へのモノマー成分
や不完全重合物や誘電体成分そのものの付着は、特に熱
分解重合または蒸着重合を用いた場合に顕著にあらわ
れ、主に基板11を形成室16,17へ搬送する時に発
生する。これは連続成膜を行うため、蒸発源をシャッタ
ー21で開閉する構造を取らざる得ないので、遊離した
有機物が形成室16,17に存在し、基板11に付着し
てしまうためである。またパターン形成は、より効率よ
く連続成膜するためには、板状固定マスク19を用いる
ことがもっとも有効であるが、板状固定マスク19で
は、基板11との微小な間隙から上記成分が漏れるた
め、どの成膜方式を用いてもパターン以外の場所に上記
成分が付着してしまう。
The adhesion of the monomer component, the incompletely polymerized product, or the dielectric component itself to places other than the required pattern appears remarkably especially when thermal decomposition polymerization or vapor deposition polymerization is used. , 17 are conveyed. This is because a structure in which the evaporation source is opened and closed by the shutter 21 is inevitable for performing the continuous film formation, so that the released organic substances are present in the formation chambers 16 and 17 and adhere to the substrate 11. In order to more efficiently form a continuous film, it is most effective to use the plate-shaped fixed mask 19, but in the plate-shaped fixed mask 19, the above components leak from a minute gap with the substrate 11. Therefore, no matter which film formation method is used, the above-mentioned components adhere to places other than the pattern.

【0010】このような特性上の問題については特願平
2−307453号に示すように有機誘電体薄膜をパタ
ーン成膜したあとに基板全面にプラズマ照射を行うこと
によって特性劣化を防ぐことができるようになった。
[0010] With respect to such a problem on characteristics, as described in Japanese Patent Application No. 2-307453, deterioration of characteristics can be prevented by performing plasma irradiation on the entire surface of the substrate after patterning an organic dielectric thin film. It became so.

【0011】一方、生産性の問題については、上述した
ようにプラズマ照射という新たな工程が付加されたた
め、板状固定マスク19を使って積層薄膜コンデンサ素
子部を形成する場合、薄膜電極12を形成する工程、有
機誘電体薄膜13を形成する工程、プラズマを照射する
工程の三つの工程を一連の工程として必要な積層数まで
くり返さなければならず、積層数が多くなるにしたがっ
て、生産性が低下してしまうという大きな問題が新たに
生じていた。
On the other hand, regarding the problem of productivity, since a new step of plasma irradiation is added as described above, when the laminated thin film capacitor element portion is formed using the plate-shaped fixed mask 19, the thin film electrode 12 is formed. , The step of forming the organic dielectric thin film 13, and the step of irradiating plasma must be repeated as a series of steps to the required number of layers. As the number of layers increases, the productivity increases. A new major problem of lowering has arisen.

【0012】フィルムの連続蒸着機などでは蒸着工程と
グロー放電処理工程の二工程が同一真空槽内に組み込ま
れているものが従来から知られているが、上述の三つの
工程を所定の回数までくり返して積層を行う方法につい
ては考えられていない。
[0012] In a continuous film deposition machine or the like, it is conventionally known that two steps of a vapor deposition step and a glow discharge treatment step are incorporated in the same vacuum chamber, but the above three steps are repeated up to a predetermined number of times. No method of repeating lamination has been considered.

【0013】本発明は積層薄膜コンデンサ素子部を形成
する一連の工程の処理能力を向上させる方法を提供する
ことを目的とする。
An object of the present invention is to provide a method for improving the processing capability of a series of steps for forming a multilayer thin film capacitor element portion.

【0014】[0014]

【課題を解決するための手段】上記の目的を達成するた
めに本発明の積層薄膜コンデンサの製造方法は、薄膜電
極をパターン形成する工程と、有機誘電体薄膜をパター
ン形成する工程と、基板全面へプラズマを照射する工程
とを同一圧力下でかつ同一真空槽内で行い、さらにこれ
らの工程をくり返す構成となっている。
In order to achieve the above object, a method of manufacturing a multilayer thin film capacitor according to the present invention comprises a step of forming a pattern of a thin film electrode, a step of forming a pattern of an organic dielectric thin film, and the steps of: And a step of irradiating the plasma with the same pressure in the same vacuum chamber, and these steps are repeated.

【0015】特にプラズマ照射法としてマイクロ波プラ
ズマを利用している。
In particular, microwave plasma is used as a plasma irradiation method.

【0016】[0016]

【作用】従来の課題を解決するために積層薄膜コンデン
サの形成方法においては、薄膜電極の形成工程と誘電体
薄膜の形成工程に加えてプラズマ処理工程の3つの工程
それぞれに独立した真空槽を設けていた。よって各槽間
で真空度が異なると真空度を保つための仕切り板が設け
られ、素子の移動にはその仕切り板の開閉と圧力調整が
必要となっていた。つまりこのような素子形成方法では
例えば他の工程に比べて処理圧力の高い工程はいったん
圧力を低くして素子を投入したのち圧力を高くして処理
を行い、再び真空槽の圧力を低くして処理後の素子を取
り出す必要がある。このような形成法を行うと1層当た
りの所要時間が長く、多層化を行う場合、生産性を著し
く低下させてしまう。ところが本発明では工程間の操作
圧力が等しいため、素子の工程間の移動に際して、真空
槽間の仕切り板の開閉やバルブなどによる圧力の調整が
不必要となるばかりでなく、同一真空槽内での連続的な
処理が可能となり生産性が大幅に向上する。さらに同軸
管を使用したマイクロ波プラズマ照射は操作圧力が低
く、電子ビ−ム法、蒸着重合法等の低圧力の工程との差
圧が小さいためこれらの形成方法に対して有効である。
In order to solve the conventional problems, in a method of forming a multilayer thin film capacitor, independent vacuum chambers are provided in each of three steps of a plasma processing step in addition to a step of forming a thin film electrode and a step of forming a dielectric thin film. I was Therefore, when the degree of vacuum is different between the tanks, a partition plate for maintaining the degree of vacuum is provided, and the movement of the element requires opening and closing of the partition plate and pressure adjustment. In other words, in such a device forming method, for example, in a process having a high processing pressure compared to other processes, the process is performed by lowering the pressure once and then charging the device, then performing the process by increasing the pressure, and lowering the pressure in the vacuum chamber again. It is necessary to take out the element after processing. When such a forming method is used, the time required for one layer is long, and in the case of multi-layering, productivity is significantly reduced. However, in the present invention, since the operating pressures between the processes are equal, not only is the opening and closing of the partition plate between the vacuum tanks and the adjustment of the pressure by a valve or the like unnecessary when moving the element between the processes, but also in the same vacuum tank. Can be continuously processed, and productivity is greatly improved. Further, microwave plasma irradiation using a coaxial tube is effective for these forming methods because the operating pressure is low and the pressure difference from low pressure steps such as electron beam method and vapor deposition polymerization method is small.

【0017】[0017]

【実施例】【Example】

(実施例)以下、本発明の実施例について図1を参照し
ながら説明する。
(Embodiment) An embodiment of the present invention will be described below with reference to FIG.

【0018】図1は、本発明の三工程を同一真空槽内に
組み込んだ装置の概略断面図である。図1において、1
は薄膜電極形成室であって、電子ビーム蒸着法を使用し
たAlの薄膜電極を板状固定マスク2でパターン形成す
る部屋である。3は誘電体薄膜形成室であって、蒸着重
合法を使用した芳香族ポリユリア誘電体薄膜を板状固定
マスク2でパターン形成する部屋である。4は同軸管方
式のマイクロ波放電を使用したプラズマ処理室である。
これらの部屋は3つの真空ポンプ5により圧力5×10
-2Paまで排気される。
FIG. 1 is a schematic sectional view of an apparatus in which the three steps of the present invention are incorporated in the same vacuum chamber. In FIG. 1, 1
Is a thin-film electrode forming chamber in which an Al thin-film electrode using an electron beam evaporation method is patterned using the plate-shaped fixed mask 2. Reference numeral 3 denotes a dielectric thin film forming chamber in which an aromatic polyurea dielectric thin film formed by vapor deposition polymerization is patterned by the plate-shaped fixed mask 2. Reference numeral 4 denotes a plasma processing chamber using a coaxial tube type microwave discharge.
These chambers were pressured 5 × 10 by three vacuum pumps 5
It is exhausted to -2 Pa.

【0019】上記、真空槽に導入された基板6は、基板
搬送テ−ブル7に素子形成面を下向きにして取りつけら
れている。素子形成は、まず電子ビ−ム法によりアルミ
蒸着膜を500Å形成したのち、蒸着重合法により誘電
体である芳香族ポリユリア薄膜を2000Å形成する。
なお、膜厚はシャッタ−8の開閉によって所定の膜厚に
制御される。その後、引き続きプラズマ処理室4に搬入
し、マイクロ波プラズマにより基板7全面にプラズマ照
射を1分間行い余分な付着物を除去する。以上の工程を
くり返して50層(容量5nF)の素子を完成する。こ
の方式によると1層当たりの処理時間は合計約4分程度
であった。
The substrate 6 introduced into the vacuum chamber is mounted on the substrate transport table 7 with the element forming surface facing downward. The device is formed by first forming an aluminum vapor-deposited film of 500 .mu.m by an electron beam method, and then forming an aromatic polyurea thin film of 2000 .ANG. By a vapor-deposition polymerization method.
The film thickness is controlled to a predetermined film thickness by opening and closing the shutter 8. Thereafter, the substrate 7 is successively carried into the plasma processing chamber 4, and the entire surface of the substrate 7 is irradiated with microwaves by microwave plasma for one minute to remove extraneous deposits. By repeating the above steps, an element having 50 layers (capacity: 5 nF) is completed. According to this method, the processing time per layer was about 4 minutes in total.

【0020】(比較例)以下、本発明の比較例について
図2を参照しながら説明する。図2は、プラズマ処理法
としてRFプラズマを使用したときの装置の概略断面図
を示している。なお、上記実施例と同一部材については
同一の図番を使用している。この比較例が図1の上記実
施例の構成と異なるのは、プラズマ処理としてRFプラ
ズマを使用した点と、各真空槽が独立し、仕切り板9で
区切られている点である。
Comparative Example Hereinafter, a comparative example of the present invention will be described with reference to FIG. FIG. 2 is a schematic sectional view of the apparatus when RF plasma is used as a plasma processing method. Note that the same reference numerals are used for the same members as in the above embodiment. This comparative example differs from the configuration of the above-described embodiment of FIG. 1 in that RF plasma is used for plasma processing, and that each vacuum chamber is independent and separated by a partition plate 9.

【0021】RFプラズマ処理を行う場合、処理圧力が
1〜10Paであり、他の工程と比較して圧力が高いの
で他の工程と分離するための仕切り板9が必要となる。
よってRFプラズマ処理を行う場合、仕切り板9の開閉
と素子移動時の圧力調整が必要となる。そこで実施例と
同様の素子を形成すると1層当たりの処理時間は6分程
度であった。
In the case of performing the RF plasma processing, the processing pressure is 1 to 10 Pa, and the pressure is higher than the other steps, so that a partition plate 9 for separating from the other steps is required.
Therefore, when performing the RF plasma treatment, it is necessary to open and close the partition plate 9 and adjust the pressure when the element is moved. Therefore, when an element similar to that of the example was formed, the processing time per layer was about 6 minutes.

【0022】この結果から明らかなように本実施例に示
した素子形成法を行うと1層当たり約2分の時間短縮が
可能となり処理能力が1.5倍となる。以上説明したよ
うに本実施例によれば、薄膜電極を形成する工程と有機
誘電体薄膜を形成する工程と基板6全面へプラズマを照
射する工程の三工程を同一圧力で行うことにより各工程
毎の各部屋の差圧をなくすことが可能になり、同時に同
一真空槽内に三工程を組み込むことにより、生産性の向
上が可能となる。特に操作圧力が低いマイクロ波プラズ
マ処理方法を使用することは電子ビ−ム法、蒸着重合法
等の高速成膜が可能な薄膜形成法との組合せにおいて非
常に有効である。
As is apparent from the results, when the device forming method shown in this embodiment is performed, the time can be reduced by about 2 minutes per layer, and the processing capacity is increased 1.5 times. As described above, according to the present embodiment, the three steps of forming the thin film electrode, forming the organic dielectric thin film, and irradiating the entire surface of the substrate 6 with plasma are performed at the same pressure, whereby each step is performed. It is possible to eliminate the differential pressure in each room, and at the same time, improve productivity by incorporating three processes in the same vacuum chamber. In particular, the use of a microwave plasma processing method with a low operating pressure is very effective in combination with a thin film forming method capable of high-speed film formation such as an electron beam method and a vapor deposition polymerization method.

【0023】[0023]

【発明の効果】本発明は、上記実施例からも明らかなよ
うに薄膜電極形成と誘電体薄膜の形成と基板上へのプラ
ズマ処理とを同一の圧力かつ同一の真空槽で行い、さら
にこれらをくり返して積層することにより生産性のよい
積層薄膜コンデンサの製造方法を実現できるものであ
る。
According to the present invention, as is apparent from the above embodiment, the formation of the thin film electrode, the formation of the dielectric thin film, and the plasma treatment on the substrate are performed in the same vacuum chamber at the same pressure. By repeating and laminating, a method of manufacturing a multilayer thin film capacitor with good productivity can be realized.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施例における積層薄膜コンデンサを
形成する装置の概略断面図である。
FIG. 1 is a schematic sectional view of an apparatus for forming a multilayer thin film capacitor according to an embodiment of the present invention.

【図2】本発明の比較例における積層薄膜コンデンサを
形成する装置の概略断面図である。
FIG. 2 is a schematic sectional view of an apparatus for forming a multilayer thin film capacitor in a comparative example of the present invention.

【図3】積層薄膜コンデンサの概略断面図である。FIG. 3 is a schematic sectional view of a multilayer thin film capacitor.

【図4】従来の積層薄膜コンデンサを形成する装置の概
略断面図である。
FIG. 4 is a schematic sectional view of a conventional apparatus for forming a multilayer thin film capacitor.

【符号の説明】[Explanation of symbols]

1 薄膜電極形成室(電子ビ−ム法) 2 板状固定マスク 3 誘電体薄膜形成室(蒸着重合法) 4 プラズマ処理槽(マイクロ波orRF) 5 真空ポンプ 6 基板 7 基板搬送テ−ブル 8 シャッタ− Reference Signs List 1 thin-film electrode formation chamber (electron beam method) 2 plate-shaped fixed mask 3 dielectric thin-film formation chamber (vapor deposition polymerization method) 4 plasma processing tank (microwave or RF) 5 vacuum pump 6 substrate 7 substrate transfer table 8 shutter −

───────────────────────────────────────────────────── フロントページの続き (72)発明者 柴崎 初彦 大阪府門真市大字門真1006番地 松下電 器産業株式会社内 (72)発明者 松浦 久雄 大阪府門真市大字門真1006番地 松下電 器産業株式会社内 (72)発明者 羽賀 幹夫 大阪府門真市大字門真1006番地 松下電 器産業株式会社内 (56)参考文献 特開 平3−209805(JP,A) 特開 昭62−24507(JP,A) 特開 昭59−188110(JP,A) 特開 平2−121313(JP,A) 特許2965670(JP,B2) (58)調査した分野(Int.Cl.7,DB名) H01G 4/00 - 4/40 H01G 13/00 - 13/06 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hatsuhiko Shibasaki 1006 Kazuma Kadoma, Osaka Prefecture Inside Matsushita Electric Industrial Co., Ltd. (72) Inventor Mikio Haga 1006 Kadoma, Kazuma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (56) References JP-A-3-209805 (JP, A) JP-A-62-24507 (JP, A) JP-A-59-188110 (JP, A) JP-A-2-121313 (JP, A) Patent 2965670 (JP, B2) (58) Fields investigated (Int. Cl. 7 , DB name) H01G 4/00- 4/40 H01G 13/00-13/06

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 薄膜電極をパターン形成する工程と、有
機誘電体薄膜をパターン形成する工程と、基板全面へプ
ラズマを照射する工程とを同一圧力下でかつ同一真空槽
内で行い、さらにこれらの工程をくり返して積層する積
層薄膜コンデンサの製造方法。
1. A step of patterning a thin film electrode, a step of patterning an organic dielectric thin film, and a step of irradiating plasma on the entire surface of the substrate under the same pressure and in the same vacuum chamber. A method for manufacturing a multilayer thin film capacitor in which a process is repeated and stacked.
【請求項2】 プラズマ照射がマイクロ波プラズマであ
る請求項1記載の積層薄膜コンデンサの製造方法。
2. The method according to claim 1, wherein the plasma irradiation is microwave plasma.
JP5986192A 1992-03-17 1992-03-17 Manufacturing method of multilayer thin film capacitor Expired - Fee Related JP3088179B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5986192A JP3088179B2 (en) 1992-03-17 1992-03-17 Manufacturing method of multilayer thin film capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5986192A JP3088179B2 (en) 1992-03-17 1992-03-17 Manufacturing method of multilayer thin film capacitor

Publications (2)

Publication Number Publication Date
JPH05267091A JPH05267091A (en) 1993-10-15
JP3088179B2 true JP3088179B2 (en) 2000-09-18

Family

ID=13125386

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5986192A Expired - Fee Related JP3088179B2 (en) 1992-03-17 1992-03-17 Manufacturing method of multilayer thin film capacitor

Country Status (1)

Country Link
JP (1) JP3088179B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1179380C (en) 1997-11-18 2004-12-08 松下电器产业株式会社 Laminate and capacitor
CN1158682C (en) * 1997-11-18 2004-07-21 松下电器产业株式会社 Laminate, capacitor, and method for producing laminate
JP4505823B2 (en) * 2003-06-30 2010-07-21 富士電機ホールディングス株式会社 Capacitor
US8722505B2 (en) * 2010-11-02 2014-05-13 National Semiconductor Corporation Semiconductor capacitor with large area plates and a small footprint that is formed with shadow masks and only two lithography steps

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Publication number Publication date
JPH05267091A (en) 1993-10-15

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