JP3084995B2 - Motion detection circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a motion detecting circuit for detecting a motion area of a sub-sampled image signal, and more particularly to a MUSE (Multipl.
e Sub-Nyquist Sampling Encoding (Multiple subsample transmission) is used in the decoder.

[0002]

2. Description of the Related Art In recent years, high-definition broadcasting has been put into practical use.
Broadcasting by the MUSE system using satellites has started. M
The details of the USE system are described in Ninomiya “MUSE-Hi-Vision transmission system” edited by the Institute of Electronics, Information and Communication Engineers.

Hereinafter, an example of a conventional motion detection circuit will be described with reference to the drawings. A conventional motion detection circuit is disclosed, for example, in Japanese Patent Application Laid-Open No. Hei 1-91586.

FIG. 2 is a block diagram showing the whole of the conventional motion detecting circuit, and FIG. 3 is a block diagram showing an edge detecting circuit therein.

In FIG. 2, 1 is a frame memory, and 2 is a subtractor, which forms an inter-frame difference signal of an input image signal. Reference numeral 3 denotes an aliasing removal circuit that eliminates aliasing components included in the sub-sampled image signal. Reference numeral 4 denotes an absolute value circuit for obtaining an absolute value of a signal. Reference numeral 5 denotes an edge detection circuit, and reference numeral 6 denotes an absolute value circuit, which detects an edge by differentiating an image signal and obtains an absolute value thereof. A division circuit 7 divides the outputs of the absolute value circuits 4 and 6 respectively. In FIG. 3, reference numeral 10 denotes a vertical edge detection circuit for detecting a vertical edge. A horizontal edge detection circuit 11 detects a horizontal edge. An adder 12 adds the outputs of the vertical edge detection circuit 10 and the horizontal edge detection circuit 11. 2
Reference numeral 0 denotes an area processing circuit which determines the level of the output signal of the adder 12 and outputs an edge signal.

The conventional motion detection circuit configured as described above detects an inter-frame difference signal of an image signal, removes aliasing components contained in the signal, divides the signal by the detected edge signal, and performs motion detection. Signal is being detected. In detecting the edge signal, first, a vertical edge detection circuit differentiates in the horizontal direction, and a horizontal edge detection circuit differentiates in the vertical direction, and the outputs of both are added. To prevent erroneous detection due to noise or the like in the area processing circuit, for example, an area (region) of 15 pixels of 5 pixels in the horizontal direction and 3 lines in the vertical direction
In, if there are eight or more pixels at a certain level or more, the pixel is regarded as an edge and output.

[0007]

However, in the above configuration, in the case of a thin horizontal line or a thin vertical line, when the level is determined in the area processing, there are only five or three pixels having an edge level or more. And it is not output as an edge.

In view of the above-mentioned problems, the present invention provides a motion detection circuit which improves the accuracy of motion detection by independently removing isolated points in the horizontal and vertical directions and detecting the edge of a thin line. The purpose is to do.

[0009]

According to the present invention, there is provided a forming means for forming an inter-frame difference signal of a sub-sampled image signal, a aliasing removing circuit for removing aliasing components from an output of the forming means, and the aliasing removing circuit. A first absolute value circuit for determining an absolute value of an output of the circuit, an edge detection circuit for detecting an edge of the image signal, a second absolute value circuit for determining an absolute value of an output of the edge detection circuit, A division circuit for dividing the output of the absolute value circuit of (1) by the output of the second absolute value circuit, wherein the edge detection circuit is a vertical edge detection circuit, a horizontal edge detection circuit, the vertical edge detection circuit, and the horizontal edge An adder for adding an output of a detection circuit, a circuit for removing a horizontal isolated point from the output of the adder, a circuit for removing a vertical isolated point from the output of the adder, and the horizontal isolated point Logical sum of the outputs of said vertical isolated point removal circuit in the circuit composed of the circuit to take.

[0010]

According to the present invention, isolated points are removed independently in the horizontal and vertical directions, and the outputs of the two are ORed to detect the edge of a thin line, thereby improving the accuracy of motion detection. .

[0011]

FIG. 1 is a block diagram showing a main part of a motion detecting circuit according to an embodiment of the present invention. Figure 2 shows the overall block diagram.
Is the same as In FIG. 1, reference numeral 10 denotes a vertical edge detection circuit, 11 denotes a horizontal edge detection circuit, and 12 denotes an adder, which are the same as those in FIG. 13 is a horizontal isolated point removing circuit,
Numeral 14 denotes a vertical isolated point removing circuit, which prevents malfunction due to noise. Reference numeral 15 denotes a logical sum circuit that calculates the logical sum of the outputs of the isolated point removing circuits 13 and 14.

The operation of this embodiment configured as described above will be described below. The vertical edge detection circuit 10 performs differentiation in the horizontal direction to detect a vertical edge, and the horizontal edge detection circuit 11 performs differentiation in the vertical direction to detect a horizontal edge. Each of the detected edge signals is added by the adder 12. The output of the adder 12 is an isolated point removing circuit 13 for removing isolated points in the horizontal direction. As a means of removing isolated points, two pixels having a certain level or more in three pixels in the horizontal direction are used.
If the number of pixels is equal to or more than the number of pixels, it is regarded as an edge and output. Similarly, the output of the adder 12 is removed in the vertical direction by an isolated point removing circuit 14. The OR circuit 15 outputs an edge signal if any one of the outputs of the isolated point removing circuits 13 and 14 is detected as an edge.

[0013]

As described above, according to the present invention,
By providing a vertical edge and horizontal edge detection circuit, an adder, horizontal and vertical isolated point removal circuits, and a logical OR circuit, a thin horizontal line having only one line width or a vertical line having one pixel width is provided. Can be detected as an edge, and the accuracy of motion detection can be improved, and the practical effect is great.

[Brief description of the drawings]

FIG. 1 is a block diagram of a main part of a motion detection circuit according to an embodiment of the present invention.

FIG. 2 is an overall block diagram of a conventional motion detection circuit.

FIG. 3 is a block diagram of a main part of a conventional motion detection circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Vertical edge detection circuit 11 Horizontal edge detection circuit 12 Adder 13 Horizontal isolated point removing circuit 14 Vertical isolated point removing circuit 15 OR circuit

────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Kenta Samukawa 1006 Kazuma Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (58) Field surveyed (Int. Cl. ⁷ , DB name) H04N 7/015

Claims (1)

(57) [Claims] 1. A forming means for forming an inter-frame difference signal of a sub-sampled image signal, a aliasing removing circuit for removing aliasing components from an output of the forming means, and an absolute value of an output of the aliasing removing circuit is obtained. A first absolute value circuit, an edge detection circuit for detecting an edge of the image signal, and a second for obtaining an absolute value of an output of the edge detection circuit
And a dividing circuit that divides the output of the first absolute value circuit by the output of the second absolute value circuit. A detection circuit, a horizontal edge detection circuit, an adder that adds outputs of the vertical edge detection circuit and the horizontal edge detection circuit, a circuit that removes a horizontal isolated point from an output of the adder, and the adder. A circuit that removes a vertical isolated point from the output of (a), and a circuit that performs a logical sum of an output of the horizontal isolated point removing circuit and an output of the vertical isolated point removing circuit. Detection circuit.