JP3078395B2 - Optical element - Google Patents

Optical element

Info

Publication number
JP3078395B2
JP3078395B2 JP12354392A JP12354392A JP3078395B2 JP 3078395 B2 JP3078395 B2 JP 3078395B2 JP 12354392 A JP12354392 A JP 12354392A JP 12354392 A JP12354392 A JP 12354392A JP 3078395 B2 JP3078395 B2 JP 3078395B2
Authority
JP
Japan
Prior art keywords
layer
resistance region
diffraction grating
waveguide layer
optical element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP12354392A
Other languages
Japanese (ja)
Other versions
JPH05323137A (en
Inventor
和典 免田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Olympus Corp
Original Assignee
Olympus Optic Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Olympus Optic Co Ltd filed Critical Olympus Optic Co Ltd
Priority to JP12354392A priority Critical patent/JP3078395B2/en
Publication of JPH05323137A publication Critical patent/JPH05323137A/en
Application granted granted Critical
Publication of JP3078395B2 publication Critical patent/JP3078395B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Optical Integrated Circuits (AREA)
  • Diffracting Gratings Or Hologram Optical Elements (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明はオプトエレクトロニクス
技術に属し、光集積回路の基本構成要素である光学素子
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical element which belongs to an optoelectronic technology and is a basic component of an optical integrated circuit.

【0002】[0002]

【従来の技術】図4は導波路層上に作製された回折格子
の典型例を示す斜視図である。従来は、ガラス導波路層
上に窒化シリコンを成膜し、その膜をパターニング及び
エッチング技術を用いて、図4に示すような凹凸の加工
がされていた。すなわち、窒化シリコン層上にパターン
化したマスク層を作製し、マスク開口部を浸食し、パタ
ーンを転写することにより段差を有する回折格子が形成
されていた。
2. Description of the Related Art FIG. 4 is a perspective view showing a typical example of a diffraction grating formed on a waveguide layer. Conventionally, a silicon nitride film is formed on a glass waveguide layer, and the film is patterned and etched to form an uneven surface as shown in FIG. That is, a diffraction grating having a step is formed by producing a patterned mask layer on a silicon nitride layer, eroding a mask opening, and transferring the pattern.

【0003】[0003]

【発明が解決しようとする課題】光集積回路は本質的に
は単一モード導波路で構成されることが望ましく、その
中の素子の構造は波長オーダになり、したがって作成・
加工にはマイクロメートル・オーダの技術が要求され
る。例えば導波路層厚は1μm程度,導波路幅は4μm
程度,また回折格子の周期に至っては0.5μmであ
る。このようなマイクロメートル構造からなる素子であ
る光集積回路を作成するためには、高度な薄膜形成技
術、及び微細パターン加工技術が要求される。
It is desirable that the optical integrated circuit is essentially composed of a single mode waveguide, and the structure of the device in the integrated circuit is of the order of wavelength.
Processing requires micrometer-order technology. For example, the thickness of the waveguide layer is about 1 μm, and the width of the waveguide is 4 μm.
It is about 0.5 μm when the diffraction grating period is reached. In order to produce an optical integrated circuit which is an element having such a micrometer structure, an advanced thin film forming technique and a fine pattern processing technique are required.

【0004】しかし、図4のように回折格子7を凹凸に
加工する場合、上述したような精度による加工が必要で
あるが、パターニング及びエッチングでは、満足な結果
を得ることができず出射角度,出射強度分布,出射焦点
距離などに誤差が生じていた。 すなわち、回折格子な
どの作製においては格子形状に誤差を与える主な作製手
順としてエッチング工程があり、その工程は大別してエ
ッチング液中で行うウエットエッチングとガス中で行う
ドライエッチングとがある。しかし、ウエットエッチン
グでは材料などに起因し、エッチングが異方的に進行す
る場合にはマスク下部でのサイドエッチングのためのア
ンダカットが生じ、加工精度が劣化してしまう。そのた
め、1μm程度以下の加工精度が要求される場合には満
足な結果を得ることはできなかった。また、このような
ウエットエッチングの欠点を克服するため、ドライエッ
チング技術が開発され等方性は高められたが、その反面
加工の際に試料表面を破壊し損傷を与えてしまうという
欠点があった。
However, when processing the diffraction grating 7 into irregularities as shown in FIG. 4, processing with the above-described accuracy is necessary. However, satisfactory results cannot be obtained by patterning and etching. Errors have occurred in the emission intensity distribution, the emission focal length, and the like. That is, in manufacturing a diffraction grating or the like, there is an etching step as a main manufacturing procedure that causes an error in the grating shape, and the steps are roughly classified into wet etching performed in an etching solution and dry etching performed in a gas. However, in the wet etching, if the etching progresses anisotropically due to the material or the like, an undercut occurs for the side etching under the mask, and the processing accuracy deteriorates. Therefore, when a processing accuracy of about 1 μm or less is required, a satisfactory result cannot be obtained. In order to overcome such disadvantages of wet etching, dry etching technology has been developed and its isotropy has been improved, but on the other hand, there has been a disadvantage that the sample surface is broken and damaged during processing. .

【0005】一方、従来の回折格子7では作製時に凹凸
の形状が決定されるため、作製後に出射角度等を変化さ
せようとした場合、新たに適切な形状の回折格子を別途
作製する必要があった。
On the other hand, in the conventional diffraction grating 7, since the shape of the unevenness is determined at the time of fabrication, if it is desired to change the emission angle or the like after fabrication, it is necessary to separately fabricate a diffraction grating of an appropriate shape. Was.

【0006】そこで、本発明は上記欠点を克服し、精度
良い光学素子を提供することを目的とする。
Accordingly, it is an object of the present invention to overcome the above-mentioned drawbacks and to provide a highly accurate optical element.

【0007】[0007]

【課題を解決するための手段】本発明の光学素子は、基
板と、この基板上に積層された導波路層と、この導波路
層上に積層された透明半導体層とを有し、この透明半導
体層には縞状に形成された高抵抗領域と低抵抗領域とを
交互に有するものである。また、低抵抗領域と高抵抗領
域が縞状に区分された低抵抗領域に、電圧を印加する手
段を有する光学素子としても良い。
The optical element of the present invention has a substrate, a waveguide layer laminated on the substrate, and a transparent semiconductor layer laminated on the waveguide layer. The semiconductor layer has high-resistance regions and low-resistance regions alternately formed in stripes. Further, an optical element having a means for applying a voltage to a low-resistance region in which a low-resistance region and a high-resistance region are divided into stripes may be used.

【0008】[0008]

【作用】透明半導体層に高抵抗領域と低抵抗領域を縞状
に形成した光学素子により、正確な出射角度,出射強度
分布等を生じさせる。また、電圧印加をすれば物性値
(屈折率等)が変化する材料(例えば、圧電材料)を用
いることにより回折格子作製後の屈折率制御を行うこと
もできる。
The optical element in which the high-resistance area and the low-resistance area are formed in stripes in the transparent semiconductor layer produces an accurate emission angle, emission intensity distribution, and the like. Further, by using a material (for example, a piezoelectric material) whose physical property value (refractive index or the like) changes when a voltage is applied, the refractive index can be controlled after the diffraction grating is manufactured.

【0009】[0009]

【実施例】図1は本発明の第1実施例の回折格子を示す
斜視図である。Si基板1上に熱酸化又はスパッタ法等
を用いてSiO2 バッファ層2を形成した後、コーニン
グ7059ガラス導波路層3を成膜する。続いて、導波
路層3上に1枚のZnO層4を蒸着又はスパッタ法で作
製し、次に、その1枚のZnO層4にイオン注入技術を
用いて図1に示すような、電気的に活性化された高抵抗
領域4aと低抵抗領域4bを縞状に形成する。ここで、
導波路層3上にZnO層4を形成するとしたが、材料と
しては金属酸化物を主成分とする半導体材料で、使用す
る波長領域において透明性を有するものが対象となり、
これをここでは透明半導体材料と呼ぶ。この透明半導体
材料としては、SnO2 ,ZnO,ITO(インジウム
と錫の酸化物)などが挙げられる。つまり、導波路層3
上に形成したこれらの材料にプロトンを注入すると、キ
ャリア濃度が減少し高抵抗となり屈折率は減少する。よ
って、SnO2 ,ZnO,ITO等にプロトン(H+
ビームで回折格子などのパターンを1枚の透明半導体材
料に直接描くことにより、段差を有しない任意形状の屈
折率分布を作ることができる。
FIG. 1 is a perspective view showing a diffraction grating according to a first embodiment of the present invention. After forming the SiO 2 buffer layer 2 on the Si substrate 1 by thermal oxidation or sputtering, the Corning 7059 glass waveguide layer 3 is formed. Subsequently, one ZnO layer 4 is formed on the waveguide layer 3 by vapor deposition or sputtering, and then the one ZnO layer 4 is electrically connected to the single ZnO layer 4 by using an ion implantation technique as shown in FIG. The activated high resistance region 4a and low resistance region 4b are formed in stripes. here,
Although the ZnO layer 4 is formed on the waveguide layer 3, the material is a semiconductor material containing a metal oxide as a main component and having transparency in a wavelength region to be used.
This is referred to herein as a transparent semiconductor material. Examples of the transparent semiconductor material include SnO 2 , ZnO, and ITO (an oxide of indium and tin). That is, the waveguide layer 3
When protons are injected into these materials formed above, the carrier concentration decreases, the resistance increases, and the refractive index decreases. Therefore, proton (H + ) is added to SnO 2 , ZnO, ITO, etc.
By directly drawing a pattern such as a diffraction grating on a single transparent semiconductor material with a beam, a refractive index distribution having an arbitrary shape without a step can be formed.

【0010】以上の様にして作製した装置の導波路層3
に所定の方法を用いて光を導入すると、回折格子の存在
する領域に到達した光は導波路層3から外部に出射す
る。
The waveguide layer 3 of the device manufactured as described above
When light is introduced by using a predetermined method, the light reaching the region where the diffraction grating exists is emitted from the waveguide layer 3 to the outside.

【0011】従って、本実施例ではイオン注入技術を用
いることにより、出射角度などの光学特性に誤差をもた
らすエッチング等の作製工程を削除し、より精度の良い
回折格子を実現した。
Therefore, in this embodiment, by using the ion implantation technique, a manufacturing process such as etching which causes an error in optical characteristics such as an emission angle is eliminated, and a more accurate diffraction grating is realized.

【0012】図2は本発明の第2実施例の回折格子を示
す正面図であり、第1実施例と同一の部分には同一符号
を付して説明する。Si基板1上にSiO2 バッファ層
2,導波路層3及びZnO層4を順に積層し、そのZn
O層4にプロトンを注入することにより、高抵抗領域4
aと低抵抗領域4bを縞状に形成する。そして、低抵抗
領域4bには交互に対抗する位置に電極端子5が接続さ
れ、隣り合う低抵抗領域4b間に電圧を印加しうるよう
に構成されている。
FIG. 2 is a front view showing a diffraction grating according to a second embodiment of the present invention. The same parts as those in the first embodiment are denoted by the same reference numerals. An SiO 2 buffer layer 2, a waveguide layer 3 and a ZnO layer 4 are sequentially stacked on a Si substrate 1,
By injecting protons into the O layer 4, the high resistance region 4
a and the low resistance region 4b are formed in a stripe shape. The electrode terminals 5 are connected to the low resistance regions 4b at positions opposing each other alternately so that a voltage can be applied between the adjacent low resistance regions 4b.

【0013】ここで、ZnO層は圧電材料であるので電
極端子5に電圧を印加することによって、隣り合う低抵
抗領域4b間に電位差が生じるので、高抵抗領域4a内
に電界が生じ電歪効果により歪が生じる。この歪みは高
抵抗領域4aの下部に存在する導波路層3をも歪ませる
ために、歪みが存在しない場合とは異なる屈折率分布が
実現できる。即ち、印加電圧を変化させることで歪み量
を調節し、導波光の出射角や出射強度分布等を制御す
る。
Here, since the ZnO layer is made of a piezoelectric material, when a voltage is applied to the electrode terminal 5, a potential difference is generated between the adjacent low-resistance regions 4b. Causes distortion. This distortion also distorts the waveguide layer 3 existing below the high-resistance region 4a, so that a refractive index distribution different from that when no distortion exists can be realized. That is, the amount of distortion is adjusted by changing the applied voltage, and the emission angle and emission intensity distribution of the guided light are controlled.

【0014】従って、本実施例では、電圧印加により物
性値(屈折率等)が変化する材料を用い、回折格子作製
後の屈折率制御を行うことにより、多形態の縞形状を1
つの回折格子によって実現し、任意の屈折率分布を得る
ことができる。
Therefore, in this embodiment, a material whose physical property value (refractive index or the like) changes by application of a voltage is used, and the refractive index is controlled after the diffraction grating is manufactured, so that the stripe shape of one form can be reduced to one.
This is realized by two diffraction gratings, and an arbitrary refractive index distribution can be obtained.

【0015】図3は、本発明の第3実施例を示す側面図
であり、本実施例においても第1実施例と同一の部分に
は同一符号を付して説明する。基板1及び導波路層3を
順に積層し、さらにその導波路層3上に積層した透明半
導体材料であるZnO層4にプロトンを注入することに
より、高抵抗領域4aと低抵抗領域4bを縞状に形成し
た光学素子を光スイッチに用いる。つまり、導入した光
が導波路層3を透過して出射する方向に光検出器6を配
置し、この光学素子には図示していないが、第2実施例
同様縞状に区分された低抵抗領域4b間に電圧を印加す
るための電極端子を有する。
FIG. 3 is a side view showing a third embodiment of the present invention. In this embodiment, the same parts as those in the first embodiment are denoted by the same reference numerals. By laminating the substrate 1 and the waveguide layer 3 in order, and further injecting protons into the ZnO layer 4 which is a transparent semiconductor material laminated on the waveguide layer 3, the high resistance region 4a and the low resistance region 4b are striped. The optical element formed above is used for an optical switch. That is, the photodetector 6 is arranged in a direction in which the introduced light passes through the waveguide layer 3 and exits therefrom. Although not shown in this optical element, the low resistance divided into stripes as in the second embodiment. It has an electrode terminal for applying a voltage between the regions 4b.

【0016】ここで、低抵抗領域4bに電圧を印加する
と高抵抗領域4a(電歪効果が顕著に現れる領域)が歪
むため、その歪みが高抵抗領域4a直下領域におけるの
吸収端を変化させることができる。今、吸収端が導波路
光のエネルギーよりも小さくなるように電圧を印加する
と、導波光は高抵抗領域4a直下で吸収され、導波光は
検出できなくなる。
Here, when a voltage is applied to the low resistance region 4b, the high resistance region 4a (the region where the electrostriction effect is remarkable) is distorted, and the distortion changes the absorption edge in the region immediately below the high resistance region 4a. Can be. If a voltage is applied so that the absorption edge is smaller than the energy of the waveguide light, the guided light is absorbed immediately below the high-resistance region 4a, and the guided light cannot be detected.

【0017】従って、本実施例による光スイッチでは、
導波路層3の吸収端を変化させるため、吸収の効率及び
速度が速くなり、短距離で光がすべて吸収できるので、
デバイスが小形化できる。また、連続的に印加電圧を変
化することで検出光強度を変調できるため、光変調器に
もなりうる。
Therefore, in the optical switch according to the present embodiment,
Since the absorption end of the waveguide layer 3 is changed, the efficiency and speed of absorption are increased, and all light can be absorbed in a short distance.
The device can be downsized. Further, since the intensity of the detected light can be modulated by continuously changing the applied voltage, it can be used as an optical modulator.

【0018】なお、これらの実施例ではイオン注入のみ
で高抵抗層を形成したが、注入後、適当な熱処理を行っ
ても同様な結果が得られる。また、本発明は、回折格子
のみに限定されるものではなく、他の導波路型光学素子
例えば、ビームスプリッタやマイクロフレネルレンズ、
にも利用できる。
In these examples, the high-resistance layer is formed only by ion implantation, but the same result can be obtained by performing an appropriate heat treatment after the implantation. Further, the present invention is not limited to only the diffraction grating, other waveguide type optical elements such as a beam splitter and a micro Fresnel lens,
Also available.

【0019】[0019]

【発明の効果】以上本発明は、イオンビーム(H+ )を
用いることにより、直線形状の回折格子を精度良く形成
し、正確な出射角度,出射強度分布等を得ることを可能
とした。
As described above, the present invention makes it possible to accurately form a linear diffraction grating by using an ion beam (H + ) and obtain an accurate emission angle, emission intensity distribution and the like.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の第1実施例を示す斜視図である。FIG. 1 is a perspective view showing a first embodiment of the present invention.

【図2】本発明の第2実施例を示す正面図である。FIG. 2 is a front view showing a second embodiment of the present invention.

【図3】本発明の第3実施例を示す側面図である。FIG. 3 is a side view showing a third embodiment of the present invention.

【図4】従来例を示す斜視図である。FIG. 4 is a perspective view showing a conventional example.

【符号の説明】[Explanation of symbols]

1 基板 2 バッファ層 3 導波路層 4 ZnO層 4a 高抵抗領域 4b 低抵抗領域 5 電極端子 6 光検出器 7 回折格子 DESCRIPTION OF SYMBOLS 1 Substrate 2 Buffer layer 3 Waveguide layer 4 ZnO layer 4a High resistance area 4b Low resistance area 5 Electrode terminal 6 Photodetector 7 Diffraction grating

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】基板と、この基板上に積層された導波路層
と、この導波路層上に積層された透明半導体層とを有
し、この透明半導体層には縞状に形成された高抵抗領域
と低抵抗領域とを交互に有することを特徴とする光学素
子。
1. A semiconductor device comprising: a substrate; a waveguide layer laminated on the substrate; and a transparent semiconductor layer laminated on the waveguide layer. An optical element having a resistance region and a low resistance region alternately.
【請求項2】請求項1において、低抵抗領域と高抵抗領
域が縞状に区分された低抵抗領域に電圧を印加する手段
を有することを特徴とする光学素子。
2. An optical element according to claim 1, further comprising means for applying a voltage to a low-resistance region in which a low-resistance region and a high-resistance region are divided into stripes.
JP12354392A 1992-05-15 1992-05-15 Optical element Expired - Lifetime JP3078395B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12354392A JP3078395B2 (en) 1992-05-15 1992-05-15 Optical element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12354392A JP3078395B2 (en) 1992-05-15 1992-05-15 Optical element

Publications (2)

Publication Number Publication Date
JPH05323137A JPH05323137A (en) 1993-12-07
JP3078395B2 true JP3078395B2 (en) 2000-08-21

Family

ID=14863202

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12354392A Expired - Lifetime JP3078395B2 (en) 1992-05-15 1992-05-15 Optical element

Country Status (1)

Country Link
JP (1) JP3078395B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6290741B2 (en) * 2014-07-24 2018-03-07 日本電信電話株式会社 Grating coupler forming method

Also Published As

Publication number Publication date
JPH05323137A (en) 1993-12-07

Similar Documents

Publication Publication Date Title
DE69636941T2 (en) Output power control device, projection display device, infrared sensor and non-contact thermometer
US6873764B2 (en) Method for producing a grid structure, an optical element, an evanescence field sensor plate, microtitre plate and an optical communication engineering coupler as well as a device for monitoring a wavelength
JP2618875B2 (en) Waveguide
JPH1073722A (en) Polarizing optical element and its production
US6913705B2 (en) Manufacturing method for optical integrated circuit having spatial reflection type structure
US5101297A (en) Method for producing a diffraction grating in optical elements
JP3078395B2 (en) Optical element
JP2020106706A (en) Optical modulator
US7123784B2 (en) Electro-optic modulator with particular diffused buffer layer
CN105296942A (en) Method adopting photoetching mask lifting method for achieving optical coating
CN112415790B (en) All-fiber electro-optical device and construction method thereof
JPS58171024A (en) Optical control type optical switch
WO2023286408A1 (en) Waveguide element, optical scanning element and optical modulation element
JPH08304670A (en) Optical module and its production
JPS62187310A (en) Production of diffraction grating type optical coupler
JPS61198106A (en) Optical waveguide forming method
JPH0361932B2 (en)
JPS6186730A (en) Liquid crystal element
JP2706443B2 (en) Image sensor and method of manufacturing the same
JPH052142B2 (en)
JPS6325659B2 (en)
JP2002267837A (en) Polarizing element
JPH04159515A (en) Production of optical waveguide type control element
JPH0476505A (en) Grating element
JPS62119505A (en) Formation of optical waveguide device

Legal Events

Date Code Title Description
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20000530