JP3069172B2 - Pachinko machine - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention provides a display for changing symbols.
The present invention relates to a pachinko game machine equipped with a display device .

[0002]

2. Description of the Related Art A plurality of symbols, such as numbers, are independently set in a predetermined direction.
A number of rod-shaped segment light-emitting elements are arranged so that displacement display is possible.
Variable display device, and according to the winning of a hit ball to a specific winning opening
Update the display of the variable display device so that it flows in a predetermined direction
Display update means and display of the variable display device when display update is stopped
Special game mode from normal game mode by combination of
Pachinko machine with a variable winning device that converts
It is described in JP-A-3-7184.

A variable table of the variable display device of the above-mentioned pachinko machine.
The indicator shows 13 bar-shaped cells in each of the left, middle, and right rows.
Segment light-emitting element so that the figure 8 is stacked on top and bottom
Arranged in two rows vertically and five rows horizontally.
Numbers, predetermined characters, and light emission positions
Can be displayed in the vertical direction by changing
ing.

Thus, the variable display device of the pachinko machine is provided.
The display of the position is cut so that it flows while being displaced vertically.
Display, and the change of display and display change easily
Expectations of whether to stop at the goal display because of this
The feeling can be enhanced sufficiently.

[0005] However, the variable display of the pachinko machine described above.
In the part, patterns such as numbers and predetermined characters are displayed vertically
13 rod-shaped segment luminous elements to enable indication etc.
13 rod-shaped segments because only children are provided
Numbers and predetermined numbers displayed by emitting light from the light emitting element
The background of the pattern such as the letter of the darkened and lacked decorativeness
Become.

[0006]

[0007]

[0008]

[0009]

[0010]

[0011]

[0012]

An object of the present invention is to solve the above-background
The pattern display unit is clearer than the one that does not emit light.
Makes the entire symbol display area bright and beautiful with decoration
Provided is a pachinko gaming machine provided with a savable symbol display device.

[0013]

According to a first aspect of the present invention, there is provided a pachinko gaming machine in which a symbol display section of a symbol display device performs a variable display of numbers by detecting a game ball by a predetermined detecting means. The symbol display unit includes a symbol display unit in which a plurality of luminous bodies are arranged in eight numbers .
A plurality of the symbol display units formed by the outer periphery and the inner background display of the symbol display unit are connected to each other while being shifted in the moving direction of the number to be variably displayed, and the symbol display units adjacent to each other are connected to each other. Share the polymerized part ,
The symbol display unit and the background display are different colors.
It emits light .

According to a second aspect of the present invention, in the pachinko gaming machine according to the first aspect, the plurality of symbol display units are provided.
The parts are shifted vertically and connected together, and the upper and lower adjacent symbol display unit parts are placed on top of each other .
The lower half of the eight-shaped number in the pattern display unit ,
The upper half portion of the figure eight shape in the symbol display unit arranged on the lower side is superimposed to share a superimposed portion. Further, the pachinko gaming machine according to claim 3, in what according to claim 2, FIG.
The number of pattern display unit section is a four, vertically Ri displayable der two numbers at the same time, the background display section is the symbol table
The display part is displayed in different emission colors in the upper half and the lower half .

[0015]

In the symbol display section, a plurality of luminous bodies are indicated by the numeral 8
By the symbol display unit parts arranged in the shape, the number "0" to
"9" can be displayed. Multiple symbol display units
The parts are connected to be shifted in the moving direction of the numbers displayed in a variable manner, and the symbol display units adjacent to each other share the overlapping portion, so that the symbol tables adjacent to each other are arranged.
By illuminating the overlapping portion between the indicating unit portions and displaying a part of the numbers, the displayed numbers can be moved and displayed so as to flow in the connection direction. Also, the symbol display unit
The outer and inner background display is different from the symbol display unit
By emitting light in different colors, compared to ones that do not emit background light
To make the symbol display unit stand out clearly
The entire display can be brightly and beautifully decorated.

[0016]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 6 is a view showing an embodiment in which the symbol display body of the pachinko machine of the present invention is mounted on the pachinko machine. A symbol display unit 2 constituting a main part is provided. FIG. 8 is an enlarged view of a main part of the symbol display unit 2 of FIG. 6, and a cover member 46 made of a transparent material is attached to the center of the symbol display unit 2,
The symbol display portion 3 of the symbol display body behind the cover member 46 at the back.
Has been deployed.

FIG. 1 is a front view showing a symbol display body in a pachinko machine. The symbol display body 1 includes a fluorescent display tube 4, a base 25 connected to the back of the fluorescent display tube 4, and a fluorescent display tube. 4 comprises a symbol display section 3 which is enclosed and disposed.

FIG. 2 is a bottom view of the symbol display 1 of FIG. 1, FIG. 3 is a right side view of the symbol display 1 of FIG. 1, and FIG.
It is a sectional side view showing the principle of a fluorescent display tube. In FIG. 7, the fluorescent display tube 4 ′ has a cathode 89, a grid 87, and an anode electrode 83, and a plate glass 81, a spacer glass 92, and a front glass 91, which are bonded to each other by a sealing glass 98. The cathode 89 is made of a tungsten fine wire coated with an alkaline earth metal oxide, and the grid 87 is a thin metal mesh. The anode electrode 83 is a conductor electrode and is composed of segments or dots that are insulated from each other. A phosphor 85 is applied on a segment or dot-shaped anode electrode 83 which is kept insulated from each other. Thermions emitted from the cathode 89 are accelerated by the positive voltage applied to the grid 87 and the anode electrode 83, and
The phosphor 85 applied to 3 emits light when stimulated by thermoelectrons. In actual driving, desired numbers, characters, figures, and the like can be displayed by selectively applying voltages to the grid 87 and the anode electrode 83.

In FIGS. 1 to 3, the fluorescent display tube 4 is
A frame-shaped spacer glass 22 is tightly bonded with a sealing glass 24 on a glass substrate 23 on which an anode electrode is provided, and a front glass 21 is further fixed on the spacer glass 22 by bonding. The air is evacuated from the exhaust pipe 29 provided in the fluorescent display tube 4, and the inside of the fluorescent display tube 4 is in a vacuum state. As shown in FIG. 1, three grids 20a, 20b,
20c are insulated from each other, are juxtaposed so as to cover the upper part of the glass substrate 23 on which the anode electrode is arranged, and 26 cathodes 19 are vertically arranged so as to pass over the grids 20a, 20b, 20c in the left-right direction. Have been. Grid 2
The cathodes 0a to 20c and the cathode 19 are connected to the wiring pattern of the glass substrate 23 by a conductive pace, and further lead out from the glass substrate 23 to the outside of the fluorescent display tube 4 by lead pins 28, and are soldered and fixed to the electrode substrate 25. I have. Each lead pin 28 is made of an insulating paste 24
Are insulated from each other. Note that the exhaust pipe 29 is closed to maintain a vacuum state, and a cover 80 is attached to prevent damage.

The electrode substrate 25 aggregates the wiring patterns read out from the fluorescent display tube 4 for each group,
A connector 27 is provided so as to connect the symbol display 1 to the control means of the pachinko machine main body. The electrode substrate 25 is provided with a through hole 26, and is screwed and fixed to a hole 63 provided in a concave portion 62 in an exterior member 61 of the symbol display body shown in FIG. The exterior member 61 is provided with flange portions 64 on the left and right sides of the exterior member 61, respectively.
4 is provided with a through-hole 65, and the symbol display portion 3 of the symbol display body 1 faces the front glass (not shown) on the back side of the game board 10 of the pachinko machine main body integrally with the symbol display body 1. It is deployed by screw fixing.

The symbol display section 3 includes grids 20a to 20a.
a glass substrate 23 on which an anode electrode in the region inside c is disposed
On the top, the anode electrode is divided as a segment so that a numeral pattern or figure in which the identification information and the pattern are set in advance is displayed, and the division is performed so that the identification information and the pattern are displayed in the preset color. Fluorescent pixels of a predetermined color are applied in a thin film shape on each segment thus formed.

In FIG. 4, reference numerals A1 to A16, B
1 to B16, C1 to C16, D1 to D4, E1 to E16, H1 to H8, F1 to F2, and G1 to G2 each represent a segment obtained by dividing the anode electrode in the symbol display section 3 of the symbol display 1, Each segment is kept insulated from each other. That is, FIG.
3 shows the arrangement state of each segment. Also,
FIG. 5 shows the arrangement state of the fluorescent pixels arranged for each segment in FIG. 4 in which the fluorescent pixels are collected and set in a predetermined figure shape and color in advance.

Each segment in FIG. 4 forms a group for each alphabet, and is turned on and off separately or simultaneously for each group. Each symbol in FIG. 5 represents the color type of the applied fluorescent pixel, B is blue, G
Is blue-green, N is fresh green, R is red, and Y is yellow.

Hereinafter, the function when the symbol display 1 is mounted on a pachinko machine will be described. In FIG. 1, the symbol display unit 3 is connected by vertically overlapping four numbers 8 in the vertical direction in each area distinguished by the grids 20a to 20c, that is, in each area inside the grids 20a to 20c. The number pattern thus set is set as one symbol display unit, and as shown in FIG. 4, the symbol display unit portions 11 ', 12', 13 'set by this number pattern.
Are arranged in parallel. Here, the symbol display unit 11 '
Is composed of segments A1 to A16, the symbol display unit 12 'is composed of segments C1 to C16, and the symbol display unit 13' is segment B1.
To B16, each symbol display unit 11 '
To 13 'are illuminated in red as shown in FIG. 5, and in the pachinko machine shown in FIG. 6, the left special symbol display unit 11, the right special symbol display unit 12, and the middle special symbol display unit 13 respectively.
Is set to

Further, each of the symbol display units 11 'to 1'
Each of 3 'has an equivalent configuration. In the following description
Represents the symbol display unit 11 'as a representative, the symbol display unit
The description of 12 'to 13' is omitted.

The symbol display unit 11 'includes a plurality of luminous bodies.
One display unit is formed by arranging in the form of eight numbers,
In addition, there are a plurality of the display units,
Are shifted in the direction of movement of the numbers
Configuration in which adjacent display units share the overlapping part
It has become.

That is, as shown in FIG.
There are four unit parts and seven segments A1 to A7
Are arranged in the number 8 shape to form one display unit.
The 7 segments A4 to A10 are converted into 8 figures
One display unit is formed by arranging, and seven display segments are formed.
A7 to A13 are arranged in the form of 8 numbers and one display
A unit is formed, and seven segments A10 to A16
Are arranged in the number 8 shape to form one display unit.
ing.

The four display units are shifted in the vertical direction.
Display units that are adjacent to each other
, The number in the display unit located at the top
Of the lower half of the 8 shapes and the display unit arranged on the lower side
And the upper half of the figure 8
The polymerized part is shared. That is, in FIG.
Display units (segments A1 to A7)
And the lower half of the 8 shape
Numbers constituting display units (segments A4 to A10)
The upper half of the figure 8 is polymerized, and
Display segments A4, A5, A6, A7
(Segments A1 to A7) and display unit (segment
A4 to A10).

Similarly, the display unit (segments A4 to A4)
A10) and the display unit (segments A7 to A13)
Are the segments A7, A8, A9, A1
0 is shared. The display unit (segment A7)
To A13) and the display unit (segments A10 to A1)
6) means segments A10, A11,
A12 and A13 are shared (see FIG. 4).

The special symbol display sections 11 to 13 display the variation of the symbols when a game ball wins in the first type starting port 7 provided below the symbol display unit 2 of the game board 10 of FIG. After a predetermined time from the start of the symbol change display, the symbols are stopped in the order of the left special symbol display unit 11, the right special symbol display unit 12, and the middle special symbol display unit 13. As shown in Tables 1 to 3, the symbol display mode when each special symbol display section is stopped is such that each symbol has a number of 0 to 9 or a character "-" in two vertical rows.
Is displayed.

[0031]

[Table 1]

[0032]

[Table 2]

[0033]

[Table 3] The segments D1 to D4 are denoted by numerals 1 to 4, respectively, and the segments E1 to E16 and the segment H
1 to H8, the segments F1 to F2, and the segments G1 to G2 are decorative portions 17 that are decoratively turned on or off in the symbol display portion 3.

The display of the change of the special symbol is performed from left to right in Tables 1 and 2. In each of the special symbol display sections 11 to 13, the number displayed from top to bottom shifts. This is performed by switching the display output to the segments A1 to A16, B1 to B16, and C1 to C16. As an example, in the left special symbol display unit 11 composed of the segments A1 to A16, the vertical 2 shown in Table 1 is used.
FIGS. 10 (a) to 11 (b) show the visual recognition state when the symbol "8-" of the row is displayed in a varied manner from the symbol "89" of the vertical two rows.
Shown in

The part below the numeral 8 formed by the segments A1 to A7 and the part above the numeral 8 formed by the segments A7 to A13, that is, the segments A4 to A7 are common. The configuration shown in FIG.
As shown in (a), when the number 8 is displayed, all of the segments A1 to A7 are turned on. Next, the processing shifts to FIG. 10B, where the lower part of the number to be displayed next is displayed in the segment A1, and the segment A4 is displayed.
To A10 are turned on, and segments A2 and A3
Is turned off. As described above, the number of segments for displaying one number is seven including those that are turned on and off, and as shown in FIGS. 11A and 11B, The process proceeds to segments A7 to A13 and segments A10 to A16.

The actual driving for the special symbol variable display is shown in Tables 1 and 2 corresponding to the segments A1 to A16.
Is set, and in addition to the display data shown in Tables 1 and 2, variable display data created based on the display data is set. By switching and outputting the variable display data at a predetermined cycle, it appears as if the display symbols are shifting so as to flow continuously in the vertical direction.

The segments D1 to D4 have the numerals 1 to 4
In the game board 10, the special symbol storage number display section 9 displays up to four winning numbers in which game balls have won in the first-type starting port 7.

In the symbol display 1, special symbol display units 11 to 13 for performing variable display of symbols, a special symbol storage number display unit 9 for displaying identification information, and a decorative unit 17 that is turned on or off in a decorative manner. If the symbol display section 3 is one display screen, they are provided close to each other on the same screen.

As shown in FIG. 8, the symbol display unit 2 is schematically shown as an exterior frame 42 mounted on the game board 10.
At the end of the exterior frame 42, a through hole 45 is formed, and is fixed to the game board 10 with screws. The symbol display unit 2 has a prize hole 41 at the top thereof,
Below the 1, a normal symbol display device 18 displayed by LEDs and a total of four normal symbol storage number LEDs 16 are arranged on each of the left and right sides of the normal symbol display device 18, two vertically. An arc-shaped game ball distribution unit 43 is protrudingly provided at the lower edge of the normal symbol display device 18, that is, in the middle of the symbol display unit 2, and obstructs visual recognition due to the rolling of the game ball and is inadvertent inside the symbol display unit 2. It prevents invasion of various game balls.

Below the game ball distribution section 43, a game board 1
A concave portion 44 is formed toward the depth 0, and a cover member 46 made of a transparent material is attached to the deep portion of the concave portion 44 so that the symbol display portion 3 of the symbol display body 1 can be visually recognized. In addition, an indicator light 50 made of an LED is embedded in the upper part of the concave portion 44.

The ordinary symbol display device 18 is provided with a left ordinary symbol display section 14 and a right ordinary symbol display section 15 on the left and right sides, and starts to vary by a later-described ordinary symbol operation switch SW1, and 7.0 seconds after the symbol variation starts. After the passage, the symbols are stopped in the order of left and right. For both the left and right ordinary symbols, the symbol variation display is performed by numbers, and the numbers displayed for variation are five types of 1, 3, 5, 9 and the symbol variation is 1 → 3 →
It fluctuates in the order of 5 → 7 → 9.

The normal symbol storage number LED 16 lights up in number each time a game ball is detected on the normal symbol operation switch SW1, and displays up to four times including the normal symbol change.

In FIG. 6, a left gate 5 and a right gate 6, which are ordinary symbol operating ports, are respectively arranged on the left and right of a symbol display unit 2 arranged substantially at the center of the game board 10. There is a decorative member 99, and below the decorative member 99 is a first-type starting port 7 as an electric accessory normal prize device linked to the left gate 5 and the right gate 6 and driven to open and close by a solenoid or the like. It is arranged.

Also, inside the left gate 5 and the right gate 6,
A normal symbol operation switch SW1 as a game ball detecting means is provided. Then, the first-type starting port 7 performs the continuous opening / closing operation based on the symbol matching specified by the ordinary symbol display device 18 of the symbol display unit 2 by the ordinary symbol operation detection switch SW1, and performs one opening operation for 0.4 second. The closing time of the opening and closing operation is set to 29.1 seconds with 3.7 closing operation being 3.7 seconds, and the opening and closing operation is performed eight times.

Inside the first-type starting port 7, a first-type starting port winning detection switch SW2 for changing the symbol of the symbol display section 3 of the symbol display unit 2 is provided. Type 1 starting port 7
When the game ball wins, the left, right, and middle special symbol display portions 11, 12, and 13 in the symbol display portion 3 of the symbol display unit 2 start changing symbols by the first-class start-up winning detection switch SW2. After a lapse of a predetermined time from the start of symbol fluctuation,
The symbols are stopped in the order of left, right and middle.
The special symbol storage number display section 9 shifts to lighting each time a game ball is detected by the first-class start-up winning detection switch SW2, and displays a maximum of four symbols including a special symbol change.

In the winning device 8 ', a large winning opening 8 driven by a solenoid or the like is provided at substantially the center thereof, and a lower left winning opening 103 and a lower right winning opening 104 are provided on both sides of the large winning opening 8. Have been. The special winning opening 8 is opened based on a symbol match specified from the symbols stopped and displayed by the left, right, and middle special symbol display units 11, 12, and 13 of the symbol display unit 2.

A specific area 47 is provided at the center of the inside of the special winning opening 8 in the winning device 8 ′, and is separated from other winning areas inside the special winning opening 8. The specific area 47 is provided with a specific area winning detection switch SW3 as an accessory continuous operating device for continuously opening the special winning opening 8. Below the special winning opening 8, a continuous number display LED 48 for numerically displaying the number of consecutive opening of the special winning opening 8 and a special winning opening number display LED for numerically displaying the number of winnings during one opening operation of the special winning opening 8.
49 are provided. On the back side of the gaming board 10 behind the special winning opening 8, a special winning opening winning switch SW4 for detecting a game ball winning the special winning opening 8 including a game ball winning the specific area 47 is provided. ing.

As shown in FIG. 35, the continuous opening operation of the special winning opening 8 is performed by the first opening operation based on the symbol matching of the symbol display unit 2 and the continuous opening by the operation of the specific area winning detection switch SW4. Up to 16 combined with movement
If one game ball wins in the specific area 47 during the opening operation, the specific area 4 is detected by detecting the first winning.
7 is to be closed. The duration of one opening operation of the special winning opening 8 is set to 29.5 seconds. However, if the total number of game balls that have won the special winning opening 8 during the one opening operation exceeds ten, 10 The first opening operation is completed by detecting the winning of the individual.

In FIG. 6, each element of the left winning opening 101, the right winning opening 102, the windmill with lamp 105, the windmill 106, the out ball receiving port 109, the ball guide rail 108, and the return rubber 107 is well-known, and therefore will be described. Omitted. Also,
Reference numerals 50 to 53 denote indicator lights, which constitute groups A, B, C, and D for each element, and are lit and blinked for each group, 50 denotes an indicator light A, 51 denotes an indicator light B, and 52 denotes a display light. Lights C and 53 are indicator lights D.

In FIG. 12, the control unit of the symbol display unit 2 has a ROM 30 storing the control program of the symbol display unit 2 and the data of the display symbol and the like, and a RAM 31 used for temporary storage of data and a control program of the ROM 30. The control unit is constituted by a CPU 32 for driving and controlling each part of the display unit 2, and also serves as a display control means and a condition detection means. Further, the control program of the ROM 30 includes a display control program serving as a setting condition for controlling the switching operation of the display output to the decorative portion 17 of the symbol display 1. Note that the ROM here does not mean a storage unit that cannot be written or rewritten.

The first-type starting port winning detection switch SW2 provided at the first-type starting port 7, the left gate 5 and the right gate 6
, A specific area winning detection switch SW3 disposed in a specific area 47 inside the special winning opening 8, and a special winning opening winning detection switch SW.
4 are connected to the CPU 32 through the switch detection unit 33, and are also left and right normal symbol display LEDs (A),
Each of (B) and the special winning opening winning number display LED 49, the ordinary symbol storing number indicating LED 16, and the continuous number LED 48 in the continuous opening operation of the special winning opening 8 are individually or simultaneously controlled by the CPU 32 via the LED display circuit 34. It is supposed to be.

The left special symbol display section 11 and the right special symbol display section 1 in the symbol display section 3 of the symbol display unit 2.
2. Each of the middle special symbol display unit 13, the special symbol storage number display unit 9, and the decorative unit 17 that is lighted or turned off decoratively,
Connected to the CPU 32 via the symbol display circuit 35,
The drive is controlled individually or simultaneously by U32.

[0053]

[Table 4] Table 4 shows the format of the display data when sent to the symbol display 2 by the CPU 32. R
Each of the segments A1 to A shown in FIG.
16, B1 to B16, C1 to C16, E1 to E1
6, D1 to D4, F1 to F2, G1 to G2, H
The display data corresponding to 1 to H4 is stored in units of 8 bits, and the CPU 32 divides each of the 8 bits of data into four ports D0 to D3 and stores three in the symbol display circuit 35. The data is stored in a total of 12 shift registers connected in series, and is converted into 20-bit data.
The display data is transmitted by providing a signal for giving a timing for shifting the 0-bit serial data and a data latch signal output after the 20-bit serial data is shifted. The transmission of the display data is performed in the order of numbers 1 to 20 in Table 3. For example, when the number is 1, data relating to the segments A1, B1, C1, and E1 is transmitted to the ports D0 to D3. In the case of the number 20, the ports D0 to D3
Data regarding the segments D4, G2, H4, and H8 is transmitted. The ports D0 to D3 are connected to the connector 27 shown in FIGS.

The CPU 32 has a solenoid SOL2 for opening and closing the special winning opening 8 in the game board 10 and a solenoid S for opening and closing the first-type starting opening 7 composed of an ordinary electric accessory.
The drive control of OL1 is performed via a solenoid drive circuit 36.

The clock / reset circuit 37 is connected to the CP
The processing cycle of U32 is defined. The CPU 32 is the game board 10
Display lamps A to D and LED 48 for displaying the number of consecutive times
, A large winning prize opening winning number display LED 49, a normal symbol storage number display LED 16 and the like, and also a drive control means such as a speaker for outputting a sound effect. Omitted.

Hereinafter, a flowchart (FIGS. 13 to 30) showing a main part of the control program stored in the ROM 30 will be described.
The processing operation of the symbol display body in the pachinko machine according to the present embodiment will be described with reference to FIG. The processing of task 1 shown in FIGS. 13 to 15 and the processing of task 2 shown in FIGS.
And the processing of task 3 shown in FIGS. 19 to 26,
The processing of task 4 shown in FIGS. 27 to 29 and the processing of task 5 shown in FIG. 30 are repeatedly performed in parallel by the CPU 32 every predetermined processing cycle (on the order of μs) in accordance with a signal from the clock / reset circuit 37. To do.

The processing of task 1 shown in FIGS.
The CPU 32 sets the value of the random number for jackpot at every predetermined cycle from 0 to 1.
025, which is generated by sequentially incrementing the random number, and based on the value of the random number for the big hit, set the respective values of the random number for the variable time, the left and right normal symbol data and the left, middle and right special symbol data, , Right, and middle special symbol data to create left, right, and middle special jackpot symbol data and left, right, and middle special out-of-design symbol data. The passage of the left and right gates 5 and 6 is stored up to four times, and each time a winning detection signal is received from the first-type start winning detection switch SW2, the value of the big hit random number is stored up to four.

The CPU 32 successively increments the value of the big hit random number in the range of 0 to 1025 every predetermined processing cycle, and sets the value of the big hit random number storage register RAN1 to 102.
Each time the value reaches 5, the value of the register RAN1 is initialized to 0, and the value of the variable time random number storage register RAN2 is cyclically switched between 0 and 1 each time the value of the register RAN1 is incremented by one. (Step a1 to Step a6).

Next, the CPU 32 executes a process for setting each value of the left and right ordinary symbol data and the left, right and middle special symbol data by executing a process of storing the big hit random number storage register RAN1.
Register bit x and bit 3 (values from 0 to 3) in register x
, And similarly, the random number storage register for jackpot RAN1
Are stored in registers y, z respectively (step a7), and the values of registers x, y, z are respectively stored in left special symbol data storage register r0. (Values from 0 to 14), right special symbol storage register r1 (values from 0 to 14), and middle special symbol storage register r2 (values from 0 to 19).
The values are added to the left ordinary symbol data storage register Rl (values from 0 to 4) and the right ordinary symbol data storage register Rr (values from 0 to 4), and the operation results are added to the respective registers r0 to r2, The data is stored in the registers Rl and Rr (step a8).

The CPU 32 determines that the value of each of the left and right special symbol storage registers r0 and r1 is 1
It is determined whether it is 5 or more.
By subtracting 15 from the values of 0 and r1, it is determined whether or not the register value of the middle special symbol data storage register r2 is 20 or more, and if it is 20 or more, 20 is subtracted from the value of the register r2. Then, the values of the left, right, and middle special symbol data storage registers r0 to r2 are determined (step a9).

The CPU 32 determines whether or not the value of each of the left and right normal symbol data storage registers Rl and Rr is 5 or more.
By subtracting 5 from the value of Rr, the values of the left and right ordinary symbol data storage registers Rl and Rr are determined (step a).
10).

As a result, any value from 0 to 4 is set in the left and right ordinary symbol data storage registers Rl and Rr, and any value from 0 to 14 is set in the left and right special symbol data storage registers r0 and r1. Any value is set, and any value from 0 to 19 is set in the middle special symbol data storage register r2. Here, the registers x, y, and z are CP
U32 is a register used for internal processing. The values stored in the left and right ordinary symbol data storage registers Rl and Rr and the left, right and middle special symbol storage registers r0 to r2 are values of internal processing indices.

The CPU 32 changes all the values stored in the left, right, and middle special symbol storage registers r0 to r2 one by one in each processing cycle to create all the combination symbols capable of displaying symbols, and It is determined whether the combination of the internal processing indices created in the processing cycle is related to a hit symbol or a missing symbol (step a).
11 to step a12), if it is a hit symbol, the current values of r0 to r2 of the respective internal processing indices are stored in the left, right, and middle and big hit symbol data storage registers r0a to r2a, respectively (step a13). If the combination of the internal processing indices created in the cycle is related to a lost symbol, the current value of each of the internal processing indices r0 to r2 is stored in each of the left, right, and centered symbol data storage registers r0b to r2b (step). a14).

Accordingly, in each of the left, right, and middle and big hit symbol data storage registers r0a to r2a, only the value of the internal processing index relating to the hit symbol is sequentially updated and stored. In each of the storage registers r0b to r2b, only the value of the internal processing index relating to the lost symbol is sequentially changed and stored.

Then, the CPU 32 determines whether or not a detection signal has been input from the left and right normal symbol operation switch SW1 (step a15). The value of the passage storage number register N1 for storing the passage number of the right gates 5, 6 is incremented (step a16), and then the passage storage number register N
It is determined whether the value of 1 is 5 or more (step a17),
If it is determined that the number is equal to or more than 5, the passage storage number register N1
Is set to 4 (step a18). As a result,
Up to four passing of game balls in the left and right gates 5 and 6 as normal symbol operation ports are stored. If the game balls do not pass through the left and right gates 5, 6, the detection signal is not input, and the value of the passage storage number register N1 is not updated.

Further, when a winning detection signal is input from the first-type starting opening winning detection switch SW2 (step a19), the CPU 32 increments the winning storage number register N2 by one (step a20), and stores the winning storage number. It is determined whether the current value of the register N2 is 5 or more (step a2).
1) If the current value of the winning storage number register N2 is 5 or more, 4 is set in the winning storage number register N2 (step a22). Further, every time a winning detection signal is input from the first-type start-up winning detection switch SW2, the current value of the big hit random number storage register RAN1 is stored in the unused fixed random number storage register Ri (steps a23 to a23).
Step a28). Each time the CPU 32 detects an input to the first-type starting port 7, the storage state identification flag Fi detects an unused definite random number storage register Ri based on the value of the search index i. Since the current value of the big hit random number storage register RAN1 is stored and the storage state identification flag Fi is set, the value of RAN1 at the time of winning detection is stored in the fixed random number storage register Ri as shown in FIG. Up to four will be stored.

The value of the big hit random number storage register RAN1 changes in a regular manner at every predetermined processing cycle. However, what is the causal relationship between the timing of winning detection to the first type starting port 7 and the current value of RAN1? RAN1 at the time of winning detection
Can be used as a random number. The relationship between the value of the internal processing index stored in the special symbol storage registers r0 to r2 and the symbol is as shown in Tables 1 to 3. Therefore, in order to create a pattern of all possible combinations in a single cycle, 15 × 15 × 20 times of processing are required for a special symbol.

[0068]

[Table 1]

[0069]

[Table 2]

[0070]

[Table 3] In addition, the combination of the symbol which becomes a big hit with the special symbol is left,
This is a case where each of the right and middle special symbols is a stop symbol shown in Table 5.

[0071]

[Table 5] That is, the left, right, middle and big hit symbol data storage register r0
The combinations of symbols stored in a to r2a are left, right, and middle ones of the same symbols in the upper or lower row of each of the special symbol display sections 11 to 13, and all other combinations are left, Right, missing symbol data storage register r0b
To r2b, the probability of a big hit on the display is a value obtained by dividing the number of winning symbol combinations by the total number of symbol combinations, ie, 20/4500.

In the embodiment, with respect to ordinary symbols,
The symbol to be displayed when the variable display is stopped is not selected. However, regarding the special symbol, the relationship between the value of the fixed random number storage register Ri set at the time of winning detection to the first type starting port 7 and the set value is set. Since the symbols to be displayed when the variable display is stopped are selected based on the change, the probability of occurrence of a big hit can be arbitrarily set irrespective of the combination occurrence probability of each special symbol. The values of the registers r0a to r2a, the registers r0b to r2b, and the registers r0 to r2 indicate the values of the internal processing indices, and represent the current values of the display indices il, ic, and ir used for the actual fluctuation display. Is irrelevant.

The processing of task 2 shown in FIG. 16 to FIG. 18 is usually related to the variable display of symbols. The CPU 32
First, whether or not a new normal symbol variation display can be started based on the detection signal of the left and right ordinary symbol operation switch SW1 is determined by whether or not 1 or 2 or 3 or 4 is set in the ordinary symbol operation flag fa. Detect (Step b1, Step b2, Step b3, and Step b4). If the value of the ordinary symbol operation flag fa is 1, the left ordinary symbol variation display is being executed, and if the value of the ordinary symbol operation flag fa is 2, the right ordinary symbol variation display is being executed.
If the value of the ordinary symbol operation flag fa is 3, the opening / closing operation of the first type start-up port 3 is being executed, and if the value of the ordinary symbol operation flag fa is 4, the ordinary symbol variation display can be started. In this case, a new symbol variation display cannot be started. Note that when the value of the ordinary symbol operation flag fa is 1, the CPU 32 continuously executes the left ordinary symbol change display of the symbol in the processing of the task 2, and when the value of the ordinary symbol operation flag fa is 2, the task 32 In the process of 2, the right ordinary symbol variation display of the symbol is continuously executed, and when the value of the ordinary symbol operation flag fa is 3, step b
Since the process is terminated only by displaying the value of the number-of-passes storage register N1 on the number 33 of ordinary symbol stored number display LEDs 16, the process of task 2 is substantially not executed.

The process of displaying the value of the number-of-passes storage register N1 on the ordinary symbol storage number display LED 16 in step b33 is always executed in task 2 and is finally executed in task 2. Hereinafter, the description will be repeated, and thus will be omitted.

When the normal symbol operation flag fa is 1 or 2
Or, if the value is other than 3 or 4, neither the normal symbol fluctuation display nor the opening / closing operation of the first type start-up port 3 is performed, nor is the standby time until the start of the normal symbol fluctuation display. Is ready to start. In the initial stage, fa =
0, and is in a signal detection waiting state.

In this case, the CPU 32 first determines whether or not the gate detection has already been performed, and determines whether or not the value of the passage number storage register N1 is 0, that is, the left and right gates 5 and 6 in the processing of the task 1. It is determined whether or not a game ball has already passed through is detected (step b5).

If the passage of the game ball through the gate is detected by the left and right normal symbol operation switch SW1, the CPU 32 increments the value of the passage number storage register N1 by one at the time when the passage of the gate is detected in the processing of the task 1. ,
If a value other than 0 is set to the value of the number-of-passes storage register N1, it means that it has been detected at least once whether or not a game ball has passed through the left and right gates 5, 6. a15 to step a18).

If a value other than 0 is set in the passage number storage register N1, the CPU 32 proceeds to step b6.
Then, 1 is set to the normal symbol operation flag fa to store the start of the normal symbol variation display (step b6), and t1
A predetermined value is set to the parameters from t3 to t3 (step b7). As shown in FIG. 32, t1 and t3 are variable values of the left and right ordinary symbols, and fixed values indicating from symbol stop to stop symbol determination.

In the discriminating process of step b5,
When it is determined that the value of the number-of-passes storage register N1 is 0, the CPU 32 sets the normal symbol storage number display L in step b31 similarly to the case where the value of the ordinary symbol operation flag fa is 3.
Since the process is terminated only by displaying the value of the number-of-passes storage register N1 on the ED 16, the process of the task 2 is substantially not executed. In this case, the value of the number-of-passes storage register N1 is 0, so that the number
6 is not actually lit at all.

The CPU 32 having set the fluctuation time of each of the left and right ordinary symbols, then sets the left and right of the ordinary symbol display section 18 composed of an LED display having seven segments as one display unit.
The process of continuously incrementing the right ordinary symbol display LEDs (A) and (B) to start the variation display of each ordinary symbol is started (step b8), and the timer Ta is operated to measure the elapsed time after the start of the variation display. Is started (step b9). In addition, actual symbol feed is each symbol display LED (A), (B)
This is performed by switching the display output data of each row at predetermined intervals, but this point is well known as a display technique using an LED element or the like, and the description thereof is omitted. In the case of the embodiment, each of the times t1 to t3 from the start of the variable display is the time t1 until the stop of the left ordinary symbol is 7.000.
Seconds, the time t2 until the stop of the right normal symbol is 7.588 seconds,
The time t3 until the stop symbol determination is set to 7.592 seconds.

In the processing after the next cycle, since the normal symbol operation flag fa has already been set to 1, the CPU 32 proceeds to step b10 after executing the discrimination processing in step b1.
Until the elapsed time Ta after the start of the fluctuation display reaches the set value t1, the determination processing of steps b1 and b10 and the processing of step b11 relating to the fluctuation display of the left and right ordinary symbol display LEDs (A) and (B). Is repeatedly executed in a predetermined processing cycle.

In this manner, the elapsed time Ta after the start of the variation display is performed while the variation process of the left and right normal symbols is repeatedly executed.
Reaches the set value t1 (step b10), the CPU 3
2 is replaced with the value of the display index iu relating to the left ordinary symbol corresponding to the value of the left ordinary symbol data storage register Rl and set in the left ordinary symbol display register rlc (step b1).
2), the fluctuation of the left normal symbol display LED (A) is stopped (step b13), the normal symbol operation flag fa is set to 2 (step b14), and the process of this cycle is ended.

The relationship between the values of the internal processing indices stored in the ordinary symbol data storage registers Rl and Rr and the symbols is shown in Table 8 and Table 9 by the values of the internal processing indices iu and iv in the respective normal display indices iu and iv. Has been replaced.

[0084]

[Table 8]

[0085]

[Table 9] When the fluctuation of the left ordinary symbol display LED (A) is stopped, the symbol corresponding to the internal index stored in the left ordinary symbol data storage register Rl is statically displayed on the left ordinary symbol display unit 14. Become. Even when normal display control is disturbed by the influence of external noise or the like, the relationship between the value of the display index iu and the left ordinary symbol is always ensured.

In the processing after the next cycle, the value of the ordinary symbol operation flag fa becomes 2, so that the CPU 32
After the execution of the determination process in step b2, the process proceeds to step b32 to determine whether or not the ordinary symbol stop flag f 'is 1. The ordinary symbol stop flag f' includes left and right ordinary symbols. When both are stopped, 1 is set, and the current value of the symbol stop flag f 'is normally set to 0. Therefore, the CPU 32 proceeds to step b15, and executes steps b1, step b2 and step b until the elapsed time Ta after the start of the variable display reaches the set value t2.
The determination process of step 32 and step b15 and the process of step b16 relating to the variable display of the right normal symbol display LED (B) are repeatedly executed at a predetermined processing cycle.

When the elapsed time Ta reaches the set value t2 in the determination processing of step b15, C
The PU 32 substitutes the value of the display index iv for the right ordinary symbol corresponding to the value of the right ordinary symbol data storage register Rr and sets the value in the right ordinary symbol display register rrc (step b17), and sets the right ordinary symbol display LED (B). The fluctuation is stopped (step b18), the normal symbol stop flag f 'is set to 1 (step b19), and it is determined whether or not the time Ta until the normal symbol determination reaches the set value t3 (step b).
20), the processing in this cycle ends.

When the fluctuation of the right ordinary symbol display LED (B) is stopped, the symbol corresponding to the index stored in the right ordinary symbol data storage register Rr is statically displayed on the right ordinary symbol display LED (B). Will be done. Further, even when normal display control is hindered by the influence of external noise or the like, the relationship between the value of the display index iv and the right ordinary symbol is always ensured.

Then, the CPU 32, which has finished displaying the variation of the left and right ordinary symbols, proceeds to step b32 after executing the determination processing in steps b1 and b2, and determines the result of the determination in step b32 by the current value 1 of the ordinary symbol stop flag f '. Is true, and the process proceeds to step b19. Until the elapsed time Ta after the start of the variable display reaches the set value t3, steps b1, step b2, step b32 and step b32 are performed.
20 is executed at a predetermined cycle.

If the elapsed time Ta reaches the set value t3 in the determination processing of step b20, the CPU 32
Initializes the value of the normal symbol stop flag f '(step b21) and sets the left and right normal symbol display registers rlc and rr
Left and right ordinary display indices iu and iv stored in c
Is determined (step b22), and if they match, the normal symbol operation flag fa is set to 3 (step b23), and the number of times of opening and closing operation of the first type start-up port 7 is set. Initialize the storage register C1 (step b2
4), the operation time flag ft is initialized (step b2)
5) Task 4 related to opening / closing operation of the first type starting port 7
Allow execution of processing.

If the combination of the symbols is not the same, it is determined whether or not the number-of-passes storage register N1 has a storage of the next ordinary symbol change (steps b26 to b26).
Step b27).

In this case, since the number-of-passes storage register N1 has not been updated except for the processing of steps a15 to a18 of task 1, the number-of-passes storage register N1 has a storage of the next ordinary symbol change. Means that the value of the passing number storage register N1 only needs to be 2 or more. If the value of the passage number storage register N1 is 1
In the case of, it means the process related to the ordinary symbol change performed this time, and therefore does not relate to the next ordinary symbol change.

If the CPU 32 determines in step b27 that the value of the passage number storage register N1 is 2 or more, that is, if it is determined that there is a memory relating to the next ordinary symbol change, the CPU 32 determines Symbol operation flag fa
Is set to 4 (step b28), the timer Ta is operated to start measuring the elapsed time Ta of the standby time (step b29), and the processing of this cycle is ended.

After the next cycle, the normal symbol operation flag fa
Is 4, the CPU 32 determines that the elapsed time T
Until a reaches the set value t4, the discriminating process of steps b1 to b4 and the discriminating process of step b30 are executed at a predetermined processing cycle, and when it is determined that the elapsed time Ta has reached the set value t4. (Step b30), the value of the passage number storage register N1 is reduced by one (Step b31),
Initialize the normal symbol operation flag fa (step b3
2) The pass number storage register N is set to the normal symbol display LED 16
The value of 1 is displayed as the number of lightings (step b33), and the processing of this cycle ends.

If it is determined in step b26 that the value of the number-of-passes storage register N1 is 1, the CPU 32 initializes the normal symbol operation flag fa (step b32) and displays the normal symbol. LED16
Then, the value of the number-of-passes storage register N1 is displayed (step b33), and the processing of this cycle is ended.

In the embodiment, the probability of occurrence per ordinary symbol is that the number of possible values of the left and right ordinary symbol data storage registers Rl and Rr is five, and the number of combinations where the left and right are the same symbol is determined by the left and right. Is usually divided by the total number of symbol combinations, so the probability of occurrence per symbol is usually 1 /
5 (0.2). Therefore, a mechanical rotary drum type symbol display device that has two rotary drums that represent the symbols shown in Tables 1 and 2 and that sets a condition that the same symbols are aligned as a combination of symbols. Occurrence probability 5/2
5 (0.2).

The processing of task 3 shown in FIGS. 19 to 26 mainly relates to the variable display of a special symbol set on the symbol display section 3 of the symbol unit 2. The CPU 32 that has started the processing of the task 3 first sets 1 or 2 in the state storage flag Fa as to whether or not it is possible to start a new special symbol change display based on the detection of winning in the first-type starting opening 7. (Step c1, Step c
2). If the value of the state storage flag Fa is 1, the special symbol change display is being executed, and the state storage flag Fa
If the value of is 2, the opening operation of the special winning opening 8 is being executed, and in any case, a new special symbol variation display cannot be started. When the value of the state storage flag Fa is 1, the CPU 32 continuously executes the display of the change of the special symbol in the processing of the task 3, and when the value of the state storage flag Fa is 2, substantially, The process of task 3 is not executed.

If the state storage flag Fa is a value other than 1 and 2, no special symbol change display or opening operation of the special winning opening 8 is performed, so that a new special symbol change can be started. is there. At the initial stage, Fa = 0, and the first
The detection of the winning at the seed starting port 7 is awaited.

In this case, the CPU 32 first determines whether or not 1 is set in the storage state identification flag F0, that is,
It is determined whether or not the winning in the first type starting port 7 has already been detected in the processing of the task 1 (step c3).

If a winning in the first-type starting port 7 is detected, the big hit random number storage register R at the time of winning detection is detected.
When the value of AN1 is determined in the processing of task 1, the determined random number storage register R
i is set to 1 in the storage state identification flag Fi corresponding to the determined random number storage register Ri, and at this time, the CPU 32 sets i = Since the random numbers are stored in the determined random number storage register Ri in the order of 0 to 3, if 1 is set in the storage state identification flag F0, a prize to the first type starting port 7 is detected at least once. (Step a
23 to step a28).

If the storage state identification flag F0 is set to 1, the CPU 32 proceeds to step c4, sets 1 to the state storage flag Fa, stores the start of the variable display, and performs the variable display selection processing. Is set to 0 (step c5), and the variable state storage flag Fb defining
A predetermined value is set to the parameters tg to tg (step c6). As shown in FIG. 33, ta to te are fixed values indicating the switching time of the changing speed of each of the left, right, and middle special symbols.

The CPU 32 which has set the switching time of the change speed of each of the left, right, and middle special symbols, then sets the left, right, and middle special symbol display sections 11, 12, and 13 of the symbol display section 3.
The process of continuously changing the value of the variation display data indicating the symbol to be displayed in each of the symbols and starting the process of rapidly varying each symbol is started (step c7), and the timer T is operated to elapse the time after the start of the variation display. Is started (step c8), and the numbers corresponding to the numbers 1 to 4 which are composed of the segments D1 to D4 are displayed on the special symbol storage number display section 9 corresponding to the values stored in the winning storage number register N2. The light is turned on (step c100). The actual symbol feed is performed by each segment A1 to A16, B of each special symbol display section 11, 12, 13.
By switching the display output of each of the first to B16 and C1 to C16 at predetermined intervals, the display is continuously performed as if the symbols flow up and down.
Since it is well known as a segment type display technology using elements and the like, description thereof will be omitted.

In the case of the embodiment, the reference value of the symbol feed speed of each special symbol at the time of high speed fluctuation is 0.096 seconds / symbol, and the reference value of the symbol feed speed of the left and right special symbols is 0 at the time of low speed fluctuation. .288 seconds / design. Also, the reference value of the symbol feed speed at the time of low speed fluctuation of the middle special symbol is
It depends on the stop symbols of the left and right special symbols. When the left and right stop symbols match (hereinafter referred to as “reach”), 0.38
When 4 seconds / symbol does not coincide with the left and right stop symbols (hereinafter, referred to as non-reach), two types are set at 0.288 seconds / symbol.

When the present value of the winning number register N2 is 0, there is no winning in the first kind opening 7, so that the special symbol storing number display section 9 is not actually turned on.
Task 3 is not processed. The process of displaying the number of winning prizes on the special symbol storage number display section 9 in step c100 is always executed in the task 3 and finally performed in the task 3, and will not be described here because the description is repeated. I will do it.

As described above, the change display of the special symbol based on the winning detection in the first kind opening 7 is started. At the time of the start of the change display, the value after te shown in FIG. The value which regulates the time of the low speed fluctuation of the middle special symbol display section 13 is not set.

In the processing after the next cycle, since the state storage flag Fa has already been set to 1, the CPU 32 as the display control means proceeds to step c9 after executing the determination processing in step c1, and thereafter, changes the state storage flag Fb. Is set to the set value ta in accordance with the current value 0
, And the step c1 relating to the high-speed fluctuation of the special symbol display units 11, 12, and 13 of the left, right, and middle special symbol display units in steps c1 and c9 to c10.
11 is repeatedly executed at a predetermined processing cycle.

When the elapsed time T after the start of the fluctuation display reaches the set value ta while repeatedly executing the high-speed fluctuation processing of each special symbol in this way (step c10), the CPU 32
31 reads the value of the fixed random number storage register R0 and stores it in the fixed value storage register Ra (step c12).
As shown in (b), the data in the storage state identification flags F1 to F3 and the determined random number storage registers R1 to R3 are sequentially shifted to the storage state identification flags F0 to F2 and the determined random number storage registers R0 to R2, and the storage state is determined. The identification flag F3 and the determined random number storage register R3 are set to 0 (step c13).

Next, the CPU 32 determines whether or not the value of the fixed value storage register Ra matches the set value ε, that is, at the time of detecting a winning in the first-type start-up port 7 which has been the starting stimulus of the current symbol variation processing. Jackpot random number storage register RAN1
(Step c14), and if the value of the definite value storage register Ra matches the set value ε, the left, right, and middle special big hit symbol data is stored. The values of the registers r0a to r2a are left, right,
While storing in the middle and display special symbol storage registers r0c to r2c (step c15), the fixed value storage register Ra
Is not equal to the set value ε, the values of the left, right, and middle special out-of-design symbol data storage registers r0b to r2b are stored in the left, right, and middle special symbol storage registers r0c to r2c.
(Step c16), and the symbols to be displayed on the special symbol display sections 11, 12, and 13 when the fluctuation stops are determined.

In the embodiment, the value of the set value ε is 15, 31,
47, 63, and 79 are set to five types of numerical values.

Next, the CPU 32 determines the value of the display index il relating to the left special symbol so that the symbol corresponding to the internal processing index of the left special symbol storage register r0c is displayed at the time of the fluctuation stop time tb of the left special symbol display section 11. Is changed (step c17), the fluctuation speed of the left special symbol display unit 11 is switched from the high speed fluctuation to the low speed fluctuation (step c18), and the fluctuation state storage flag Fb is set to 1 (step c19). The processing of the cycle ends.

Although the value of the display index il of the left special symbol display unit 11 at the time of ta is not obvious, the value of the left special symbol display unit 11 is not obvious.
Is set in advance, and since the low speed fluctuation speed of the left special symbol display unit 11 is constant, the value of the low fluctuation time tb−ta = 0.192 s is constant. The setting change value of the display index il can be obtained based only on the information of the display index r0c of the symbol to be displayed on the left special symbol display section 11.

According to the processing timing of the embodiment, when switching from the high-speed fluctuation to the low-speed fluctuation, the present value of the display index il is one more than the display index r0c of the symbol to be displayed on the left special symbol display section 11 when the fluctuation is stopped. By changing the setting of the value of il so as to be a display index before the symbol, it is possible to obtain a symbol of r0c when the fluctuation is stopped.

In the processing after the next cycle, the CPU 32 proceeds to step c20 after executing the determination processing in step c1 and step c9, and thereafter, according to the current value 1 of the fluctuation state storage flag Fb, the elapsed time after the start of the fluctuation display. T is the set value t
Until it reaches b, the determination processing of step c1, step c9 and step c20 to step c21, the processing relating to the low-speed fluctuation of the left special symbol display unit 11,
The processing of step c22 relating to the high-speed fluctuation of each of the special symbol display sections 12 and 13 on the right is repeatedly executed at a predetermined processing cycle.

While the variation process of each symbol is repeatedly executed as described above, the elapsed time T after the start of the variation display is set to the set value t.
b (step c21), the CPU 32 stops the low speed fluctuation of the left special symbol display section 11 (step c2).
3) The variable state storage flag Fb is set to 2 (step c24), and the processing in this cycle ends. At the time point when the low-speed change of the left special symbol display section 11 is stopped, the symbol corresponding to the index stored in the left special symbol storage register r0c is statically displayed on the left special symbol display section 11. If normal display control is hindered by the influence of external noise or the like, another symbol may be displayed when the variable display is stopped. Even in such a case, the display index il
Is displayed on the basis of the data read from the ROM 30 based on the value of the display index i.
The relationship between the value of l and the left symbol is always ensured.

In the processing after the next cycle, the value of the fluctuation state storage flag Fb becomes 2, so that the CPU 32 executes step c1,
After the execution of the discriminating processes in steps c9, c20, and c25, the process proceeds to step c26. Thereafter, according to the current value 2 of the fluctuating state storage flag Fb, until the elapsed time T after the start of fluctuating display reaches the set value tc. While step c
The discriminating process of step c9, step c20, step c25 and the process of step c27 relating to the high-speed fluctuation of the right and middle special symbol display units 12, 13 are repeatedly executed at a predetermined processing cycle.

When the elapsed time T has reached the set value tc in the determination process of step c31 (step c26), the CPU 32 sets the right display special during the fluctuation stop time td of the right special symbol display unit 12. Symbol storage register r1
The value of the display index ir relating to the right symbol is set and changed so that the symbol corresponding to the internal processing index of c is displayed (step c28), and the fluctuation speed of the right special symbol display unit 12 is switched from the high speed fluctuation to the low speed fluctuation. Together with (step c2
9), the variable state storage flag Fb is set to 3 (step c30), and the processing in this cycle is ended.

The low speed fluctuation time td of the right special symbol display section 12
The value of −tc = 1.056s is a preset value,
Since the low speed fluctuation speed of the right special symbol display unit 12 is the same as that of the left special symbol display unit 11, the condition for changing the setting of the display index ir is the current value of the display index ir when switching from the high speed fluctuation to the low speed fluctuation. Is greater than the display index r1c of the symbol to be displayed on the right special symbol display section 12 when the fluctuation stops.
By changing the value of ic so as to be a display index before the symbol, it is possible to obtain the symbol r1c when the fluctuation is stopped.

In the processing after the next cycle, the value of the fluctuation state storage flag Fb becomes 3, so that the CPU 32 executes step c1,
After executing the determination processing of step c9, step c20, step c25, and step c30, the process proceeds to step c31,
Hereinafter, in accordance with the current value 3 of the fluctuation state storage flag Fb, steps c1, step c9, step c20, step c25, step c30, and step c31 until the elapsed time T after the start of the fluctuation display reaches the set value td. And the processing of step c32 relating to the low-speed fluctuation of the right special symbol display section 12 and the high-speed fluctuation of the middle special symbol display section 13 are repeatedly executed at a predetermined processing cycle.

When the elapsed time T reaches the set value td in the determination processing of step c32, the CP
U32 stops the low speed fluctuation of the right special symbol display section 12 (step c33), sets 4 to the fluctuation state storage flag Fb (step c34), and ends the processing of this cycle.
When the low speed fluctuation of the right special symbol display section 12 is stopped,
In the right special symbol display unit 12, the symbol corresponding to the index stored in the right display special symbol storage register r1c is statically displayed. Further, even when normal display control is hindered by external noise or the like, the relationship between the value of the display index ir and the right symbol is always ensured.

That is, each of the left special symbol display section 11 and the right special symbol display section 12 displays C at the time when predetermined set times tb and td have elapsed after the start of the variable display of the symbols.
The processing is individually stopped by the processing of the PU 32.

In the processing after the next cycle, the value of the fluctuation state storage flag Fb becomes 4, so that the CPU 32 executes step c1,
After execution of the discriminating processes of Step c9, Step c20, Step c25, Step c30, and Step c35, the process proceeds to Step c36, and thereafter, the elapsed time T after the start of the fluctuation display is set according to the current value 4 of the fluctuation state storage flag Fb. Value t
Until e is reached, the determination processing of step c1, step c9, step c20, step c25, step c30, step c35, and step c36 and the processing of step c37 relating to the high-speed fluctuation of the middle special symbol display unit 13 are performed by predetermined processing. It is executed repeatedly in a cycle.

When the elapsed time T reaches the set value te in the determination process of step c36, the CP
U32 is whether or not the current value of the display index il of the left special symbol display unit 11 and the current value of the display index ir of the right special symbol display unit 12 match, that is, the left special symbol display in which the variable display is stopped. A comparison is made as to whether the symbol combination of the part 11 and the right special symbol display part 12 satisfies the required condition of the combination of the big hit symbols (step c38), and according to the comparison result, t
Various kinds of data required for the special symbol fluctuation process after the time f, that is, for setting the time of the low speed fluctuation of the middle special symbol display unit 13 are set.

First, when the determination result of step c38 is false, that is, the stop symbol of the left special symbol display unit 11 and the stop symbol of the right special symbol display unit 12 do not match, and the probability of a big hit occurring When there is no “?”, The CPU 32 sets a predetermined value as a parameter of tf indicating the switching time of the changing speed of the middle special symbol (step c3).
9) The display index i relating to the middle symbol so that the symbol corresponding to the internal processing index of the middle display special symbol storage register r2c is displayed at the time of the fluctuation stop time tf of the middle special symbol display unit 13.
The value of c is changed (step c40), the speed of change of the middle special symbol display unit 13 is switched from high speed change to low speed change (step c41), and the change state storage flag F is changed.
b is set to 5 (step c42), and the processing of this cycle is ended.

The low speed fluctuation time tf of the special middle symbol display section 13
Since the value of −te = 0.192 s is fixed, it is displayed based on only the information of the display index r2c of the symbol to be displayed on the special middle symbol display unit 13 at the time of the fluctuation stop time tf of the middle special symbol display unit 13. A setting change value of the index ic can be obtained. According to the processing timing of the embodiment, at the time of switching from the high-speed fluctuation to the low-speed fluctuation, the current value of the display index ic is one symbol before the display index r2c of the symbol to be displayed on the middle special symbol display unit 13 when the fluctuation is stopped. I to be a display index
By changing the value of c, it is possible to set r2c
Can be obtained.

When the result of the determination in step c38 is true, that is, when the stop symbol on the left special symbol display section 11 and the stop symbol on the right special symbol display section 12 match, it is necessary to combine the big hit symbols. If the conditions are satisfied, the CPU 32
Changes the current value of the display index ic relating to the middle special symbol to a value corresponding to a specific symbol ("-" in the upper line, "7" in the lower line) (step c43), and thereafter, the random number storage register for fluctuation time RAN2 The parameter of tf is selectively set based on the value of and the information of the display index r2c to be displayed when the fluctuation stops (step c44 to step c4).
6).

That is, the random number storage register for fluctuation time RAN
When the value of 2 is 0, RO as shown in Table 6
Based on the selection condition file of M30, the change time X corresponding to the display index r2c of the symbol to be displayed when the change is stopped is selected, and the parameter tf is set to te + X (step c).
45) If the value of the variable time random number storage register RAN2 is 1, the ROM 3 as shown in Table 7 is used.
Based on the selection condition file of 0, the change time X corresponding to the display index r2c of the symbol to be displayed when the change is stopped is selected, and the parameter tf is set to te + X (step c4).
6).

[0127]

[Table 6]

[0128]

[Table 7] Therefore, the value of the random number storage register for fluctuation time RAN2 is 0
And the display index r2 of the symbol to be displayed when the fluctuation stops.
If the value of c is 0, 1.920 s is selected from Table 6 as the variation time X, and the value of the parameter tf is te +
If X = 8.256 s, and the value of the fluctuating time random number storage register RAN2 is 1 and the value of the display index r2c of the symbol to be displayed when the fluctuation is stopped is 19,
16.896s is selected from Table 7 as the fluctuation time X,
The value of the parameter tf is te + X = 23.232 s.

That is, step c45 and step c
The processing in step 46 is performed at the start of the low-speed fluctuation corresponding to the value of the symbol display index r2c to be displayed when the fluctuation is stopped while the fluctuation time at the low speed is constant, as in the processing shown in steps c17, c28 and c40. Instead of resetting the value of the display index ic in, the value of the display index ic at the start of the low-speed fluctuation is determined to a specific value and the low-speed fluctuation corresponding to the value of the display index r2c of the symbol to be displayed when the fluctuation stops. Set the time.

The values of the fluctuation time shown in Tables 6 and 7 are examples based on the processing timing of the embodiment, and do not limit the fluctuation time and the like.

Then, the CPU 32 having set the parameter of tf in the processing of step c45 or step c46.
Switches the fluctuation speed of the middle special symbol display unit 13 from the high speed fluctuation to the low speed fluctuation (step c41), sets 5 to the fluctuation state storage flag Fb (step c42), and ends the processing of this cycle.

As a result of the variable state storage flag Fb being set to 5, in the processing after the next cycle, steps c1, c9, c20, c25, c
After executing the determination processing of step 30, step c35 and step c47, the CPU 32 proceeds to step c48, and
In accordance with the current value 5 of the fluctuation state storage flag Fb, steps c1, step c9, step c20, step c25, step c30, step c35, and step c1, until the elapsed time T after the start of the fluctuation display reaches the set value tf. The determination process of steps c47 to c48 and the process of step c49 relating to the low-speed fluctuation of the middle special symbol display unit 13 are repeatedly executed at a predetermined processing cycle.

When the elapsed time T reaches the set value tf in the determination process of step c48, the CP
U32 stops the low speed fluctuation of the middle special symbol display section 13 (step c50), sets 6 to the fluctuation state storage flag Fb (step c51), and sets a predetermined value to the parameter tg (step c52). Then, the timer T is operated to start measuring the elapsed time after each special symbol is stopped (step c53), and the processing in this cycle is ended.

When the low-speed fluctuation of the middle special symbol display section 13 is stopped, the symbol corresponding to the index stored in the middle special symbol storage register r2c is statically displayed on the middle special symbol display section 13. Becomes Further, even when normal display control is disturbed by the influence of external noise or the like, the relationship between the value of the display index ic and the middle symbol is always ensured.

Then, the CPU 32, which has finished displaying the variation of all the symbols, sets the value of the variation state storage flag Fb to 6 in the processing after the next cycle.
9, Step c20, Step c25, Step c3
After execution of the discrimination processing of 0, step c35, and step c47, the process proceeds to step c54 to step c55, and thereafter, the elapsed time T after the start of the variable display reaches the set value tg according to the current value 6 of the variable state storage flag Fb. Until step c1, step c9, step c20, step c
25, step c30, step c47, and steps c54 to c55 are repeatedly executed in a predetermined processing cycle.

When the elapsed time T reaches the set value tg in the determination processing of step c55, the CP
U32 is whether or not the current value of the display index il of the left symbol display unit 11 matches the current value of the display index ir of the right symbol display unit 12 (step c56), and the display of the left symbol display unit 11 Whether the current value of the index il matches the current value of the display index ic of the middle symbol display unit 13 (step c)
57) That is, it is determined whether or not the finally displayed left, right, and middle symbol display portions 11, 12, and 13 are the stop symbols of the big hits shown in Table 5, and the symbols are matched. Various data required for the opening operation processing of the special winning opening 8 of the task 5 will be set according to the mismatch, that is, whether or not it is a big hit.

As described above, even in cases other than the reach in the processing in step c38, the symbols in the processing in steps c56 and c57 are determined as to whether or not a big hit has occurred.

First, step c56 or step c5
When the determination result of No. 7 is false, that is, when each stop symbol of the left, right, and middle symbol display sections 11, 12, and 13 is an off-stop symbol different from the jackpot stop symbol shown in Table 5,
The CPU 32 determines whether or not the winning in the first kind opening 7 relating to the next special symbol change is stored based on whether or not the present value of the winning storage number register N2 is 2 or more (step c58). . If the current value of the winning storage number register N2 is 1, it means the special symbol change performed this time due to the starting stimulus due to the winning in the first type starting port 7, and the discrimination process of step c58 is 2 or more. If not, the CPU 32 initializes the values of the state storage flag Fa and the fluctuation state storage flag Fb (step c).
62, step c63), the value of the winning storage number register N2 is decremented by one (step c64), and the processing in this cycle is ended. In this case, the current value of the winning storage number register N2 is 0.

If it is determined in step c58 that the number is 2 or more, that is, if the winning in the first type starting port 7 relating to the next special symbol change is stored, the CPU 32 The variable state storage flag Fb is set to 7 (step c59), the parameter tx is set to a predetermined value (step c60), and the timer T is operated to measure the elapse of the standby time T relating to the start of symbol fluctuation (step c61). ), The process of this cycle ends. In the embodiment.
The value of the set value tx is set to 0.504 seconds.

In the process of shifting to the next cycle, the value of the fluctuation state storage flag Fb is 7, so that the CPU 32 executes step c1, step c9, step c20, and step c2.
5, Step c30, Step c35, Step c47
And step c67 after execution of the determination processing in step c54
Then, it is determined whether or not the standby time T has reached the set value tx (step c82). Until the standby time T reaches the set value tx, steps c1, step c9, step c20, step c25, Step c30, step c
35, the determination processing of step c47, step c54 and step c67 is repeatedly executed.

If it is detected in step c67 that the standby time T has reached the set value tx, CP
U32 sets the values of the state storage flag Fa and the fluctuation state storage flag Fb to 0 and initializes them (step c68,
In step c69), the value of the winning storage number register N2 is decremented by one (step c64), and the processing in this cycle ends.

On the other hand, when both the determination results of step c56 and step c57 become true, that is, the stop symbol of the left special symbol display unit 11, the stop symbol of the right special symbol display unit 12, and the middle special symbol display unit Table 1 shows 13 stop symbols
In the case of the big hit stop symbol indicated by 0, that is, the big hit, the CPU 32 initializes the value of the fluctuation state storage flag Fb (step c65), sets 2 to the state storage flag Fa (step c66), Execution of the processing of task 5 relating to opening of the winning opening 15 is permitted.

In this embodiment, when the current value of the big hit random number storage register RAN1 is stored in the determined random number storage register Ri in the processing of step a12 when a winning is detected in the first type starting port 7, the determined random number storage register is set. Whether or not a jackpot has occurred is already determined by whether or not the value of Ri matches the set value ε (five values of 15, 31, 47, 63, and 79), and the left special symbol is determined in the process of step c17. At the time when the low-speed fluctuation display on the display unit 11 is started, the combination of the special jackpot symbol and the combination of the special off symbol are determined by the processing of Step c14 to Step c16. However, the normal display due to the influence of external noise and the like. It is also conceivable that the control is hindered and the finally displayed symbols become erratic.

However, in the present embodiment, when determining the final special symbol combination, instead of the special symbol combination determined in advance, the display indices il, ic, and il, ic, corresponding to the special symbol when the variable display is stopped. Since the present value of ir is used, it is possible to make an accurate determination corresponding to the combination of the special symbols actually displayed, even when the displayed symbols are out of order.

In the embodiment, the probability of a big hit occurring is
It is a value obtained by dividing the range of the set value corresponding to the big hit by the value range of the random number storage register for big hit RAN1. In this example, the number of set values corresponding to the big hit is five, and the value of the random number storage register for big hit RAN1 is Possible values are 0 to 102
Since it is an integer of 4, the probability of a jackpot occurring is 5/10
25 (0.976 / 200). Accordingly, a mechanical rotary drum having three rotary drums in which the symbols shown in Tables 1 to 3 are described, and each symbol shown in Table 5 is set as a combination of the symbols when the big hits are aligned Big hit probability 20/4500 (0.
888/200). Step a2
By changing the value of the comparison value used in the determination processing of the above or setting the value of the comparison value used in the determination processing of step c14 as an area, it is possible to arbitrarily manipulate the probability of occurrence of a big hit.

The processing of task 4 shown in FIGS. 27 to 29 relates to the opening / closing operation processing of the first type start-up port 7. As shown in FIG. 31, the first type start port 7
The opening and closing are performed eight times when the left and right ordinary symbols match in the processing and it is determined to be a hit. When the normal symbol operation flag fa is set to 3, the CPU 32 proceeds to step d2 after executing the determination process in step d1, and first determines whether or not the opening operation of the first type start-up port 7 is possible by the operation time flag ft. Is detected based on whether 1 or 2 is set in the. When the normal operation flag fa is other than 3, the processing of the task 4 is substantially not executed.

If the value of the operation time flag ft is 1, the open state of the first type start port 7 is being executed, and if the value of the operation time flag ft is 2, the first type start port 7 In the closed state, the opening / closing operation of the first-type starting port 7 cannot be started in any case. If the operation time flag ft is a value other than 1 and 2, the open state or the closed state of the first type start-up port 7 is not being executed.
The opening / closing operation of the seed starting port 7 can be started. In the initial stage, the operation time flag ft is set to 0 in the processing of the task 2. In this case, the CPU 32 sets the parameter t
k is set to a predetermined value (step d4),
The operation time flag ft is set to 1 (step d).
5) Output a command to excite the solenoid SOL2 to the solenoid drive circuit 36 to execute the opening operation process of the first type starting port 7 (step d6), and operate the timer Tb to open the first type starting port 7. The subsequent elapsed time measurement is started (step d7). In the embodiment, the value set in the parameter tk defining the opening time of the first type start port 7 is 0.40
0 seconds.

In the processing after the next cycle, since the operation time flag ft is already set to 1, the CPU 3
After the execution of the discriminating process in steps d1 and d2, the process proceeds to step d8, and the elapsed time Tb after the opening operation is performed
Until reaches the set value tk, the determination processing of step d1, step d2, and step d8 is repeatedly executed at a predetermined processing cycle.

Step d indicates that the elapsed time Tb after the opening operation of the first type start port 7 has reached the set value tk.
8, the CPU 32 outputs a command to the solenoid drive circuit 36 to release the excitation of the solenoid SOL2, and closes the first-type starting port 7 (step d).
9) After incrementing the value of the opening number storage register C1 by one (step d10), it is determined whether the number of executions of the opening / closing operation processing of the first type start-up port 7 has reached the set value 8 (step d11). ), If the number of executions of the opening / closing operation of the first-type starting port 7 is within the range of the set value 8, the parameter tl
Is set to a predetermined value (step d12), and 2 is set to the operation time flag ft (step d1).
3) Activate the timer Tb to start measuring the elapsed time after the closing of the first type start-up port 7 (step d14), and end the processing of this cycle. In the embodiment, the value of the parameter tl that defines the duration of the closed state of the first type starting port 7 is:
It is set to 3.700 seconds.

In the processing after the next cycle, the operation time flag f
Since 2 is set to t, the CPU 32 proceeds to step d15 after executing the determination processing of step d1, step d2, and step d3, and executes the elapsed time Tb of the closed state.
Until reaches the set value tl, the determination processing of steps d1, d2, d3, and d15 is repeatedly executed at a predetermined processing cycle.

When it is detected that the elapsed time Tb of the closed state of the first-type start port 7 has reached the set value tl, C
The PU 32 initializes the operation time flag ft (step d16), and ends the processing in this cycle.

In the processing after the next cycle, the operation time flag f
Since the value of t has been initialized to 0, the CPU 32
Is usually determined according to the value of the current value 3 of the symbol operation flag fa.
After the determination process of steps d1 to d3, the process proceeds to step d4. Therefore, in the determination process of step d11, steps d1 to d1 are performed until the value of the number-of-openings storage register C1 is within the range of the set value 8.
4 and the processing of steps d1 to d3 and steps d15 to d16 by the operation time flag f
By switching the value of t between 0, 1 and 2, the opening / closing operation of the first type start-up port 7 is performed.

If it is determined in step d11 that the value of the release number storage register C1 has reached the set value 8, the CPU 32 initializes the release number storage register C and the operation time flag ft ( Step d
17, step d18), the normal symbol operation flag fa is initialized (step d19), and the pass number storage register N1 is initialized.
Is decremented by 1 (step d20), and the process ends.

As a result of the initialization of the value of the ordinary symbol operation flag fa in the processing of step d19 of task 4, the determination result of step d1 after the next cycle becomes false, and the processing of task 4 is not executed.

In the processing of step d20 of task 4,
If the value of the number-of-passes storage register N1 is reduced by one and becomes 0, it is determined to be true in the determination processing of step b5 of task 2, so that the ordinary symbol variation processing of task 2 is not executed. If the value of the passing number storage register N1 becomes non-zero due to the re-detection of the left and right gates 5 and 6 again, or if the passing number storage register N1 is 1 or more due to detection of a plurality of gates, In the determination process of step b5 of task 2, it is determined to be false,
Is started, and is executed up to four times including the first time.

FIG. 30 is a flowchart showing an outline of the processing of task 5. When 2 is set in the state storage flag Fa, the CPU 32 proceeds to step e2 after executing the determination processing in step e1, starts opening / closing operation of the special winning opening 8 driven to be opened / closed by the solenoid SOL1, and waits for a predetermined opening time. Until the ending condition of the opening / closing operation based on the progress or the detection of the number of winning game balls in the special winning opening 8 is satisfied, the opening / closing process of step e2 is repeatedly executed at a predetermined processing cycle, and the determination process of step e3 If it is detected that the end condition is satisfied, the special winning opening 8 is closed in the processing of step e4 and 1
The opening operation is ended, the value of the state storage flag Fa is initialized in the processing of step e5, and the value of the winning storage number register N2 is reduced by one in the processing of step e6.

As a result of the initialization of the value of the state storage flag Fa in the processing of the task 3 or the task 5, both the determination results of the step c1 and the step c2 of the next cycle transition become false,
The value of the storage state identification flag F0 is detected again by the CPU 32 (step c3).

Therefore, when a new winning is detected in the first-type starting port 7 again, a new random number is stored in the fixed random number register R0, or when a plurality of winnings are detected, the fixed random number register R1 is detected.
If the value stored thereafter is shifted, the symbol combination process is started again up to four times, including the first time, by the processes after step c4.

When the game balls pass through the left and right gates 5 and 6 on the game board 10, the ordinary symbol display device 18 of the symbol display unit 2 changes the ordinary symbols, and the symbols on the left and right when the ordinary symbols are stopped. If the combination of
The seed starting port 7 performs eight opening / closing operations, and when the game ball wins the first type starting port 7 during the opening / closing operation of the first type starting port 7, each special display of the symbol display section 3 in the symbol display unit 2 is performed. The symbol display units 11, 12, and 13 start to fluctuate, and the special symbol storage number display unit 9 displays up to four game balls that have won the first kind starting port 7, and the decoration unit 17 displays It lights or blinks according to the winning state of the game ball.

[0160]

According to the first aspect of the present invention, the symbol display section includes a symbol table in which a plurality of luminous bodies are arranged in a number eight shape.
Background display section on the outer circumference and inside of the display unit and symbol display unit
Is formed by, a plurality of symbol display units section, while being coupled by shifting the direction of movement of the digits that are variably displayed, the symbol display unit parts adjacent to each other share the overlapping portion
The design display unit and background display are different colors.
Since light emission, by displaying a part of numbers by turning the overlapped portion between the symbol display unit parts adjacent to each other, can be moved and displayed so as to flow the number displayed in the coupling direction, the symbol display units Background display area inside and outside of the unit
Emits light in a different color than the symbol display unit,
The design display unit is brighter than the one that does not emit the background.
Makes the entire symbol display bright and beautiful with a brighter standout
Can be decorated.

According to the structure of the second aspect, a plurality of
The design display units are connected vertically shifted,
For the vertically adjacent symbol display unit portions, the lower half of the eight-shape numeral in the symbol display unit portion arranged on the upper side and the eight-digit number in the symbol display unit portion arranged on the lower side Since the upper half part is superimposed and shares the superposed part, it is necessary to move and display the number displayed in the vertical half of the eight shapes of numbers as if they are flowing in the vertical direction Can be.

According to the structure of the third aspect, the symbol display
A four number of unit portions, has two numbers displayable der simultaneously vertically, the background display section and the upper half of the symbol display section
The different colors are displayed for the lower half and the upper half.
Discrimination between the symbol shown and the symbol displayed at the bottom
Can be enhanced.

[Brief description of the drawings]

FIG. 1 is a front view showing a symbol display body of a pachinko machine according to an embodiment of the present invention.

FIG. 2 is a bottom view of a symbol display body of the pachinko machine according to the embodiment of the present invention.

FIG. 3 is a side view of a symbol display body of the pachinko machine according to the embodiment of the present invention.

FIG. 4 is a front view showing the arrangement of segments in a symbol display section of the symbol display according to the embodiment.

FIG. 5 is a front view showing types of colors in a symbol display section of the symbol display according to the embodiment.

FIG. 6 is a front view showing a game board of a pachinko machine equipped with a symbol display of the present invention.

FIG. 7 is a cross-sectional view of a conventional fluorescent display tube.

FIG. 8 is a front view of the symbol display unit of the embodiment.

FIG. 9 is a front view of an exterior member mounted on the symbol display according to the embodiment.

FIG. 10 is a front view showing the process of symbol change in the symbol display section of the symbol display of the present invention.

11 is a front view showing the next process of the symbol change of FIG.

FIG. 12 is a block diagram showing a control unit of a pachinko machine equipped with a symbol display of the present invention.

FIG. 13 is a flowchart showing a part of the processing by the CPU provided in the pachinko machine of the embodiment;

14 is a continuation of the flowchart of FIG.

FIG. 15 is a continuation of the flowchart of FIG. 14;

FIG. 16 is a flowchart showing a part of the processing by the CPU provided in the pachinko machine of the embodiment;

17 is a continuation of the flowchart of FIG. 16;

18 is a continuation of the flowchart of FIG.

FIG. 19 is a flowchart showing a part of the processing by the CPU provided in the pachinko machine of the embodiment;

20 is a continuation of the flowchart of FIG. 19;

FIG. 21 is a continuation of the flowchart of FIG. 20;

FIG. 22 is a continuation of the flowchart of FIG. 21;

FIG. 23 is a continuation of the flowchart of FIG. 22;

FIG. 24 is a continuation of the flowchart of FIG. 22;

FIG. 25 is a continuation of the flowchart of FIG. 24;

FIG. 26 is a continuation of the flowchart of FIG. 24;

FIG. 27 is a flowchart showing a part of the processing by the CPU provided in the pachinko machine of the embodiment;

FIG. 28 is a continuation of the flowchart of FIG. 27;

FIG. 29 is a continuation of the flowchart of FIG. 27;

FIG. 30 is a flowchart showing a part of the processing by the CPU provided in the pachinko machine of the embodiment;

FIG. 31 is an operation principle diagram showing a storage operation of a fixed random number storage register Ri in the embodiment.

FIG. 32 is a timing chart showing a normal symbol variation process in the symbol display unit of the pachinko machine of the embodiment.

FIG. 33 is a timing chart showing a special symbol changing process in the symbol display unit of the pachinko machine of the embodiment.

FIG. 34 is a timing chart showing opening / closing operation processing at a first-type starting port of the pachinko machine of the embodiment.

FIG. 35 is a timing chart showing the opening / closing operation processing at the special winning opening of the pachinko machine of the embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Symbol display body 2 Symbol display unit 3 Symbol display unit 4 Fluorescent display tube 4 'Fluorescent display tube 5 Left gate 6 Right gate 7 First-class start-up opening 8 Big winning opening 8' Winning device 9 Special symbol storage number display unit 10 Panel 11 Left special symbol display unit 11 'Symbol display unit unit 12 Right special symbol display unit 12' Symbol display unit unit 13 Medium special symbol display unit 13 'Symbol display unit unit 14 Left ordinary symbol display unit 15 Right ordinary symbol display unit 16 Ordinary symbol storage number display part 17 Decoration part 18 Ordinary symbol display device 19 Cathode 20a Grid 20b Grid 20c Grid 21 Front glass 22 Spacer glass 23 Glass base 24 Sealing glass 25 Electrode base 26 Through hole 27 Connector 28 Each lead pin 29 Exhaust pipe 30 ROM 31 RAM 32 CPU 33 Switch detector 34 LED display times 35 Symbol display circuit 36 Solenoid drive circuit 37 Clock / reset circuit 41 Natural winning prize opening 42 Exterior frame 43 Gaming ball distribution section 44 Depression 45 Through hole 46 Cover member 47 Specific area 48 Continuous count display LED 49 Large winning opening winning number display LED 50 Indicator light A 51 Indicator light B 52 Indicator light C 53 Indicator light D 61 Exterior member 62 Recess 63 Hole 64 Flange 65 Through hole 81 Plate glass 82 Conductive layer 83 Anode electrode 84 Insulating layer 85 Phosphor 86 Conductive pad 87 Grid 88 Conductive Paste 89 Cathode 90 Getter 91 Front glass 92 Spacer glass 93 Exhaust pipe 94 Transparent conductive film 95 Lead pin 96 Mold 97 Solder 98 Sealing glass 99 Decoration member 101 Left winning opening 102 Right winning opening 103 Lower left winning opening 104 Lower right winning opening 1 5 Lamp windmill 106 Windmill 107 Return rubber 108 Ball guide rail 109 Out ball entrance SW1 Normal design operation switch SW2 First-class start opening winning detection switch SW3 Specific area winning detection switch SW4 Large winning opening winning detection switch (A) Left normal design Display LED (B) Right Normal Symbol Display LED SOL1 Large Winning Open Solenoid SOL2 Class 1 Startup Solenoid

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-3-7184 (JP, A) JP-A-3-37087 (JP, A) JP-A-60-126180 (JP, A) (58) Survey Field (Int.Cl. ⁷ , DB name) A63F 7/02

Claims (3)

(57) [Claims] 1. A pachinko gaming machine in which a symbol display section of a symbol display device displays a change of a number by detecting a game ball by a predetermined detection means, wherein the symbol display section includes a plurality of light-emitting members each having an eight-digit number. The pattern display units arranged in the
A plurality of the symbol display units formed by the outer periphery and the inner background display of the symbol display unit are connected to each other while being shifted in the moving direction of the number to be variably displayed, and the symbol display units adjacent to each other are connected to each other. Share the polymerized part ,
Different colors for the symbol display unit and the background display
A pachinko game machine that emits light . 2. A with coupled the plurality of symbol display units section is shifted in the vertical direction, the symbol display single vertically adjacent
In the position portions includes a lower halves of the 8-shaped figures in the symbol display unit parts <br/> arranged on the upper side, on a 8 shape of numerals in the symbol display unit section arranged on the lower side The pachinko gaming machine according to claim 1, wherein the half portion is polymerized to share the polymerized portion. Wherein the number of said symbol display unit section is a four, two numbers vertically Ri displayable der simultaneously, the back
The scenery display part differs between the upper half and the lower half of the symbol display part
The pachinko gaming machine according to claim 2, wherein the pachinko gaming machine is displayed in a different luminescent color .