JP3060964B2 - Exponential amplifier - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

FIELD OF THE INVENTION The present invention relates to an exponential amplifier.
In particular, it relates to an exponential amplifier operating at a high frequency.

[0002]

2. Description of the Related Art A conventional exponential amplifier comprises a differential circuit D0 and an operational amplifier OP as shown in FIG. Differential circuit is constituted by a pair of transistors Q21, Q22, in these one output transistor pair Q21, Q22 is a resistive load R1, the other output is a constant current load I _01, between the input terminals 201, 202 The differential input signal Vin is input. The operational amplifier OP includes transistors Q23 to Q2.
7, especially the transistor pair Q25, Q2
The constant-current load of the differential circuit is connected to the negative-phase input of the differential input unit constituted by the reference numeral 6, and the bias voltage V
B is applied. The output of the operational amplifier OP is connected to the common emitter of the differential circuit, and the output of the differential circuit is taken out from the output terminal 203 on the resistance load side of the differential circuit.

The operation principle of this exponential amplifier will be described. Differential input signals Vin is current flowing through the transistor pair Q21, Q22 Iout, using I _01, represented by the following formula. Vin = VT · ln (Iout / Is) −VT · In (I ₀₁ / Is) = VT · In (Iout / I ₀₁ ) (1) where Is is a saturation current. This equation (1) is expressed as Iout
And solving _{for, Iout = I 01 · exp (} Vin / VT) ... (2)

Then, the following voltage output Vout is obtained from the output terminal 203. Vout = R1 · Iout = R1 · I 01 · exp (Vin / VT) ... (3) that is, the output Vout obtained by exponential amplifying the input signal Vin from the equation (3) is obtained.

[0005]

In this conventional exponential amplifier, an operational amplifier O is supplied from a collector of a transistor Q22.
Because through P are negative feedback to the common emitters of the transistor pair Q21, Q22, the response speed of the circuit is thus determined by the operational amplifier and a feedback capacitor C, and the collector-emitter resistance r _ec of the transistor Q22. Even if the response speed of the operational amplifier OP is infinite, the resistance r _ec
And the feedback capacitance C limits the response speed. Usually the resistance r
_{Since ec} is on the order of several hundred KΩ, if the feedback capacitance C is set to 1000 pF with 100 KΩ, the response frequency fres is given by fres = (100 × 10 ³ × 1000 × 10 ^-12 ) / 2
π ≒ 1.6 KHz, so that signals of higher frequencies cannot be handled. Therefore, there is a problem that the number MH _Z or more frequencies signals can not handle.

An object of the present invention is to provide an exponential amplifier capable of increasing the response frequency and operating at a high frequency.

[0007]

An exponential amplifier according to the present invention comprises:
A first differential amplifier to which a differential input signal is input, a second differential amplifier connected to one output of the first differential amplifier, and another output of the first differential amplifier And a third differential amplifier connected to the first differential amplifier.
Each has a base as an input terminal of the differential input signal,
First and common emitters connected to a constant current source;
A second bipolar transistor, wherein the second bipolar transistor
In a differential amplifier, a bias is applied between both bases,
A resistor is connected to each of the first and second
Connected to the collector of the
A third transistor to which the current-to-current ratio setting transistors are respectively connected.
And a fourth bipolar transistor,
The third differential amplifier is connected to the third and fourth
The collector of the polar transistor is connected and the emitter is
Commonly connected to the second bipolar transistor
And each collector is connected to a resistor.
And the output terminal to which the load is connected is connected
And a fifth bipolar transistor and a sixth bipolar transistor .

[0008]

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram of an exponential amplifier according to an embodiment of the present invention, which is constituted by first to third three differential amplifiers. The first differential amplifier D1 includes a pair of transistors Q1 and Q2.
Input terminals 101, 10 connected to respective bases of Q1, Q2
2, an input signal Vin is input. One transistor Q
The common emitter side of the second differential amplifier D2 is connected to one collector, and the common emitter of the third differential amplifier D3 is connected to the collector of the other transistor Q2. The common emitters of transistor pair Q1, Q2 is connected to the constant current down I _0.

The second differential amplifier D2 comprises a pair of transistors Q3 and Q4, and the base between the transistors Q3 and Q4 is biased by a differential input VB input to input terminals 103 and 104. An emitter resistor R3 is connected to each of the emitters of the transistor pair Q3 and Q4.
The collector of the transistor Q1 of the differential amplifier is connected. Further, the collector of the transistor pair Q3 and Q4 is connected to the collector-emitter shorted transistor Q1.
1 and Q12 are connected, and each transistor Q11, Q12
Are connected in common and the power supply V is connected via a resistor R5.
Connected to CC. In addition, these transistor pairs Q
The collectors of Q3 and Q4 are connected as differential inputs to the third differential amplifier D3 to the bases of the transistor pairs Q5 and Q6. The collectors of these transistor pairs Q5 and Q6 are respectively connected to a power supply VCC via a resistance load R6, and at the same time, the respective collectors are connected to output terminals 105 and 106 as circuit outputs.

The operation principle of this configuration will be described. When the differential input voltage is Vin, the output current of the first differential amplifier D1, ie, the collector currents of the transistors Q1 and Q2,
1, I2, the constant current of the first differential amplifier D1 is I0, and the thermal voltage VT of the transistor is assumed. I1 = I0. [Exp (Vin / VT) / (1 + exp (Vin / VT))] (5) I2 = I0. [1 / (1 + exp (Vin / VT))] (5)

Next, the output current of the second differential amplifier D2 of the differential input voltage VB, that is, the collector currents of the transistors Q3 and Q4 are respectively I3 and I4 and the transistors Q3 and Q4.
4 of the emitter resistor as r _e, further R3 >> r _e Assuming. I3 = (VB / 2 · R3) + (I1 / 2) (7) I4 = − (VB / 2 · R3) + (I1 / 2) (8) Collector-emitter short-circuited transistors Q11 and Q
Twelve emitter voltages ΔVE are: ΔVE = VT · In (I3 / Is) −VT · In (I4 / Is) = VT · In (I3 / I4) (9) Further, ΔVE is the transistors Q5 and Q6 as they are. ΔVE = VT · ln (I3 / I4) = VT · ln (I5 / I6) (10) That is, I3 / I4 = I6 / I5 (11)

Using equation (11), I3 / (I3 + I4) = (I3 / I4) / [(I3 / I4) +1] = (I6 / I5) / [(I6 / I5) +1] = I6 / ( I5 / I6) (12) I4 / (I3 + I4) = 1 / [(I3 / I4) +1] = 1 / [(I6 / I5) +1] = I5 / (I5 + I6) (13) Next, equation (12) , (13), I3 = I6 · (I5 + I6) / (I3 + I4) = I6 · I2 / I1 (14) I4 = I5 · (I5 + I6) / (I3 + I4) = I5 · I2 / I1 (15) .

Then, I3-I4 is calculated by the above formula (14),
From the expression (15), I3−I4 = I2 · (I6−I5) / I1 (16) The differential output Vout of the third differential amplifier D3 is as follows: Vout = R6 · (I6 = I5) (17) ) In equation (16), equations (17) and (5), (6), (7),
By substituting (8), VB / R ₃ = exp (−Vin / VT) × Vout / R6 (18) Therefore, Vout = VB · R6 / R3 · exp (Vin / VT) (19) An exponentially amplified output Vout of the input difference voltage Vin is obtained.

Considering the signal response in this configuration, the input signal is applied between the bases of the transistors Q1 and Q2 of the first differential amplifier D1, and the input signal is applied from the collector of one transistor Q1 to the second differential amplifier D2. It is transmitted to the collectors of transistors Q3 and Q4. At this time, the response speed includes the capacitance between the bases of the transistor pair Q1 and Q2,
For example, assuming that this is 0.5 pF, assuming that the input base resistance of the transistor pair Q1 and Q2 is 100Ω, the response frequency fres ₁ is fres ₁ = 100 × 0.5 × 10 ⁻¹² /2π≒3.2 GH
z, and the capacitance between the bases of the transistor pair Q1 and Q2 can be ignored.

Next, in each collector of the transistor pair Q3, Q4 of the second differential amplifier D2, the load is due to the collector-emitter short diodes Q11, Q12.
The load impedance is low and the transistor pair Q3, Q4
When the response is considered in consideration of the collector-base capacitance of the collector-emitter short diode Q1
1, the current flowing through Q12 is 200 μA,
3, when the collector-base capacitance between Q4 and 0.5 pF, the response frequency fres _{2 is, fres 2 = 130 × 0.5 ×} 10 -12 /2π≒2.4GH
z, and the collector-base capacitance of the transistor pair Q3, Q4 can be ignored.

Next, the signal via the collectors of the transistor pairs Q3 and Q4 is input to the bases of the transistor pairs Q5 and Q6 of the third differential amplifier D3, but the capacitance between the bases of the transistors Q5 and Q6 is small. , May be considered to be equivalent to the inter-base capacitance of the transistor pair Q1, Q2.
Assuming that the input base resistance of the transistor pair Q5 and Q6 is 100Ω, the response frequency fres ₃ is fres ₃ = 100 × 0.5 × 10 ^-12 /2π≒3.2 GH
z, and the capacitance between the bases of the transistor pairs Q5 and Q6 can be ignored, similarly to the capacitance between the bases of the transistor pairs Q1 and Q2.

The collector of the transistor pair Q5, Q6, that is, the output of the exponential amplifier, has a load resistor R6.
5, the response frequency is finally determined by the collector-base capacitance of Q6. That is, assuming that the capacitance between the collector and base of the transistor pair Q5 and Q6 is 0.5 pF and the load resistance R6 is 1 KΩ (normal load is on the order of several KΩ), the response frequency fres ₄ at the exponential amplifier output section is fres ₄ = 1000 × 0.5 × 10 ^-12 / 2π ≒ 318M
Hz, and the results as a response frequency of the exponential amplifier is determined at the output, here it is realized a frequency of about 320MH _Z.

FIG. 2 is a view showing a second embodiment of the present invention. The basic operation principle of this embodiment is almost the same as that of the first embodiment. The difference is that in the first embodiment, the output current ratio of the second differential amplifier 2 is set to the third difference of the next stage. The transistor pair Q11, Q12 is a collector / base short diode as a means for transmitting to the dynamic amplifier 3, whereas in the second embodiment, the base is a common bias VB1 and the collector is a power supply voltage VB1.
Transistor pair Q1 biased by CC
1 'and Q12'. Parts equivalent to those of the other first embodiment are denoted by the same reference numerals.

In the second embodiment, the operation of each of the first to third differential amplifiers is the same, and the response frequency of the exponential amplifier is 320 M, as in the first embodiment.
A frequency of about Hz can be realized, and an exponential amplifier capable of operating at a high frequency can be configured.

[0020]

As described above, according to the present invention, one output of the first differential amplifier is connected to the second differential amplifier via a resistor, and the other output is connected to the third differential amplifier. Connected, and a differential input signal is input to the first differential amplifier,
A configuration in which a bias is input to the second differential amplifier, an output current ratio of the second differential amplifier is transmitted to the third differential amplifier, and a resistor is connected to an output terminal of the third differential amplifier ; By doing so, the bias voltage of the second differential amplifier and the second
And an amplifier having exponential characteristics in which the differential input voltage is used as an index by using the ratio between the resistance and the load provided in the differential amplifier and the third differential amplifier as coefficients, and without using an operational amplifier. Therefore, the response frequency can be increased, and an exponential amplifier that can handle high-frequency signals can be realized.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a first embodiment of an exponential amplifier of the present invention.

FIG. 2 is a circuit diagram of a second embodiment of the exponential amplifier of the present invention.

FIG. 3 is a circuit diagram of an example of a conventional exponential amplifier.

[Explanation of symbols]

 D1 First differential amplifier D2 Second differential amplifier D3 Third differential amplifier Q1 to Q6 Transistors R1 to R6 Resistance (load) 101, 102 Differential input signal input terminal 103, 104 Bias terminal 105, 106 Output Terminal

Claims (3)

(57) [Claims] A first differential amplifier to which a differential input signal is input; a second differential amplifier connected to one output of the first differential amplifier; and a first differential amplifier. and a third differential amplifier connected to the other output of the amplifier, said first
Differential amplifiers each have a base connected to the differential input signal.
Connected to a constant current source with the emitter connected in common as the input terminal.
Composed of first and second bipolar transistors
The second differential amplifier has a bias between both bases.
And a resistor is connected to each emitter.
Connected to the collector of the first bipolar transistor,
Output current ratio setting transistors for each collector
The third and fourth bipolar transistors are connected.
Wherein the third differential amplifier includes the third differential amplifier in each base.
And the collector of the fourth bipolar transistor is connected.
And the emitter is commonly connected to the second bipolar transistor.
Connected to the collectors of the transistors, one for each collector
Output to which the resistor is connected and the load is connected
Fifth and sixth bipolar transistors with terminals connected
An exponential amplifier , comprising: Wherein said output current ratio setting transistor connected to the output of the second differential amplifier, according to claim 1, wherein the exponent amplifier is a transistor pair are short-circuited collector and base. 3. The exponential amplifier according to claim 1, wherein said output current ratio setting transistor connected to the output of said second differential amplifier is a transistor pair having a common base.