JP3054909B2 - Electron beam exposure method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for exposing an electron beam to a resist pattern or the like by direct writing used in a manufacturing process of a semiconductor integrated circuit device or the like. With the recent miniaturization and complexity of semiconductor integrated circuit devices or micromachining targets, there is a strong demand for improving the accuracy of alignment (alignment) with lower layer device patterns when forming resist patterns. Various alignment techniques have been proposed in order to meet the requirements.

[0002]

2. Description of the Related Art Conventionally, in a manufacturing process of a semiconductor integrated circuit device, a resist sensitive to an electron beam is formed on a device pattern formed before that, and the resist is formed by an electron beam exposure method by direct drawing. In many cases, a resist pattern is formed by beam exposure.In this case, the alignment between the lower device pattern and the resist pattern to be formed thereon is performed by an exposure process when forming the lower device pattern. An alignment mark formed at the same time as the pattern is used as a reference for alignment in an electron beam exposure step when forming a resist pattern. In this case, an arbitrary exposure method such as exposure with visible light, exposure with ultraviolet light, exposure with X-rays, and electron beam exposure is used as the exposure step for forming the lower device pattern.

According to this method, the positional deviation between a device pattern formed simultaneously with an alignment mark and a resist pattern formed on the device pattern can be determined by the alignment accuracy of an exposure apparatus used in an electron beam exposure step and the position detection. Since the accuracy of the alignment technique depends on whether a CCD or a laser interferometer is used as the detector, an alignment technique that satisfies the required alignment accuracy can be selected and adopted.

However, at least one device pattern (which may be referred to as a "plurality of device patterns" for simplicity of description) is formed in each of the plurality of exposure steps in the exposure area. When a resist pattern is to be formed on each device pattern in a predetermined positional relationship (alignment), any one of a plurality of exposure steps in which a device pattern is formed is performed.
When a resist pattern is formed by electron beam exposure using an alignment mark formed simultaneously with a device pattern in one exposure process as an alignment reference, a device pattern formed simultaneously with a specific alignment mark and a resist pattern formed on the device pattern are formed. Even if the amount of misalignment can be minimized, the amount of misalignment between a device pattern not formed at the same time as the alignment mark and a resist pattern formed thereon is not necessarily minimized.

[0005] This is because a device pattern formed at the same time as a specific alignment mark and a device pattern not formed at the same time as the alignment mark have a peculiar misregistration component due to an exposure step in forming each pattern. Because they do.

Therefore, when a plurality of resist patterns are formed by a single electron beam exposure process on a plurality of device patterns formed by a plurality of exposure processes in an exposure region, design for all device patterns is performed. It is difficult to form a resist pattern at the upper position.

[0007]

Conventionally, in order to cope with this, alignment has been performed with priority given to, for example, alignment of device patterns which have a large effect on characteristics of semiconductor integrated circuit devices or yields. However,
A device pattern having a low alignment priority also has a considerable effect on the characteristics, yield, and the like of the semiconductor integrated circuit device, so that the characteristics, yield, and the like of the semiconductor integrated circuit device are eventually degraded.

According to the present invention, there is provided an electronic device capable of forming a resist pattern on a plurality of device patterns formed in each of a plurality of exposure steps by accurately aligning each of the plurality of device patterns. An object of the present invention is to provide a beam exposure method.

[0009]

In an electron beam exposure method according to the present invention, an electron beam exposure method includes an exposure area having at least one device pattern and at least one alignment mark formed in each of a plurality of exposure steps. Exposure in which a pattern data in the same drawing data for forming a resist pattern in alignment with the specific device pattern is formed on the specific device pattern to be formed under the resist pattern drawn by the pattern data A pattern data of a resist pattern to be formed on the device pattern formed by each of the exposure steps by using the identification code, and a position specific to each of the exposure steps at which the underlying device pattern is formed. It is characterized by correcting by a shift component It was adopted degree.

Further, in the electron beam exposure method according to the present invention, at least one device pattern formed by each of the plurality of exposure steps and a device pattern formed by one of the plurality of exposure steps. On a specific device pattern existing in an exposure region having at least one alignment mark formed simultaneously with the pattern, graphic data in the same drawing data for forming a resist pattern by aligning with the specific device pattern is provided. It has an identification code indicating an exposure step in which a lower device pattern of the resist pattern drawn by the graphic data is formed, and the figure of the resist pattern formed on the device pattern formed in each exposure step by the identification code. Data is transferred to the underlying device pattern The correction is performed by a displacement component of the formed first exposure step and a displacement component of a predetermined device pattern formed by each exposure step and a device pattern formed by the first exposure step. The process was adopted.

In these cases, each of the identification codes has a function of designating an alignment mark and an alignment method to be used as a reference when aligning each of the resist patterns. An electron beam direct writing apparatus capable of writing can be used.

In these cases, for each identification code,
Specify whether to align the resist pattern with the underlying device pattern, specify the alignment mark and alignment method to be used as a reference when performing alignment, and specify the electron beam deflection correction value obtained by alignment when alignment is not performed. Instead, it is possible to use an electron beam direct writing apparatus that has a function of assigning a unique electron beam deflection correction value to be input and can perform drawing of each figure data under conditions assigned to each identification code.

In these cases, graphic data for drawing a resist pattern on at least one device pattern formed in each of the plurality of exposure steps is separately stored for each of the exposure steps. Can be divided into files.

[0014]

According to the electron beam exposure method of the present invention, when a plurality of resist patterns are formed by aligning on a plurality of device patterns formed in each of the plurality of exposure steps, Each figure data for electron beam exposure, the position shift component specific to the exposure process when forming each device pattern of the lower layer, or by correcting the position shift component with a predetermined specific device pattern, The lower device pattern and all the resist patterns formed thereon can be aligned.

[0015]

Embodiments of the present invention will be described below. (First Embodiment) FIGS. 1 to 4 are explanatory views of an electron beam exposure method according to a first embodiment, wherein (A) shows a drawing area on a wafer, and (B) to (E) show drawing data. Indicates the area,
(F) shows the functions that the electron beam exposure apparatus of this embodiment should have.

In this figure, 1x is a drawing area on a wafer, 1a is an alignment mark formed in a first exposure step, 1b is a device pattern formed in a first exposure step, and 2a is a second pattern in a second exposure step. The formed alignment mark, 2b is a device pattern formed in the second exposure step, 3a is an alignment mark formed in the third exposure step, 3b is a device pattern formed in the third exposure step, 1y is The drawing data area, 1c is figure data drawn on the device pattern formed in the first exposure step, 2c is figure data drawn on the device pattern formed in the second exposure step, and 3c is third figure. Graphic data to be drawn on the device pattern formed in the exposure step, 4 is an alignment condition setting unit, 5 is an alignment unit, and 6 is an alignment unit. Cement correction value memory, the 7 drawing data memory, 8 data control unit, 9 denotes an electron beam control unit.

The electron beam exposure method of the first embodiment will be described with reference to these drawings.

FIG. 1A shows a device pattern 1b formed by a first exposure step, a device pattern 2b formed by a second exposure step, and a device pattern 3b formed by a third exposure step. Alignment mark 1a formed simultaneously with device pattern 1b in the first exposure step, alignment mark 2a formed simultaneously with device pattern 2b in the second exposure step, and device pattern 3b formed in the third exposure step
The drawing area 1x on the wafer having the alignment mark 3a formed at the same time is shown.

FIG. 2B shows each device pattern 1 existing in the drawing area 1x on the wafer shown in FIG.
b, 2b, and 3b, the resist formed on the entire surface is exposed to an electron beam, and each of the device patterns 1b, 2b, and 3b is exposed.
With respect to all drawing data areas 1y in the same figure data for forming a resist pattern in alignment with the pattern data, each figure data 1c, 2c, 3c, 3c is drawn on a device pattern formed by any exposure process. Is shown.

FIGS. 3C to 4E show, with respect to all the graphic data in the drawing data of FIG. 2B, each graphic data is drawn on a device pattern formed by any exposure process. And drawing data created for each figure data drawn on the device pattern formed by the same exposure process.

That is, as shown in FIG.
When the pattern data 1c drawn on the device pattern 1b formed in the first exposure step is classified and extracted, and the resist is subjected to electron beam exposure using the figure data 1c, the device pattern 1b is exposed in the first exposure step. At the same time, with reference to the alignment mark 1a formed at the same time, when the figure data 1c is subjected to electron beam exposure by displacing the misalignment component generated in the first exposure process from the design arrangement, the pattern data 1c is formed on the lower device pattern 1b. The alignment can form a resist pattern.

Further, as shown in FIG.
When the pattern data 2c to be drawn on the device pattern 2b formed in the exposure step is classified and extracted, and when the resist is subjected to electron beam exposure using the pattern data 2c,
With reference to the alignment mark 2a formed at the same time as the device pattern 2b in the second exposure step, electron beam exposure is performed by displacing the figure data 2c from the designed layout by a displacement component generated in the second exposure step. A resist pattern can be formed by aligning on the lower device pattern 2b.

Then, as shown in FIG. 4E, the device pattern 3b formed in the third exposure step is formed.
When the pattern data 3c, 3c to be drawn on the pattern is classified and extracted, and the resist is subjected to electron beam exposure by using the figure data 3c, 3c, the alignment mark 3 formed simultaneously with the device pattern 3b in the third exposure step.
When the electron beam exposure is performed by displacing the figure data 3c, 3c from the design arrangement by the positional shift component generated in the second exposure step with reference to a, the resist pattern is aligned on the lower device pattern 3b. Can be formed.

FIG. 4F shows a method for forming a resist pattern on each device pattern existing in the drawing area on the wafer shown in FIG. 1A by using the graphic data shown in FIG. 1A according to this embodiment. An outline of functions to be provided in the electron beam exposure apparatus is shown.

The alignment condition setting section 4 shown in FIG. 2 sets and stores an alignment condition for each identification code added to each figure data, and the alignment unit 5 is set in the alignment condition setting section 4. The alignment is executed in accordance with the alignment conditions. The alignment correction value memory 6 stores the electron beam deflection correction values obtained from the alignment performed for each alignment condition, and includes a drawing data memory 7.
2 stores the graphic data shown in FIG. 2B. The data control unit 8 converts the graphic data sequentially read from the drawing data memory 7 into electron beam deflection data, and simultaneously stores each graphic data. Is read, the electron beam deflection correction value stored in the alignment correction value memory 6 is added according to the identification data, and the added value is output to the electron beam controller 9 of the electron beam exposure apparatus. .

FIG. 5 is an explanatory view of an alignment mark and a device pattern in a plurality of exposure steps in the electron beam exposure method of the first embodiment.

In this figure, 1x is a drawing area on the wafer, 1d is an alignment mark formed in the first exposure step, 1e is a device pattern formed in the first exposure step, and 1h is a first exposure step 2d is an alignment mark formed in the second exposure step, 2e is a device pattern formed in the second exposure step, and 2f is a figure data drawn on the device pattern formed in the second exposure step. Design position of the formed alignment mark, 2
g is the design position of the device pattern formed in the second exposure step, 2h is the figure data drawn on the device pattern formed in the second exposure step, and 2h 'is the corrected second exposure step. Graphic data drawn on the device pattern formed in the process, 3d is an alignment mark formed in the third exposure process, 3e is a device pattern formed in the third exposure process, 3f is a third exposure process 3g is the design position of the device pattern formed in the third exposure step, 3h is the figure drawn on the device pattern formed in the third exposure step. Data 3h ′ indicates graphic data to be drawn on the device pattern formed in the third exposure step after the correction.

FIG. 3 shows the case where this embodiment is used.
An exposure area on a wafer having alignment marks and a plurality of device patterns formed by each of the plurality of exposure steps is shown. The alignment marks 1d, 2d, 3d and device patterns 2e, 3e formed by the respective exposure steps are displaced from their designed positions.

As described above, the first exposure step,
When exposure is performed using the alignment mark formed in any one of the second exposure step and the third exposure step and using the drawing data of FIG. 2B as it is, alignment is performed on all device patterns. It is difficult to form a resist pattern by using this method.

With reference to this figure, the electron beam exposure method of the first embodiment is used to perform the electron beam exposure by displacing the misalignment component generated in each electron beam exposure step from the designed arrangement, thereby obtaining the lower device pattern. A process of forming a resist pattern by aligning on the substrate will be described.

First, a positional shift component of the drawing data shown in FIG. 2B is detected with reference to the alignment mark 1d formed in the first exposure process, and is formed in the first exposure process by this positional shift component. When the electron beam exposure is performed after correcting the graphic data 1h drawn on the device pattern,
The resist pattern is formed in alignment with the device pattern 1e formed in the first exposure step.

However, based on the misalignment component between the alignment mark 1d formed in the first exposure process and the graphic data of the resist pattern formed thereon, which has been detected and stored in the above process, the second exposure process is performed. When the electron beam exposure is performed using the graphic data 2h drawn on the device pattern formed in step 2 as it is, the device pattern 2e actually formed in the second exposure step is the same as that of the device pattern formed in the second exposure step. Since the device pattern 2e is formed so as to be displaced from the design position 2g, the device pattern 2e formed in the second exposure process is aligned with the graphic data 2h drawn on the device pattern formed in the second exposure process. Will not be.

Therefore, as in this embodiment, the designed position 2 of the alignment mark formed in the second exposure step is used.
From the positional relationship between f and the alignment mark 2d actually formed in the second exposure step, a position shift component generated in the second exposure step is detected, and the device formed in the second exposure step by this position shift component. The graphic data 2h to be drawn on the device pattern formed in the second exposure process after the correction by correcting the graphic data 2h drawn on the pattern
h ′, the device pattern 2e actually formed in the second exposure step and the corrected second pattern
The figure data 2h 'to be drawn on the device pattern formed in the exposure step can be completely aligned.

Similarly, the alignment mark 1d formed in the first exposure step stored in the above-described step is formed.
When the electron beam exposure is performed using the graphic data 3h drawn on the device pattern formed in the third exposure step as it is based on the positional shift component of the graphic data of the resist pattern formed thereon and the resist pattern formed thereon, actually, Since the device pattern 3e formed in the third exposure step is displaced from the designed position 3g of the device pattern formed in the third exposure step, the device pattern 3e is formed in the third exposure step. The device pattern 3e and the graphic data 3h drawn on the device pattern formed in the third exposure step are not aligned.

Therefore, as in the above case, the design position 3 of the alignment mark formed in the third exposure step is set.
Based on the positional relationship between f and the alignment mark 3d actually formed in the third exposure step, a position shift component generated in the third exposure step is detected, and the device formed in the third exposure step by this position shift component. When the graphic data 3h, 3h drawn on the pattern is corrected and the electron beam exposure is performed by the graphic data 3h ′, 3h ′ drawn on the device pattern formed in the third exposure step after the correction, Device pattern 3e formed in the third exposure step
And the figure data 3h ', 3h' drawn on the device pattern formed in the third exposure step after the correction can be perfectly aligned.

As described above, the amount of misalignment occurring in each exposure step obtained by using the alignment marks formed in each of the plurality of exposure steps is detected, and the electron beam deflection correction is performed based on the amount of misalignment. By calculating the values and correcting the electron beam deflection angle in the electron beam exposure step when forming a resist pattern on the device pattern corresponding to each alignment mark based on the calculation result, the lower device pattern and the upper device pattern are corrected. It becomes possible to align the resist pattern.

(Second Embodiment) FIGS. 6 to 9 are views for explaining an electron beam exposure method according to a second embodiment, in which (A) shows a drawing area on a wafer, and (B) to (E). Indicates a drawing data area, and (F) indicates a function to be provided in the electron beam exposure apparatus of this embodiment.

In this figure, 11x denotes a drawing area on the wafer, 11a denotes an alignment mark formed in the first exposure step, 11b denotes a device pattern formed in the first exposure step, and 12b denotes a device pattern formed in the second exposure step. The formed device pattern, 13b is a device pattern formed in the third exposure step, 11y is a drawing data area, and 11c is a first data pattern.
12c is figure data drawn on the device pattern formed in the second exposure step, 13c is figure data drawn on the device pattern formed in the second exposure step, and 13c is a device formed in the third exposure step. Graphic data to be drawn on the pattern; 14 is an alignment condition setting unit;
Denotes an alignment unit, 16 denotes an alignment correction value memory, 17 denotes an alignment correction value addition value memory, 18 denotes a drawing data memory, 19 denotes a data control unit, and 20 denotes an electron beam control unit.

In the first embodiment, the device pattern and the alignment mark are formed by each of the plurality of exposure steps. In this embodiment, for example, the first one of the plurality of exposure steps is used. The device pattern and alignment mark are formed by the exposure process of
No alignment mark is formed by the second and subsequent exposure steps.

In this embodiment, as in the case where a PSG layer is spin-coated on a wiring strip on a substrate, for example, the lower wiring strip and the displacement component of the PSG layer thereover are fixed and reproduced. It can be applied when there is a possibility.

In such a case, for example, wiring and PS
The position error component fixed in the G layer is measured in advance,
When a resist pattern is formed by electron beam exposure on a device pattern formed by the first exposure step, the design position of the graphic data and the position shift component of the device pattern formed by the first exposure step are determined. Measurement is performed from the position of the alignment mark formed in the first exposure step, and a fixed displacement component that has been measured in advance is added to this displacement component, thereby obtaining a second exposure step, a third exposure step, and the like. The resist pattern can also be formed on the device pattern formed by the above process by aligning the resist pattern. The electron beam exposure method of the second embodiment will be described with reference to these drawings.

FIG. 6A shows a device pattern 11b formed by the first exposure step, a device pattern 12b formed by the second exposure step, and a device pattern 13b formed by the third exposure step. First
The drawing area 11x on the wafer having the alignment mark 11a formed simultaneously with the device pattern 11b by the exposure process shown in FIG.

FIG. 7B shows each device pattern 1 existing in the drawing area 11x on the wafer shown in FIG.
The resist formed on the entire surface of the device patterns 1b, 12b, and 13b is exposed to an electron beam, and the device patterns 11b, 1
For each drawing data area 11y in the same figure data for forming a resist pattern in alignment with 2b, 13b, each figure data 11c, 12c, 13
It shows which exposure process c and 13c are drawn on the device pattern formed.

FIGS. 8C to 9E show, with respect to all the graphic data in the drawing data of FIG. 7B, each graphic data is drawn on a device pattern formed by any exposure process. And drawing data created for each figure data drawn on the device pattern formed by the same exposure process.

That is, as shown in FIG. 8C, the device pattern 11 formed in the first exposure step is formed.
b is classified and extracted, and when the resist is subjected to electron beam exposure by using the graphic data 11c, the alignment mark 11 formed simultaneously with the device pattern 11b in the first exposure step.
When the electron beam exposure is performed by displacing the figure data 11c from the design layout by a positional shift component generated by the first exposure process with reference to a, a resist pattern is formed by aligning the pattern data 11c on the lower device pattern 11b. can do.

Further, as shown in FIG.
The graphic data 12c to be drawn on the device pattern 12b formed in the exposing step is classified and extracted, and the graphic data 12c includes a positional shift component generated by the first exposing step, When electron beam exposure is performed by adding a fixed displacement component that has been measured in advance, a resist pattern can be formed by arranging on the lower device pattern 12b.

Then, as shown in FIG. 9E, the device pattern 13 formed in the third exposure step is formed.
b, the graphic data 13c, 13c to be drawn on the image data b are classified and extracted. The graphic data 13c, 13c include a positional displacement component generated by the first exposure process obtained earlier,
When electron beam exposure is performed by adding a fixed displacement component that has been measured in advance, a resist pattern can be formed by arranging on the underlying device pattern 13b.

FIG. 9 (F) shows an electronic device for forming a resist pattern on each device pattern existing in the drawing area on the wafer shown in FIG. 6 (A) using the graphic data shown above according to this embodiment. An outline of functions to be provided in a beam exposure apparatus is shown.

The alignment condition setting unit 14 shown in FIG.
The alignment unit 15 sets and stores an alignment condition for each identification code added to each figure data. The alignment unit 15 performs alignment according to the alignment condition set in the alignment condition setting unit 14. The correction value memory 16 stores the first
The electron beam deflection correction value obtained from the alignment at the time of forming the resist pattern on the device pattern formed by the exposure step is stored in the alignment correction value added value memory 17 in advance. The fixed displacement component of the device pattern formed by the first exposure process and the subsequent exposure process, that is, the electron beam deflection correction stored in the alignment correction value memory for each identification code added to the drawing data. The drawing data memory 18 stores the drawing data shown in FIG. 7B, and the data control unit 19 sequentially reads the drawing data from the graphic data memory 7. The converted graphic data is converted into electron beam deflection data, and at the same time, the identification code added to each And the electron beam deflection correction value stored in the alignment correction value memory 16 and obtained from the alignment at the time of forming the resist pattern on the device pattern formed by the first exposure step. The electron beam deflection correction value by the fixed displacement component of the device pattern formed by the first exposure process and the subsequent exposure process, which is stored in the value addition value memory 17 and measured in advance, is added. This is output to the electron beam control unit 20 of the electron beam exposure apparatus.

FIG. 10 is an explanatory view of an alignment mark and a device pattern by a plurality of exposure steps in the electron beam exposure method of the second embodiment.

In this figure, 11x is a drawing area on the wafer, 11d is an alignment mark formed in the first exposure step, 11e is a device pattern formed in the first exposure step, and 11h is a first exposure step. The graphic data drawn on the device pattern formed in step 2
12g is a design position of the device pattern formed in the second exposure step, 12h is a figure data drawn on the device pattern formed in the second exposure step, 12h 'is figure data drawn on the device pattern formed in the second exposure step after correction, 13e is a device pattern formed in the third exposure step, and 13g is formed in the third exposure step The design position of the device pattern, 13h is figure data drawn on the device pattern formed in the third exposure step, and 13h 'is drawn on the device pattern formed in the third exposure step after correction. FIG.

FIG. 11 shows the case where this embodiment is used.
An exposure area on a wafer having alignment marks formed by a first exposure step of a plurality of exposure steps and a plurality of device patterns formed by each exposure step is shown. The alignment mark 11d formed in the first exposure step and the device patterns 11e, 12e, 13e formed in each exposure step are displaced from their designed positions.

With reference to this drawing, the electron beam exposure is performed by displacing the misalignment component generated in each electron beam exposure step from the designed arrangement by the electron beam exposure method of the second embodiment, thereby forming the lower device pattern. A process of forming a resist pattern by aligning the above will be described.

First, with reference to the alignment mark 11d formed in the first exposure step, a position shift component between the device pattern formed in the first exposure step and the graphic data 11h formed thereon is detected. When the graphic data h is corrected by the displacement component and the electron beam is exposed, the resist pattern is formed in alignment with the device pattern 11e formed in the first exposure step.

However, based on the device pattern actually formed in the first exposure step detected and stored in the above-described step and the displacement component of the graphic data 11h, the device pattern formed in the second exposure step is used as a reference. When electron beam exposure is performed using the graphic data 12h to be drawn as it is, the device pattern 12e formed in the second exposure step is actually located at the design position of the device pattern formed in the second exposure step. Since it is formed displaced from 12g, the device pattern 12e formed in the second exposure step and the graphic data 12h drawn on the device pattern formed in the second exposure step are not aligned. .

Therefore, as in this embodiment, the positional deviation between the device pattern actually formed in the first exposure step and the graphic data 11h and the device pattern formed in the first exposure step determined in advance. The figure data 12h drawn on the device pattern formed in the second exposure step is corrected by the fixed relative displacement component of the device pattern formed in the second exposure step and the corrected When the electron beam exposure is performed using the graphic data 12h 'drawn on the device pattern formed in the second exposure step, the device pattern 12e formed in the second exposure step and the corrected second exposure step are formed in the second exposure step. Graphic data 12h 'drawn on a device pattern
Can be perfectly aligned.

Similarly, based on the device pattern actually detected and stored in the above-described first exposure step and the misalignment component between the graphic data 11h and the pattern data 11h, the third pattern is formed in the third exposure step. When the electron beam exposure is performed using the graphic data 13h, 13h drawn on the device pattern as it is, the device pattern 13e formed in the third exposure step is actually a device pattern formed in the third exposure step. Is formed so as to be displaced from the designed position 13g of FIG. 1, the device pattern 13e actually formed in the third exposure step and the graphic data 1 drawn on the device pattern formed in the third exposure step
No alignment is performed with 3h and 13h.

Therefore, similarly to the above case, the device pattern actually formed in the first exposure step and the positional deviation between the graphic data 11h and the device pattern formed by the first exposure step determined in advance are determined. And figure data 13h and 13 drawn on the device pattern formed in the third exposure step by a fixed relative displacement component of the device pattern formed in the third exposure step.
h, and the graphic data 13h ', 1 drawn on the device pattern formed in the third exposure step after the correction.
When the electron beam exposure is performed by 3h ', the device pattern 13e formed in the third exposure process and the graphic data 13h' and 13h 'drawn on the device pattern formed in the corrected second exposure process are completely converted. Can be aligned.

As described above, the device pattern actually formed in the first exposure step and the displacement component of the graphic data, the device pattern formed in the first exposure step and the third exposure An electron beam exposure correction step for forming a resist pattern on a device pattern formed in each exposure step based on a calculation result of an electron beam deflection correction value based on a fixed relative displacement component of a device pattern formed in the step. By correcting the electron beam deflection angle, it becomes possible to align the underlying device pattern with the resist pattern thereon.

In each of the above-described embodiments, graphic data for drawing a resist pattern on at least one device pattern formed by each of the plurality of exposure steps is separately stored for each exposure step. If the data is divided into files and the drawing data of the resist pattern formed on the device pattern formed in each exposure step is corrected at once, and the electron beam exposure is performed at once, the exposure step can be sped up.

[0061]

As described above, according to the present invention,
Even if a device pattern existing in an exposure region is formed by a plurality of exposure steps, a resist pattern can be formed on all of the device patterns by aligning with each device pattern. The characteristics or the yield of the device can be improved, or the object having a complicated shape to be machined by micromachining can be machined with high precision.

[Brief description of the drawings]

FIG. 1 is an explanatory view (1) of an electron beam exposure method according to a first embodiment, in which (A) shows a drawing area on a wafer.

FIG. 2 is an explanatory view (2) of the electron beam exposure method according to the first embodiment, and (B) shows a drawing data area.

FIG. 3 is an explanatory view (3) of the electron beam exposure method according to the first embodiment, and (C) and (D) show a drawing data area.

FIG. 4 is an explanatory view (4) of the electron beam exposure method of the first embodiment, where (E) shows a drawing data area and (F)
Indicates the functions that the electron beam exposure apparatus of this embodiment should have.

FIG. 5 is an explanatory diagram of an alignment mark and a device pattern by a plurality of exposure steps in the electron beam exposure method of the first embodiment.

FIG. 6 is an explanatory view (1) of an electron beam exposure method according to a second embodiment, in which (A) shows a drawing area on a wafer.

FIG. 7 is an explanatory view (2) of the electron beam exposure method according to the second embodiment, and (B) shows a drawing data area.

FIG. 8 is an explanatory view (3) of the electron beam exposure method according to the second embodiment, and (C) and (D) show a drawing data area.

FIG. 9 is an explanatory view (4) of the electron beam exposure method of the second embodiment, wherein (E) shows a drawing data area, and (F)
Indicates the functions that the electron beam exposure apparatus of this embodiment should have.

FIG. 10 is an explanatory diagram of an alignment mark and a device pattern by a plurality of exposure steps in the electron beam exposure method of the second embodiment.

[Explanation of symbols]

1x Drawing area on wafer 1a Alignment mark formed in first exposure step 1b Device pattern formed in first exposure step 2a Alignment mark formed in second exposure step 2b Formed in second exposure step Device pattern 3a Alignment mark formed in third exposure step 3b Device pattern formed in third exposure step 1y Drawing data area 1c Graphic drawn on device pattern formed in first exposure step Data 2c Graphic data drawn on the device pattern formed in the second exposure step 3c Graphic data drawn on the device pattern formed in the third exposure step 4 Alignment condition setting unit 5 Alignment unit 6 Alignment correction Value memory 7 Drawing data memory 8 Data control unit 9 Electronic 1d Alignment mark formed in the first exposure step 1e Device pattern formed in the first exposure step 1h Graphic data drawn on the device pattern formed in the first exposure step 2d Second Alignment mark 2e formed in the exposure step 2e Device pattern formed in the second exposure step 2f Design position of alignment mark formed in the second exposure step 2g Device pattern formed in the second exposure step Design position 2h Graphic data drawn on the device pattern formed in the second exposure step 2h 'Graphic data drawn on the device pattern formed in the second exposure step after correction 3d Third Alignment mark formed in exposure step 3e Device pattern formed in third exposure step 3f Third exposure step Design position of the formed alignment mark 3g Design position of the device pattern formed in the third exposure step 3h Graphic data drawn on the device pattern formed in the third exposure step 3h 'After correction Graphic data 11x drawn on the device pattern formed in the third exposure step 11x drawing area 11a on the wafer 11a alignment mark formed in the first exposure step 11b device pattern 12b formed in the first exposure step Device pattern 13b formed in the second exposure step 13b Device pattern formed in the third exposure step 11y Drawing data area 11c Graphic data 12c drawn on the device pattern formed in the first exposure step 12c Second Figure data 13c drawn on the device pattern formed in the exposure step Third exposure Data drawn on the device pattern formed by the process 14 Alignment condition setting unit 15 Alignment unit 16 Alignment correction value memory 17 Alignment correction value addition value memory 18 Drawing data memory 19 Data control unit 20 Electron beam control unit 11d First 11e Alignment mark formed in the first exposure step 11e Device pattern formed in the first exposure step 11h Graphic data drawn on the device pattern formed in the first exposure step 12e Formed in the second exposure step Device pattern 12g Design position of device pattern formed in second exposure step 12h Graphic data drawn on device pattern formed in second exposure step 12h 'Formed in second exposure step after correction Figure drawn on the drawn device pattern Shape data 13e Device pattern formed in the third exposure step 13g Design position of device pattern formed in the third exposure step 13h Graphic data drawn on the device pattern formed in the third exposure step 13h 'Graphic data drawn on the device pattern formed in the third exposure step after correction

Claims (5)

(57) [Claims] 1. A method according to claim 1, wherein the specific device pattern is formed on an exposure region having at least one device pattern and at least one alignment mark formed in each of the plurality of exposure steps. The figure data in the same drawing data for forming a resist pattern by alignment has an identification code indicating an exposure step in which a device pattern of a lower layer of the resist pattern drawn by the figure data is formed. An electron beam exposure method, wherein graphic data of a resist pattern formed on a device pattern formed in each exposure step is corrected by a displacement component peculiar to each exposure step in which the underlying device pattern is formed. 2. The method according to claim 1, wherein at least one device pattern formed in each of the plurality of exposure steps and at least one alignment mark formed simultaneously with the device pattern in one of the plurality of exposure steps are formed. A device in a lower layer of a resist pattern in which graphic data in the same drawing data for forming a resist pattern in alignment with the specific device pattern is formed on the specific device pattern present in the exposure region having the pattern data. It has an identification code indicating an exposure step in which the pattern is formed, and by means of the identification code, the graphic data of the resist pattern formed on the device pattern formed in each exposure step, the The position shift component of the first exposure process and a predetermined value An electron beam exposure method, wherein the correction is performed by a displacement component between a device pattern formed in each exposure step and a device pattern formed in the first exposure step. 3. A function of designating, for each identification code, an alignment mark and an alignment method to be used as a reference when aligning each resist pattern, and drawing each figure data under conditions assigned to each identification code. 3. An electron beam exposure method according to claim 1, wherein an electron beam direct writing apparatus capable of performing the method is used. 4. Designating whether or not to align a resist pattern with an underlying device pattern for each identification code, designating an alignment mark and an alignment method to be used as a reference when performing alignment, and performing no alignment Has a function of assigning a unique electron beam deflection correction value to be input instead of an electron beam deflection correction value obtained by alignment, and can draw each figure data under conditions assigned to each identification code. 3. The electron beam exposure method according to claim 1, wherein a direct writing apparatus is used. 5. Dividing graphic data for drawing a resist pattern on at least one device pattern formed in each of the plurality of exposure steps into separate files for each of the exposure steps The electron beam exposure method according to claim 1 or 2, wherein: