JP3052907B2 - EMI design and evaluation method for electronic equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for designing and evaluating EMI of electronic equipment, and more particularly, to a method for designing and evaluating a series of electronic equipment.
ctro-Magnetic Interferen
ce).

[0002]

2. Description of the Related Art Conventionally, as a design / evaluation process of an electronic device, as shown in FIG. 9, a function design process S41, a component selection process S42, a circuit detailed design process S45, a mounting detailed design process S48, Substrate manufacturing process S49, component mounting process S50, function confirmation process S51, EMI evaluation process S
52 and a shipping step S53.

In this case, a circuit detailed design step S45 sequentially performs a circuit design step S43. At the time of performing the circuit design, the circuit design is verified by a circuit simulation step S44, and the result is reflected in the circuit design.

In a detailed mounting design step S48, a mounting design verification is performed in a mounting simulation step S47 in a mounting design step S46 performed after the circuit detailed design step S45.
The results are reflected in the packaging design.

[0005] The board manufacturing process S49 is a mounting design process S
Manufacturing is performed using the wiring pattern information obtained in 46,
In the component mounting step S50, components are mounted on the board. In the function confirmation step S51, the function is confirmed after the components are mounted, and the EM
In the I evaluation step S52, the EMI evaluation is performed after confirming the function. After the EMI evaluation, the electronic device is shipped in a shipping step S53.

In the above-described series of electronic device design / evaluation courses, if an operation failure is found in the function confirmation step S51, the process returns to the substrate manufacturing step S49 to re-manufacture the substrate. If a predetermined EMI characteristic is not obtained in the EMI evaluation step S52, the process returns to the component mounting step S50 to mount an EMI countermeasure component such as an EMI filter. Still EMI
If the characteristics cannot be obtained, the process returns to the mounting design step S46, and the size of the board and the mounting mode of the components are changed.

As a conventional EMI characteristic evaluation method, there is a method for a housing as shown in FIG. In this method, the electromagnetic wave leakage characteristics of the shielding structure with respect to the high-frequency magnetic field are measured (Step S62 in FIG. 10), and the delay propagation impedance is obtained from the measurement result (Step S6 in FIG. 10).
3) A shielding effect on the wave source is obtained from the transfer impedance and the wave impedance created by an arbitrary wave source (step S64 in FIG. 10). This method is disclosed in
No. 302946.

However, in the above method, E
The actual shielding effect cannot be obtained until the MI measurement evaluation is performed.
If the characteristics are not obtained, a coping solution is taken such as occupying an expensive EMI evaluation facility, searching for the cause portion, and strengthening the shield of the portion. Further, in this case, repair costs, labor, and materials are required, which leads to an increase in the design / evaluation period and costs.

Further, as a method for preventing EMI radiation, as shown in FIG. 11, a forward path and a return path in an electronic circuit are made to have the same magnitude of the magnetic field generated by the current and the opposite direction as shown in FIG. So that each section 31, 3
There is also a method in which the EMI radiation is suppressed by arranging 2 and canceling out the electromagnetic field. This method is disclosed in JP-A-7-326833.

However, EMI is not caused only by the signal pattern, but is closely related to the frequency characteristics of the power supply / GND (ground) plane. The frequency and harmonics of the current flowing through the circuit may match. In that case, large EMI radiation occurs, which also occupies the EMI evaluation facility and takes the above countermeasures, leading to an increase in the design / evaluation period and cost.

[0011]

In the above-described conventional EMI design and evaluation method for electronic equipment, the function design, component selection,
Circuit design, mounting design, board fabrication, component mounting, function confirmation,
EMI evaluation and shipment are performed in this order.

However, in this design / evaluation process, it is only possible to confirm whether or not a newly designed device satisfies the performance in the EMI evaluation for the first time after making the EMI evaluation. Since this is a process, if the desired performance is not obtained in this process, it is necessary to return to the packaging design. For this reason, there is a problem that the development period is extended and it is not possible to meet a predetermined shipping time.

In the conventional design method described above, in many cases, the mounting substrate serving as the electromagnetic radiation source cannot be recreated due to the delivery deadline limitation as described above. Or an electromagnetic wave absorber in the power supply line. In this case, labor and materials are needed for that,
In addition to increasing costs, during that time expensive EM
Since the I evaluation facility is occupied, there is a problem that the design engineer cannot perform the next device development design.

Therefore, an object of the present invention is to solve the above-mentioned problems and to perform mounting design without regression.
E-equipment of electronic equipment that can reduce labor and material cost at the time of evaluation, and can also make effective use of time in EMI evaluation facilities and thereby shorten design and evaluation periods.
An object of the present invention is to provide an MI design / evaluation method.

[0015]

SUMMARY OF THE INVENTION An EMI design / evaluation method for electronic equipment according to the present invention comprises a function design, a component selection, a circuit design, a packaging design, a board fabrication, a component mounting, a function confirmation, and the like. An EMI design / evaluation method for an electronic device to be shipped after confirming EMI characteristics, comprising: an extraction step of extracting design data of a power supply / ground layer of the board; and an extraction step based on the data extracted in the extraction step. A model generation step of generating a model of the substrate, a surface analysis simulation step of performing a surface analysis simulation based on the model of the substrate, and data performed in parallel with the surface analysis simulation step and extracted in the extraction step. A board manufacturing process of manufacturing a board having only a power / ground layer based on the
A first actual measurement / examination step of collating a simulation result obtained in the surface analysis simulation step with a result of actually measuring a frequency characteristic of a substrate alone including only a power / ground layer produced in the substrate production step; A mounting step of mounting a bypass capacitor for reducing radiation from the substrate on a substrate having only the power / ground layer after the actual measurement / examination step in the first actual measurement / examination step; and a mounting position and a capacitance value of the bypass capacitor. A second actual measurement / examination step of collating a result obtained in the simulation step with a result obtained by actually measuring a frequency characteristic of a substrate on which the bypass capacitor is mounted in the mounting step, The power supply / ground layer pattern obtained in the second actual measurement / examination step and the bypass capacitor And a step of feeding back the capacity and location information to the packaging design process, are carried out in parallel with each step to the packaging design process.

According to another EMI design / evaluation method for an electronic device of the present invention, a function design process, a component selection process, and a circuit design process are sequentially performed, and a circuit design verification is performed by a circuit simulation process when the circuit design is performed. And a circuit detail design step of reflecting the result in the circuit design, and a package detail verification step of performing a package design verification by a package simulation step in a package design step performed after the circuit detail design step and reflecting the result in the package design. A design process, a board manufacturing process for manufacturing using the wiring pattern information obtained in the mounting design process, a component mounting process for mounting components on the board, and a function checking process for checking functions after mounting the components. And a method for designing and evaluating an electronic device to be shipped via an EMI characteristic confirmation step of performing EMI characteristic confirmation after the function confirmation. An extraction step of extracting design data of a power / ground layer of a board, a model generation step of generating a model of the board based on the data extracted in the extraction step, and a plane for performing a plane analysis simulation based on the model An analysis simulation step, a board fabrication step performed simultaneously with the plane analysis simulation step and fabricating a substrate having only the power / ground layer, a result obtained in the plane analysis simulation step, and a board produced in the board fabrication step. The first actual measurement for comparing with the result of actual measurement of the frequency characteristic of the substrate alone having only the power / ground layer.
A studying step, a mounting step of mounting a bypass capacitor for reducing radiation from the board on the board having only the power supply / ground layer after the actual measurement and studying step in the first actual measurement and studying step, A simulation process of simulating a mounting position and a capacitance value;
A second actual measurement / examination step of collating a result obtained in the simulation step with a result of actual measurement of a frequency characteristic of a board on which the bypass capacitor is mounted in the mounting step, and the second actual measurement / examination step The power source obtained in /
A power / ground design step of feeding back a ground layer pattern and capacitance and position information of the bypass capacitor to the mounting detailed design step, wherein the extraction step, the model generation step, the surface analysis simulation step, and the board fabrication The step, the first actual measurement / examination step, the mounting step, the simulation step, the second actual measurement / examination step, and the power / ground design step are performed in parallel with the detailed mounting design step. .

That is, according to the EMI design / evaluation method for electronic equipment of the present invention, a function design step, a component selection step, and a circuit design step are sequentially performed, and at the time of performing the circuit design, circuit design verification is performed by circuit simulation. And a circuit detail design process for reflecting the result in the circuit design, and a package detail design process for performing a package design verification by a mounting simulation in a package design process following the circuit detail design process and reflecting the result in the package design. A board manufacturing process for manufacturing using the wiring pattern information obtained in this mounting design process, a component mounting process for mounting components on the board, a function checking process for checking functions after component mounting, and a function checking. The shipment is performed through an EMI characteristic checking step of checking EMI characteristics later.

In this series of electronic device development processes, a process of extracting design data of a power supply / GND (ground) layer in parallel with a detailed mounting design process, and a model of the board based on the extracted data. The model creation process to create,
A surface analysis simulation step of performing a surface analysis simulation based on this model is sequentially executed. Simultaneously with the surface analysis simulation step, a substrate manufacturing step of manufacturing a substrate including only the power supply / GND layer is performed. Results and frequency characteristics S of the substrate alone
The collation with the result of actually measuring the parameter is performed in a first actual measurement / examination step.

After the actual measurement / examination process, a bypass capacitor mounting process of mounting a bypass capacitor for reducing radiation from the substrate on a substrate having only the power supply / GND layer, and a model generation process of a mounting position and a capacitance value of the bypass capacitor are performed. In a second actual measurement / examination step, a simulation step through which the simulation is performed and a result obtained by the simulation are compared with a result obtained by actually measuring a frequency characteristic S parameter on a substrate on which a bypass capacitor is mounted.

By feeding back the power supply / GND layer pattern obtained in these steps and the capacitance value and position information of the bypass capacitor from the power supply / GND design step to the mounting detailed design step, EMI is performed in the upstream step of the design. Characteristics can be guaranteed.

[0021]

Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a flowchart illustrating a method for designing and evaluating EMI of an electronic device according to an embodiment of the present invention. In the figure, in the EMI design / evaluation method of the present invention, a function design step S1, a component selection step S2, a circuit detailed design step S5, a mounting detailed design step S8, a board manufacturing step S9, a component mounting step S10, Function confirmation process S1
1, an EMI characteristic checking step S12, and a shipping step S13 are sequentially executed.

At this time, in the circuit detailed design step S5, the circuit is designed in the circuit design step S3, and at the time of the circuit design, the circuit design is verified in the circuit simulation step S4, and the result is reflected in the circuit design step S3. ing.

In the detailed mounting design step S8, the mounting design step S
6, the mounting design is verified by the mounting simulation step S7 at the time of the mounting design, and the result is reflected in the mounting design step S6.

In the board manufacturing step S9, manufacturing is performed using the wiring pattern information obtained in the mounting design step S8. In the component mounting step S10, components are mounted on the manufactured board.
In the function check step S11, a function check is performed after the components are mounted.
In the EMI characteristic confirmation step S12, the EMI characteristics are confirmed after the function is confirmed, and the EMI characteristics are shipped in the shipping step S13.

In the EMI design / evaluation method according to one embodiment of the present invention, a power supply / GND (ground) layer extraction step S14 and a model The generation step S19 and the surface analysis simulation step S20 are sequentially executed.

In the EMI design / evaluation method according to one embodiment of the present invention, the surface analysis simulation step S 20
At the same time, the substrate manufacturing step S15 of only the power supply / GND layer is advanced, and the first actual measurement / examination for comparing the result obtained in the surface analysis simulation step S20 with the actual measurement result of the frequency characteristic S parameter of the substrate alone. Step S16 is performed.

Further, in the EMI design / evaluation method according to one embodiment of the present invention, after the first actual measurement / examination step S16, the power supply / GND is generated in a decap model generation step S21.
A mounting position and a capacitance value of a bypass capacitor (hereinafter, referred to as a bypass capacitor) for reducing radiation from the substrate including only the layers are generated, and a simulation of a bypass capacitor model is performed based on the mounting position and the capacitance value of the bypass capacitor in a simulation step S22. ing.

Furthermore, the EM according to one embodiment of the present invention
In the I design / evaluation method, the simulation step S22
At the same time, a decap is mounted on a substrate having only a power supply / GND layer in a decap mounting step S17, and a simulation step S17 is performed.
A second comparison is made between the result obtained in step 22 and the result of actually measuring the frequency characteristic S parameter of the board on which the decap is mounted.
The actual measurement / examination step S18 is performed.

In the power supply / GND design step S23 consisting of the above steps, the power supply / GND layer pattern obtained in these steps and the capacitance and position information of the decap are fed back to the mounting detailed design step S8. by this,
EMI characteristics can be guaranteed in an upstream process of designing an electronic device.

FIG. 2A is a diagram showing the frequency characteristics of the board when no decap is mounted, and FIG. 2B is a diagram showing the frequency characteristics of the board after the decap is mounted.
In FIG. 2, f1 indicates a clock frequency of a product (not shown), f2 to f6 indicate harmonics of the clock, and A to H indicate peak values (frequency) of the frequency characteristic 11 of the substrate (not shown).

In a state before the decap is mounted, the clock frequency of the product and its harmonics 12 (f1 to f6) coincide with the peak values E and H of the frequency characteristic 11 of the substrate at the frequencies f4 and f6. If the design and manufacturing proceed in this state, large EMI radiation will occur at frequencies f4 and f6 at the time of EMI measurement immediately before shipment.

When a decap is mounted on this board, the peak value of the frequency characteristic 13 of the board shifts (A 'to H'),
The shift amount is changed depending on the mounting position and the capacitance value of the bypass capacitor, and the clock frequency of the product and its harmonics 12 (f1
To f6) are determined.
In this case, the arrangement and the capacitance value are determined so as not to coincide with the peak values E and H of the frequency characteristics 11 of the substrate at the frequencies f4 and f6.

FIG. 8 shows the first actual measurement / examination step S16 of FIG.
10 is a flowchart showing a detailed operation of a second actual measurement / examination step S18. The figure shows an operation flow for determining a mounting position and a capacitance value such that the peak value of the frequency characteristic of the substrate is shifted from the clock frequency of the product and its harmonics by mounting the decap.

In this case, in the first actual measurement / examination step S16, first, the frequency characteristics of the power supply / GND layer of the substrate are measured (step S31 in FIG. 8), and the surface analysis simulation step S20 is performed.
The peak frequency is found by comparing it with the result (step S3 in FIG. 8).
2) Compare whether the frequency matches the actual product clock frequency and its harmonics (step S3 in FIG. 8).
3).

If the comparison results match, a decap is mounted on the substrate in a decap mounting step S17. If the comparison results do not match, it is determined that an appropriate value has been detected, and the data is fed back to the mounting detailed design step S8.

When the decap is mounted on the substrate in the decap mounting step S17, the frequency characteristic of the power supply / GND layer of the substrate is measured again in the second actual measurement and examination step S18 (FIG. 8).
Step S35), comparing with the result of the simulation step S22
Then, the peak frequency is found (step S36 in FIG. 8), and it is compared whether the frequency matches the clock frequency of the actual product and its harmonics (step S37 in FIG. 8).

When the comparison results match, the mounting position and the capacitance value of the decap are changed so that the peak values do not overlap (step S39 in FIG. 8), and the process returns to step S35 to perform the above processing. If the comparison results do not match, it is determined that an appropriate value has been detected, and the data is fed back to the mounting detailed design step S8.

FIG. 3 and FIG. 4 are diagrams showing the results of measuring the frequency characteristics in the first actual measurement / examination step S16 and the second actual measurement / examination step S18 of FIG. 1 using an actual substrate. In these figures, FIG. 3 shows the measurement result of the frequency characteristic of the substrate before mounting the decap, and FIG. 4 shows the measurement result of the frequency characteristic of the substrate after mounting the decap.

By utilizing the fact that the peak value (A, B, C) of the frequency characteristic before mounting the decap shifts (A ', B', C ') by mounting the decap, the frequency characteristic of the substrate is utilized. The peak value is shifted so that it does not match the product clock frequency and its harmonics, thereby preventing EMI emissions.

FIGS. 5 (a) to 5 (c) generate a model based on the power supply / GND design data of the board performed in the first actual side examination step S16 and the second actual measurement / examination step S18 in FIG. FIG. 6 is a diagram showing a process, and FIG. 6 is a diagram showing a simulation result using the model generated in FIG.

In these figures, in the mounting design step S6, data obtained by extracting the substrate dielectric material, the conductor material, the thickness and dimensions of each layer, the through-hole coordinates, and the bypass capacitor arrangement interval from the design data obtained in the power supply / GND layer. [See FIGS. 5 (a) and 5 (b)], and cut at a pitch one digit smaller than the mounting arrangement (a, b) of the decaps determined based on the basic grid of the component arrangement of the board used in the mounting design step S6. Lattice (a ′, b ′) (a ′ <a / 10, b ′ <b / 1
At 0), a distributed circuit model including a resistance and an inductance is generated [see FIG. 5C].

A simulation is performed when the arrangement and the capacity of the decap are changed by performing the decap, and the peak values of the frequency characteristics of the substrate are determined when the decap is not mounted and when the decap is mounted. And compare with the result measured in.

FIG. 7 shows the first actual measurement / examination step S16 of FIG.
It is a figure showing an example of how to enclose a GND shield at the time of performing frequency characteristic S parameter measurement of a board in the 2nd actual measurement and examination process S18. In the figure, the first actual measurement
An example of a method of enclosing a GND shield for accurately measuring the frequency characteristic S-parameter of the substrate performed in the examination step S16 and the second actual measurement / examination step S18 is shown.

By attaching conductive GND shields 21 and 25 to both surfaces of the substrate 23 and electrically connecting the GND shields 21 and 25 to the connectors 26 and 27, the signal wavelength of the substrate usually occurs in a high-frequency region of twice or less the outer shape of the substrate. Preventing accurate antenna S-parameter measurement due to the use of an antenna and accompanying radio wave radiation. Note that a GND layer 22 and a power supply layer 24 are formed on the substrate 23, a connector 26 is a signal input connector, and a connector 27 is a signal output connector.

As described above, the power supply / GND design step S23 is performed so that the peak value of the frequency characteristic of the substrate does not coincide with the clock frequency of the product and its harmonics.
6, it is possible to prevent EMI radiation found during the conventional EMI evaluation before performing the EMI evaluation.

Also, by assuring EMI characteristics in the design process, a function confirmation step S11 and an EMI characteristic confirmation step S12 are performed.
In addition to re-designing and manufacturing at the time of performing the process, it is possible to reduce the manufacturing cost and the labor of the technician by the correction work, shorten the development period, and reduce the use period of the expensive EMI evaluation facility. In a short time, the design engineer can move on to the next equipment design.

Further, in the power supply / GND design step S23, by performing the surface analysis simulation step S20 in parallel with the substrate manufacturing step S15, the reliability of the actual measurement result is increased, and the peak value of the frequency characteristic of the substrate can be more accurately calculated. Can be expected in the upstream design stage. In this case, if the simulation accuracy is improved, the EMI characteristics can be guaranteed without manufacturing a substrate having only the power supply / GND layer, and the cost and the development period can be reduced.

Further, the electronic device is once connected to the above-mentioned EMI.
After developing using the design / evaluation / development method, when developing electronic equipment of the same system, develop power supply / GND design data as a design rule in advance into the detailed implementation design, so that development can be performed in a shorter time and at lower cost. Can be.

[0049]

As described above, according to the present invention, the function design, component selection, circuit design, mounting design, board fabrication, component mounting, function confirmation, and EMI characteristic confirmation are performed. In an EMI design / evaluation method for an electronic device to be shipped, an extraction step of extracting design data of a power / ground layer of a substrate, a model generation step of generating a model of the substrate based on the data extracted in the extraction step, A surface analysis simulation process that performs a surface analysis simulation based on a substrate model, and a substrate manufacturing process that is performed in parallel with the surface analysis simulation process and that manufactures a substrate having only a power / ground layer based on data extracted in an extraction process. Process and
A first actual measurement / examination step of collating a simulation result obtained in the surface analysis simulation step with a result of actually measuring frequency characteristics of the substrate alone including only the power / ground layer produced in the substrate production step; In the actual measurement / examination process, after the actual measurement / examination process, the mounting process of mounting the bypass capacitor on the substrate with only the power / ground layer, and the mounting position and capacitance value of the bypass capacitor that reduces the radiation from the substrate with only the power / ground layer A simulation step of simulating the simulation, a second measurement / examination step of collating a result obtained in the simulation step with a result of actually measuring the frequency characteristic of the board on which the bypass capacitor is mounted in the mounting step, and a second measurement・ Implement the power / ground layer pattern obtained in the study process and the capacitance and position information of the bypass capacitor By concurrently performing the steps of feeding back a total step in the implementation design process, can be performed backtracking free package design, it is possible to reduce the labor and material costs at the time of design and evaluation, EM
There is an effect that the time effective use of the I evaluation facility and the shortening of the design and evaluation period can be realized.

[Brief description of the drawings]

FIG. 1 is a flowchart illustrating a method for designing and evaluating EMI of an electronic device according to an embodiment of the present invention.

FIG. 2A is a diagram illustrating a frequency characteristic of a substrate in a state where no decap is mounted, and FIG. 2B is a diagram illustrating a frequency characteristic of the substrate after the decap is mounted.

FIG. 3 shows a first actual measurement / examination process and a second actual measurement /
It is a figure showing the result of having measured the frequency characteristic in an examination process using an actual board.

FIG. 4 shows a first actual measurement / examination step and a second actual measurement /
It is a figure showing the result of having measured the frequency characteristic in an examination process using an actual board.

5 (a) to 5 (c) show a process of generating a model based on power supply / GND design data of a board, which is performed in the first actual side examination step and the second actual measurement / examination step of FIG. FIG.

FIG. 6 is a diagram illustrating a simulation result using the model generated in FIG. 5;

FIG. 7 shows a first actual measurement / examination step and a second actual measurement /
It is a figure showing an example of how to enclose a ground shield at the time of measuring a frequency characteristic S parameter of a board in an examination process.

FIG. 8 shows a first actual measurement / examination process and a second actual measurement /
It is a flowchart which shows the detailed operation | movement of an examination process.

FIG. 9 is a flowchart showing a method of designing and evaluating EMI of an electronic device according to a conventional example.

FIG. 10 is a diagram showing a conventional EMI characteristic evaluation method.

FIG. 11 is a diagram showing a conventional EMI radiation suppression method.

[Explanation of symbols]

 S1 function design process S2 component selection process S3 circuit design process S4 circuit simulation process S5 circuit detailed design process S6 mounting design process S7 mounting simulation process S8 mounting detailed design process S9 board manufacturing process S10 component mounting process S11 function checking process S12 EMI characteristic checking Process S13 Shipping process S14 Power / GND layer design data extraction process S15 Power supply / GND layer only substrate manufacturing process S16 First actual measurement / examination process S17 Pass-computer mounting process S18 Second actual measurement / examination process S19 Model generation process S20 surface Analysis simulation process S21 Pass-con model generation process S22 Simulation process

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-9-62717 (JP, A) JP-A-9-321398 (JP, A) JP-A-10-247207 (JP, A) (58) Field (Int.Cl. ⁷ , DB name) G06F 17/50 H05K 3/00 H05K 13/08 G01R 29/08

Claims (10)

(57) [Claims] 1. Function design, component selection, circuit design,
Mounting design, board fabrication, component mounting, function confirmation, E
An EMI design / evaluation method for an electronic device to be shipped after confirming MI characteristics, comprising: an extraction step of extracting power / ground layer design data of the board; and an extraction step based on the data extracted in the extraction step. A model generation step of generating a model of the substrate; a surface analysis simulation step of performing a surface analysis simulation based on the model of the substrate; and a data performed in parallel with the surface analysis simulation step and extracted in the extraction step. A substrate manufacturing process of manufacturing a substrate having only a power / ground layer based on the simulation result obtained in the surface analysis simulation process and frequency characteristics of a single power / ground substrate manufactured in the substrate manufacturing process are measured. A first actual measurement / examination step for collating with the obtained result, and an actual measurement / examination in the first actual measurement / examination step. After the step, a mounting step of mounting a bypass capacitor for reducing radiation from the substrate on the substrate including only the power / ground layer, a simulation step of simulating a mounting position and a capacitance value of the bypass capacitor, and a simulation step. A second actual measurement / examination step of comparing the obtained result with a result obtained by actually measuring the frequency characteristic of the substrate on which the bypass capacitor is installed in the mounting step, and the second actual measurement / examination step. A step of feeding back the power supply / ground layer pattern and the capacitance and position information of the bypass capacitor to the mounting design step, wherein each step is performed in parallel with the mounting design step. EMI design and evaluation method. 2. A peak frequency is found from a frequency characteristic of a power / ground layer of the substrate and a simulation result, and whether or not the frequency matches an actual product clock frequency and its harmonics is compared. If the values match, the bypass capacitor is mounted on the board, and then the frequency characteristics are measured and simulated again to compare the peak frequency with the clock frequency of the product and its harmonics. 2. The mounting position and capacitance value of the bypass capacitor so that peak values do not overlap, and data of the mounting position and capacitance value of the bypass capacitor are fed back to the mounting design process. EMI design and evaluation method described. 3. The surface analysis simulation step and the simulation step include, based on design data obtained in the mounting design step, a dielectric material and a conductor material of the substrate, thicknesses and dimensions of each layer, through-hole coordinates, and the bypass. The arrangement interval of the capacitors is extracted and used, and the model generation step is determined based on a component arrangement basic grid of the board used in the mounting design step, and at a pitch one digit smaller than the mounting arrangement of the bypass capacitors. 3. The EMI design / evaluation method according to claim 1, wherein a simulation model is generated using the cut grid. 4. The method according to claim 1, wherein the first actual measurement and examination step is performed after a ground shield is applied to the surface of the substrate when the frequency characteristics of the substrate alone are actually measured. Item 6. An EMI design / evaluation method according to any one of Items 3. 5. The extraction step, the model generation step, the surface analysis simulation step, the substrate manufacturing step, the first actual measurement / examination step, the mounting step, the simulation step, and the second actual measurement / examination step. After performing the step of feeding back the capacitance and position information of the bypass capacitor and the development of the electronic device,
The shape and layer configuration of the substrate obtained in each step and the capacitance value and arrangement of the bypass capacitor are previously entered in the mounting design process as design rules, and the electronic device of the same system is used by using the design rules. 5. The EMI design / evaluation method according to claim 1, wherein the development is performed repeatedly. 6. A circuit detail for performing a function design process, a component selection process, and a circuit design process in order, and performing circuit design verification by a circuit simulation process at the time of performing the circuit design, and reflecting the result in the circuit design. The design process,
In the mounting design process performed next to the circuit detailed design process, a mounting simulation process is performed by a mounting simulation process, and a mounting detailed design process for reflecting the result in the mounting design, and using the wiring pattern information obtained in the mounting design process, A board manufacturing process for manufacturing the components, a component mounting process for mounting components on the board, a function checking process for checking functions after the component mounting, and an EMI characteristic checking after checking the functions.
Design of electronic equipment to be shipped after MI characteristic confirmation process
An evaluation method, comprising: an extraction step of extracting design data of a power / ground layer of the substrate; a model generation step of generating a model of the substrate based on the data extracted in the extraction step; A surface analysis simulation step of performing a surface analysis simulation, a substrate manufacturing step performed simultaneously with the surface analysis simulation step and manufacturing a substrate having only the power supply / ground layer, and a result obtained in the surface analysis simulation step. A first actual measurement / examination step for collating with a result of actual measurement of frequency characteristics of the substrate alone of only the power / ground layer produced in the substrate production step, and an actual measurement / examination in the first actual measurement / examination step. A mounting step of mounting a bypass capacitor for reducing radiation from the board on the board having only the power / ground layer after the examination step; A simulation step of simulating a mounting position and a capacitance value of the bypass capacitor; and a step of comparing a result obtained in the simulation step with a result obtained by actually measuring a frequency characteristic of a substrate on which the bypass capacitor is mounted in the mounting step. Measurement 2
And a power / ground design step of feeding back the power / ground layer pattern and the bypass capacitor capacitance and position information obtained in the second actual measurement / review step to the mounting detailed design step. The extraction step, the model generation step, the surface analysis simulation step, the substrate manufacturing step, the first measurement / examination step, the mounting step, the simulation step, the second measurement / examination step, and the power supply A EMI design / evaluation method, wherein a / ground design step is performed in parallel with the mounting detailed design step. 7. In the power / ground design step,
The peak frequency is found from the frequency characteristics of the power / ground layers of the board and the simulation result, and whether or not the frequency matches the actual product clock frequency and its harmonics is compared. Mount the bypass capacitor on the board, perform frequency characteristic measurement and simulation again, compare the peak frequency with the clock frequency of the product and its harmonics, and make sure that the peak values do not overlap if they match in the comparison. 7. The EMI design / evaluation according to claim 6, wherein the mounting position and the capacitance value of the bypass capacitor are found, and data of the mounting position and the capacitance value of the bypass capacitor are fed back to the mounting detailed design process. Method. 8. The surface analysis simulation step and the simulation step include, based on design data obtained in the mounting design step, a dielectric material and a conductor material of the substrate, thicknesses and dimensions of respective layers, through-hole coordinates, and the bypass capacitor. The model generation step is determined based on a component placement basic grid of the board used in the mounting design step and is a grid cut at a pitch one digit smaller than the mounting layout of the bypass capacitors. 8. The EMI design / evaluation method according to claim 6, wherein a simulation model is generated. 9. The method according to claim 6, wherein in the first actual measurement / examination step, a ground shield is applied to the surface of the substrate when the frequency characteristics of the substrate alone are actually measured. Item 10. An EMI design / evaluation method according to any one of Items 8. 10. The extraction step, the model generation step, the surface analysis simulation step, the substrate manufacturing step, the first actual measurement / examination step, the mounting step, the simulation step, and the second actual measurement / examination step. After the development of the electronic device by executing the power supply / ground design step, the shape and layer configuration of the substrate obtained in the power supply / ground design step and the capacitance value and arrangement of the bypass capacitor are designed in advance. The EMI according to any one of claims 6 to 9, wherein the EMI is included in the mounting detailed design process as a rule, and the same type of electronic device is repeatedly developed by using the design rule. Design and evaluation method.