JP3050253B2 - Method of manufacturing multilayer electronic component mounting substrate - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a substrate for mounting a multilayer electronic component without damaging an inner conductor circuit in an electronic component mounting portion.

[0002]

2. Description of the Related Art Conventionally, as a method for manufacturing a multilayer electronic component mounting substrate having an electronic component mounting portion on a substrate, there is a method shown in FIGS. 8 to 10 (Japanese Patent Laid-Open No. 61-75596). That is, as shown in FIG. 10, this method comprises the following steps: a second substrate 9 provided with an inner layer conductor circuit 911 electrically connected to an electronic component, and a first substrate 7 bonded thereon via an adhesive layer 5. And a concave part 950 for mounting an electronic component provided above the second substrate 9.

In this method, first, as shown in FIG. 8A, a second substrate having an electronic component mounting portion 951 having a nickel / gold plating layer formed on an upper portion 91 of the substrate and an inner conductor circuit 911 is provided. 9 and the electronic component mounting section 951
A first substrate 7 having an opening 75 which is larger than the opening 75 and an outer conductor circuit 711 having the same plating layer formed on the surface thereof; and an opening 5 having the same planar shape as the opening 75.
5 is prepared. Next, as shown in FIG. 8B, the first substrate 7 is laminated on the second substrate 9 via the adhesive layer 5, and these are joined by thermocompression bonding to produce a multilayer board.

Then, as shown in FIG. 9A, a through-hole 97 is formed in the multilayer board, and a metal (copper) plating 11 is applied to the entire surface of the multilayer board and the through-hole 97 as through-hole plating. . Next, as shown in FIG. 9B, an outer conductor circuit 991 is formed on the lower part 99 of the second substrate 9 and an outer conductor circuit 711 is formed on the upper part 71 of the first substrate 7 by etching. Then, as shown in FIG. 10, a concave portion 950 surrounded by the opening 75 of the first substrate 7 is formed on the electronic component mounting portion 951. In addition, the through hole 97
, Insert the lead pin.

[0005]

However, as shown in FIG. 9 (b), the outer conductor circuits 991, 7 are etched by etching.
In the step of forming the electronic component mounting portion 11,
May contaminate the exposed inner conductor circuit 911. That is, when forming the outer conductor circuits 991 and 711, as described above, first, the through-hole 97 and the entire surface of the substrate are once plated with copper 11, and then the electronic component mounting portion 951 and the inner conductor circuit 911 are initially formed. The upper copper plating 11 (FIG. 9a) has been removed by etching.

[0006] Therefore, the surface of the inner conductor circuit 911 of the second substrate 9 may be contaminated by the above-mentioned etching, and the electrical connection may be deteriorated. SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and provides a method of manufacturing a multilayer electronic component mounting substrate that does not damage an inner conductor circuit of an electronic component mounting portion.

[0007]

According to the present invention, a substrate for mounting a multilayer electronic component is manufactured by the following steps. That is,
A step of bonding a second substrate on which the inner-layer conductor circuit is formed and at least one first substrate having an opening above the electronic component mounting portion via an adhesive layer to form a multilayer board; Step B of providing a through hole at a predetermined position, Step C of attaching a photosensitive dry film to the entire surface of the multilayer board, and exposing the dry film and developing and removing the dry film in the portion facing the through hole. , And the other step is performed with a step D in which a dry film is left.

[0008] Thereafter, an E step of applying a plating catalyst to the through holes and the surface of the dry film, an F step of removing the dry film together with the plating catalyst formed on the surface, and a photosensitive layer is again applied to the entire surface of the multilayer board. G step of sticking the dry film, and exposing the dry film, and developing and removing the dry film in the portion facing the through hole,
The other part is subjected to an H step for keeping the dry film.

Further, thereafter, an I step of applying metal plating in the through holes, a J step of removing the dry film, a K step of forming an outer layer circuit forming film on the surface of the multilayer board, and the outer layer conductor circuit by etching. Is performed, and an M process for removing the outer layer circuit formation film is performed.

The most remarkable point in the present invention is that a photosensitive dry film is adhered to the entire surface of the multilayer board.
Step D, exposing the dry film and developing and removing the dry film in the portion facing the through hole, leaving the dry film in the other portion, and applying a plating catalyst to the through hole and the surface of the dry film. There are an E process, an F process for removing the dry film together with the plating catalyst formed on the surface, a G and H process for repeating the C and D processes again, and an I process for performing metal plating in the through holes. . The second substrate has an electronic component mounting portion on an upper portion thereof and an inner conductor circuit provided on a peripheral portion thereof. The first substrate has an opening that is larger than the electronic component mounting portion.

[0011] The multilayer board comprises the second substrate and the first substrate laminated thereon. Further, an intermediate substrate may be provided between the second substrate and the first substrate. The intermediate substrate has an opening larger than the electronic component mounting portion and smaller than the outer diameter of the opening of the second substrate, and an inner conductor circuit around the opening. The opening of the intermediate substrate has a larger outer diameter as the upper substrate.

That is, according to the present invention, the first substrate is provided above the second substrate having an electronic component mounting portion.
One or more intermediate substrates may be provided between the two substrates. Further, a copper foil layer is previously provided on the upper portion of the first substrate and the upper and lower portions of the second substrate.

In the photosensitive dry film, the electronic component mounting portion and its opening, the first substrate and the first substrate are provided in any of the steps (E and I) of applying the plating catalyst and metal plating to the through hole and the dry film. And a copper foil layer provided on top of the above. The dry film has chemical copper plating solution resistance and strong alkali resistance. The adhesive layer is interposed between the substrates using a sheet-shaped prepreg or the like.
The prepreg is preferably made of the same material as the substrate.

As the first, second and intermediate substrates, copper-clad laminates of epoxy, triazine, polyimide resin and the like are used. Improves moisture proofing inside the electronic component mounting area,
It is preferable to form a metal plating film in order to improve heat dissipation. The inner and outer conductor circuit surfaces are usually plated with nickel and gold. The through hole is a hole for attaching an external lead terminal such as a lead pin. The outer conductor circuit is formed after metal plating is applied to the through hole. As a method of forming the outer layer conductor circuit, for example, there are a solder peeling method and an electrodeposition film method.

[0015]

In the method of manufacturing a substrate for mounting a multilayer electronic component according to the present invention, a dry film is attached to the entire surface of the multilayer board (C and G steps), and only the portion facing the through hole is removed by development ( D and H processes), and then a plating catalyst in the through-hole and metal plating are applied (E and I processes). This E, I
In the process, the dry film adhered on the upper part of the multilayer board covers the electronic component mounting portion and the opening thereof and the copper foil layer of the first substrate. Therefore, the plating catalyst and metal plating are not applied to the inner conductor circuit in the electronic component mounting portion.

Therefore, a step of removing the plating catalyst and the metal plating on the electronic component mounting portion becomes unnecessary. The inner conductor circuit in the electronic component mounting portion is not damaged.
As described above, according to the present invention, it is possible to provide a method for manufacturing a multilayer electronic component mounting board that does not damage the inner conductor circuit in the electronic component mounting portion.

[0017]

Embodiment 1 A method for manufacturing a multilayer electronic component mounting board according to an embodiment of the present invention will be described with reference to FIGS. In addition,
In this example, a solder peeling method is used as a method for forming an outer conductor circuit. As shown in FIG. 6 (m), the substrate for mounting a multilayer electronic component of the present example has a second substrate 9 and a first substrate 7.

The upper portion 91 of the second substrate 9 is provided with a concave portion 95 as an electronic component mounting portion, and an inner conductor circuit 911 for electrically connecting to the electronic component. Recess 95
Is covered with metal plating 951. In the lower part 99 of the second substrate 9, a heat radiation layer and an outer layer conductor circuit 991 are provided.

The first substrate 7 has an opening 75 which is larger than the outer diameter of the concave portion 95. In the upper portion 71, an outer layer conductor circuit 7 including a land of a through hole 97 and a connection circuit is provided.
11 are formed. The first substrate 7 is laminated on the second substrate 9 via the adhesive layer 5 made of prepreg, and these form a multilayer board. A through hole 97 is formed at a predetermined position of the multilayer board. The through holes 97 are covered with the metal plating 3.

Next, the steps A to M according to the method of manufacturing the multilayer electronic component mounting board will be described. First, in the step A, as shown in FIG. 1 (a1), a second substrate 9, a first substrate 7, and an adhesive layer 5 are prepared. The second substrate 9 has a concave portion 95 covered with a metal plating 951 on the upper portion 91 and an inner conductor circuit 911 around the opening.
And The lower part 99 has a copper foil layer 990. The upper portion 71 of the first substrate 7 is covered with a copper foil layer 710 and has an opening 75 larger than the outer diameter of the concave portion 95. The adhesive layer 5 made of a prepreg is adhered to the lower part 79 of the first substrate 7.

Next, as shown in FIG. 1 (a2), the first substrate 7 is laminated on the second substrate 9 with the adhesive layer 5 interposed therebetween, and these are joined by thermocompression bonding to form a multilayer board. obtain. B
In the process, as shown in FIG. 1B, a through hole 97 is formed at a predetermined position on the multilayer board. In the step C, as shown in FIG. 2C, the entire surface of the upper portion 71 and the lower portion 99 of the multilayer board is covered with the photosensitive dry film 1 and is thermocompression-bonded.

In the step D, as shown in FIG. 2D, exposure for providing the holes 17 in the portion of the dry film 1 corresponding to the through holes 97 is performed. Next, the dry film 1 in the portion facing the through hole 97 is removed by development, and the dry film 1 is left in the other portions. In step E, the plating catalyst 2 is applied to the entire surface of the multilayer board including the through holes 97 and the surface of the dry film 1 as shown in FIG.

In step F, as shown in FIG. 3 (f), the dry film 1 is peeled off from the multilayer board together with the plating catalyst 2 formed on its surface. In process G,
As shown in FIG. 3 (g), the dry film 1 is again adhered to the entire surface of the multilayer board. In the H step, FIG.
As shown in (h), exposure for providing holes 17 in a portion of the dry film 1 corresponding to the through holes 97 is performed. Next, the dry film 1 in the portion facing the through hole 97 is removed by development, and the dry film 1 is left in the other portions.

In the G and H steps, the same operation as in the C and D steps is repeated. In the I step, as shown in FIG. 4 (i), the metal plating 3 is applied to the through hole 97. In the J step, as shown in FIG. 4J, the dry film 1 is removed from the multilayer board.

In the K step, as shown in FIG. 5 (k1), the dry film 1 is again adhered to the entire surface of the multilayer board. Then, as shown in FIG. 5 (k2), exposure for forming an outer layer conductor circuit is performed. Thereafter, the dry film 1 where the outer conductor circuit is formed is removed by development, and the dry film 1 where the outer conductor circuit is not formed is removed.
Is left, the outer conductor circuit forming film 44 is formed. Next, as shown in FIG. 5 (k3), solder plating 4 is applied to a portion of the surface of the multilayer board where an outer conductor circuit is to be formed. Thereafter, as shown in FIG. 6 (k4), the dry film 1 is removed from the multilayer board.

In the L step, as shown in FIG. 6 (l), the portion of the copper foil layer where the outer conductor circuit is not formed is removed by etching. In the M step, as shown in FIG. 6 (m), the solder plating 4 is removed from the multilayer board, and outer-layer conductor circuits 711, 991 are formed on the surface of the multilayer board.

As is known from the above, in the method of manufacturing a multilayer electronic component mounting board of this embodiment, the dry film 1 is attached to the entire surface of the multilayer board (C and G steps) and faces the through hole 97. Develop and remove only part (D, H steps)
Thereafter, a plating catalyst and metal plating are applied to the through holes 97 (E and I steps). Therefore, in the above steps E and I, the dry film 1 stuck on the upper portion 71 of the multilayer board covers the recess 95 and the opening 55 thereof.
Therefore, the plating catalyst 2 and the metal plating 3 are not applied to the inner conductor circuit 911 in the recess 95.

Further, the step of removing the plating catalyst 2 and the metal plating 3 in the concave portion 95 becomes unnecessary, and the inner conductor circuit 911 in the concave portion 95 is not damaged. In this example, the solder plating 4 is formed on the portion to be the outer conductor circuit as the outer conductor circuit forming film 44 formed in the K step. Then, after forming the external conductor circuit, it is peeled off. This method is a method called a solder peeling method.

Embodiment 2 In this embodiment, as shown in FIG. 7, an electrodeposition film method is used in place of the solder peeling method of Embodiment 1 as a method of forming an outer conductor circuit. In the above electrodeposition film method, after the J step (dry film removal) shown in FIG. 4 (j) of Example 1, as shown in FIG. 7 (n1), the multilayer plate is immersed in the electrodeposition liquid, The electrodeposition film 40 is applied to the entire surface of the multilayer board. Thereafter, as shown in FIG. 7 (n2), the electrodeposition film 40 at the portion where the outer conductor circuit is not formed is removed by etching, while the electrodeposition film 40 at the portion where the outer conductor circuit is formed is left as shown in FIG. A conductive circuit forming film 41 is formed.

After that, the outer layer conductor circuits 711 and 991 are formed in the same manner as in the M step of the first embodiment, and the multilayer electronic component mounting board shown in FIG. 6 (m) is obtained. Others are the same as the first embodiment. In this embodiment, the same effect as in the first embodiment can be obtained.

[Brief description of the drawings]

FIG. 1 is a view illustrating a manufacturing process of a multilayer electronic component mounting board according to a first embodiment.

FIG. 2 is an explanatory view of a manufacturing process following FIG. 1;

FIG. 3 is an explanatory view of a manufacturing process following FIG. 2;

FIG. 4 is an explanatory view of the manufacturing process following FIG. 3;

FIG. 5 is an explanatory view of the manufacturing process following FIG. 4;

FIG. 6 is an explanatory view of the manufacturing process following FIG. 5;

FIG. 7 is an explanatory diagram of a manufacturing process of the multilayer electronic component mounting board according to the second embodiment.

FIG. 8 is an explanatory view of a manufacturing process of a conventional multilayer electronic component mounting substrate.

FIG. 9 is an explanatory view of the manufacturing process following FIG. 8;

FIG. 10 is an explanatory view of the manufacturing process following FIG. 9;

[Explanation of symbols]

 1. . . 1. dry film, . . Plating catalyst, 3. . . Metal plating, 4. . . Solder plating, 40. . . Electrodeposition film, 41, 44. . . Outer layer conductor circuit forming film, 5,. . . Adhesive layers, 55, 75,. . . Openings, 7,. . . First substrate, 711, 991. . . Outer layer conductor circuit, 71, 91. . . Upper part, 9. . . Second substrate, 911. . . Inner layer conductor circuit 95,950. . . Recess, 79, 99. . . beneath,

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-2-189995 (JP, A) JP-A-4-22190 (JP, A) JP-A-62-242341 (JP, A) JP-A-63-1988 137499 (JP, A) JP-A-61-75596 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H05K 3/46

Claims (1)

(57) [Claims] A second substrate on which an inner conductor circuit is formed;
An A step of bonding at least one first substrate having an opening on the electronic component mounting portion via an adhesive layer to form a multilayer board; and a B step of providing a through hole at a predetermined position of the multilayer board. Step C of adhering a photosensitive dry film to the entire surface of the multilayer board, and exposing the dry film and developing and removing the dry film in the portion facing the through hole, leaving the dry film in the other portions. A step of applying a plating catalyst to the through holes and the surface of the dry film; and an F step of removing the dry film together with the plating catalyst formed on the surface. Step G of attaching a dry film, exposing the dry film and developing and removing the dry film in a portion facing the through hole, and leaving the dry film in the other portions. Process, I process of plating metal in the through hole, J process of removing the dry film, K process of forming an outer layer circuit forming film on the surface of the multilayer board, and L step of forming an outer layer conductor circuit by etching. A method for manufacturing a substrate for mounting a multilayer electronic component, comprising: a step; and an M step of removing the outer layer circuit formation film.