JP3039447B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of filling a through hole required for a multilayer wiring.

[0002]

2. Description of the Related Art In recent semiconductor devices, high integration of semiconductor devices and multi-layer wiring have progressed, and accordingly, it is necessary to reduce the width of internal wiring, and through holes having a high aspect ratio are formed. It is extremely difficult to completely embed the through-hole by sputtering an Al film or an Al alloy film into such a high-aspect-ratio through-hole. Therefore, the wiring material is not sufficiently embedded in the through-hole, and a cavity is formed. There were not a few accidents such as being able to do so.

In order to embed a metal in a through-hole, there is a technique of heating and reflowing. However, in a through-hole formed perpendicular to a normal substrate, only a through-hole having an aspect ratio of about 2 is buried by Al reflow. I couldn't do that.

As a conventional technique for solving such a problem, Japanese Patent Application Laid-Open No. 58-64033 discloses a method of forming a taper above a through hole by using isotropic etching and anisotropic etching. . This will be described below with reference to FIG.

First, as shown in FIG. 3A, after forming a diffusion layer 11 on a silicon substrate 1, an insulating film 12 made of PSG or BPSG is formed, and then B ⁺ ions are implanted to form a damage layer 12A on an upper layer. To form Next, using the photoresist film 5A having an opening as a mask, the damaged layer 1 is formed.
2A is isotropically etched.

Next, as shown in FIG. 3B, the remaining insulating film 12 is anisotropically etched and completely removed, followed by heating to smooth the tapered portion. Next, an Al film 8 is formed to fill the through holes.

[0007]

The prior art described above is
It is intended to increase the side coverage, rather than forming a vertical through hole in a normal substrate. However, in this method, a high aspect ratio through hole
It is difficult to completely bury the film with the 1 film. In addition, the through hole is widened by the taper, and it is extremely difficult to apply the present narrow wiring rule.

An object of the present invention is to fill a through hole having a high aspect ratio with an Al film or an Al alloy film,
An object of the present invention is to provide a method of manufacturing a semiconductor device which can be applied to a narrow wiring rule.

[0009]

According to a method of manufacturing a semiconductor device of the present invention, a step of sequentially forming a first silicon oxide film, a silicon nitride film, and a second silicon oxide film as an interlayer insulating film on a conductive layer. Forming a photoresist film having an opening on the interlayer insulating film; and, after isotropically etching the second silicon oxide film using the photoresist film as a mask, the silicon nitride film and the first Anisotropically etching the silicon oxide film to form a through hole having a taper on the upper portion, forming a conductive film for wiring over the entire surface and filling the through hole by a reflow method, and filling the through hole. Chemical mechanical polishing method
Between the conductive film for wiring on the surface and the second silicon oxide film
Polishing and planarizing the interlayer insulating film .

[0010] The reflow method of the Al film is caused by the surface melting of the Al thin film, and largely depends on the initial shape of the Al thin film. The shape of the Al film suitable for reflow is such that the Al thin film on the inner wall in the through hole is thick and the A film near the hole opening is thick.
The shape is such that the overhang due to the 1 film is small. In order to form an Al film having this shape, a tapered through hole is formed on the upper portion, and the Al film is subjected to a reflow process through a sputtering process. Through these series of steps, through holes having an aspect ratio of 2 or more can be embedded.

Further , a taper is formed by using a chemical mechanical polishing method.
By removing the part and eliminating the taper, it can be applied to narrow wiring pitches. After going through these steps,
An Al film is formed by a sputtering process to form a wiring pattern. By using these series of steps, a wiring pattern having a through hole with an aspect ratio of 2 or more and a wiring pitch of about 0.5 μm can be formed.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. FIGS. 1A to 1D are cross-sectional views of a semiconductor chip for explaining a first embodiment of the present invention.

First, as shown in FIG. 1A, a lower layer Al wiring 1 is formed on a substrate, and a 1 μm thick
The first silicon oxide film 2 is formed by a CVD method or the like, and then a silicon nitride film 3 of 80 nm is formed as a stopper for the subsequent chemical mechanical polishing. Next, a second silicon oxide film 4 is formed on the silicon nitride film 3 to a thickness of 0.5 μm by a CVD method or the like. Next, a photoresist film 5 is applied to the entire surface, and an opening 6 is formed using lithography technology.

Next, using the photoresist film 5 as a mask, the second silicon oxide film 4 is isotropically etched using a 10% hydrofluoric acid aqueous solution.

Next, as shown in FIG. 1B, the silicon nitride film 3 and the first silicon oxide film 2 are subjected to anisotropic plasma etching to form vertical through holes 7. In addition, by this anisotropic etching, the through hole 7 is designed so that the aspect ratio of the portion from the silicon nitride film 3 to the Al film becomes the finally required aspect ratio (for example, 2).

Next, the photoresist film 5 is removed and 8
After the second silicon oxide film 4 is reflowed at a temperature of about 00 ° C. to smooth the tapered portion, an Al film 8 is formed on the entire surface by Al sputtering, and annealed at 450 ° C. in the chamber where the sputtering was performed. And Al
The through hole is buried by reflowing the film 8.

Next, as shown in FIG. 1C, the Al film 8 and the second silicon oxide film 4 are scraped down to the silicon nitride film 3 by chemical mechanical polishing and flattened. Finally,
As shown in FIG. 1D, an Al film is formed on the entire surface by sputtering (Al film 8A) and patterned to form an upper wiring.

FIG. 2 is a sectional view of a semiconductor chip for explaining a second embodiment of the present invention.

The operations up to the Al film 8 are formed in the same manner as in the first embodiment shown in FIGS. 1 (a) and 1 (b). Next, FIG.
As shown in FIG. 6, a 10 nm-thick Si film 9 is formed on the Al film 8 by using a sputtering method or the like to prevent reflection of laser light. Next, the Al film 8 is reflowed by applying a laser beam 10 from above. In this embodiment, the Al film 8 is used.
Since the overhang is smaller than that of the conventional example, the laser beam enters the inside of the through hole, and the melting of the surface of the Al film in this portion is promoted. Therefore, the substrate temperature is 400 ° C.
Reflow can also be realized in the following. After reflow,
An upper layer wiring is formed by the same steps as in the first embodiment shown in FIGS. 1 (c) and 1 (d).

In the Al reflow, the embedding property changes depending on the initial shape of the Al film. In the above-described embodiment, the side coverage of the Al film in the through hole is improved by tapering the upper portion of the interlayer insulating film. In addition, since the overhang is reduced, through holes having an aspect ratio of 2 or more can be completely buried. Also,
Since the tapered part is removed by chemical mechanical polishing,
It can be applied to wiring with a narrow wiring pitch. In addition, since the overhang is small, reflow using a laser is effective.

In the above embodiment, the case where the interlayer insulating film is formed on the lower Al wiring has been described. However, the case where the interlayer insulating film is formed on the silicon substrate on which the diffusion layer and the like are formed is described. You may. Of course, an Al alloy film containing a small amount of Si, Cu or the like may be used instead of the Al film.

[0022]

As described above, according to the present invention, a first silicon oxide film, a silicon nitride film and a second silicon oxide film are sequentially formed as an interlayer insulating film on a conductive layer, and Forming a photoresist film having an opening,
Using this photoresist film as a mask, the second silicon oxide film is isotropically etched, and then the silicon nitride film and the first silicon oxide film are anisotropically etched to form a tapered through-hole on the upper portion. A method for manufacturing a semiconductor device which can fill a through hole with a high aspect ratio with an Al film or an Al alloy film and can be applied to a narrow wiring rule by forming a conductive film for wiring on the substrate and filling the through hole by a reflow method. The effect is obtained.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a semiconductor chip for explaining a first embodiment of the present invention.

FIG. 2 is a sectional view of a semiconductor chip for explaining a second embodiment of the present invention.

FIG. 3 is a sectional view of a semiconductor chip for explaining a conventional example.

[Explanation of symbols]

 Reference Signs List 1 Al wiring 2 First silicon oxide film 3 Silicon nitride film 4 Second silicon oxide film 5 Photoresist film 6 Opening 7 Through hole 8, 8A Al film 9 Si film 10 Laser beam 11 Diffusion layer 12 Insulating film 12A Damage layer

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 21/28-21/288 H01L 21/3205-21/3213 H01L 21/768

Claims (2)

(57) [Claims] A step of sequentially forming a first silicon oxide film, a silicon nitride film and a second silicon oxide film as an interlayer insulating film on the conductive layer; and a photoresist having an opening on the interlayer insulating film. Forming a film, isotropically etching the second silicon oxide film using the photoresist film as a mask, anisotropically etching the silicon nitride film and the first silicon oxide film, and tapering the upper portion. Forming a through hole having a hole, forming a conductive film for wiring on the entire surface and filling the through hole by a reflow method, and filling the through hole with a chemical mechanical polishing method.
Surface conductive film for wiring and second silicon oxide film by polishing method
Polishing the semiconductor device and planarizing the interlayer insulating film . 2. A method according to claim 1, further comprising a step of forming a wiring connected by patterning to form the second wiring conductive film planarized interlayer insulating film on the wiring conductive film in the through hole The manufacturing method of the semiconductor device described in the above.