JP3038613B2 - Power analyzer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power analyzer, and more particularly, to a power analyzer capable of measuring harmonic power of each order.

[0002]

2. Description of the Related Art In recent years, as semiconductor power converters (eg, inverters) have been used in many devices, more and more measured data can be processed easily and quickly in order to measure the power system. A measure has been proposed.
As such a wattmeter, for example, there is one having a configuration shown in FIG.

In FIG. 1, a voltage / current input analog circuit 1 includes signals to be measured (voltages to be measured (V1, V2, V3) and currents (A1, A2, A3)) for three channels (channels).
And the measured voltage and current of those 3ch are detected.
The power is calculated by performing an analog operation on the voltage and the current, and an analog signal of the voltage, the current and the power is output.

An analog signal from a voltage / current analog circuit 1 is switched by a multiplexer 2, and the switched analog signal is converted into a digital signal by an A / D converter 3 and written into a RAM / ROM (memory) 4. The written program, that is, the CPU 5 performs a process of capturing the data.

A memory 4, an I / O port 7, a display unit 8, a keyboard 9, and the like are connected to a bus line 6 of the CPU 5. The CPU 5 switches the multiplexer 2 via the I / O port 7. The digital data is written into the memory 4, and the power, apparent power, reactive power, power factor, etc. are calculated based on the digital data,
A display process is performed on the calculation results and the like, and a measured value is multiplied by a time coefficient based on the acquired data and the calculated data, integrated to calculate an integrated amount, and the integrated amount is displayed.

The display unit 8 displays the voltage, current, power, apparent power, reactive power, power factor, etc. of the signal under measurement in accordance with the display processing of the CPU 5.

In the power meter having the above-described configuration, the voltage / current input analog circuit 1 employs the operation principle of the AC zero flux method, and employs the PT and the clamp CT. Therefore, a wide frequency range of 10 Hz to 20 kHz is adopted. Good characteristics are secured in the range, and accurate measurement of voltage, current, power, and the like is enabled.

[0008]

When a motor is driven with a pulse-like voltage waveform as in the above-described semiconductor power device, for example, an inverter device, the current contains a harmonic component. Causes noise and disturbance. Such a problem of equipment failure due to harmonics is regarded as a problem, and in particular, in the case of home electric appliances and the like, since noise and disturbance due to the harmonic components become a problem, not only the measurement of the power system of the semiconductor power device but also the harmonics. Measurement of wave components is required.

However, in the above-mentioned power meter, the voltage and the voltage are measured based on the measured signal including the fundamental wave and the harmonic.
Although current and power can be measured, their harmonic components cannot be directly measured.

Therefore, when measuring the power system of a semiconductor power device, it is only necessary to prepare two measuring devices, a power meter and an expensive harmonic analyzer (eg, an FFT analyzer) for measuring its harmonic components. In addition, the operation of the FFT analyzer is complicated, and the measurement of the harmonic components is troublesome. Therefore, there is a demand for an apparatus that can measure not only the power but also the harmonic components.

[0011]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional circumstances, and a feature of the configuration according to claim 1 is that a voltage to be measured and a current to be measured are converted into digital signals by a sampling signal of a predetermined frequency. And a plurality of A / D converters for obtaining digital data for one cycle, and a PLL for synchronizing each sampling signal of the A / D converter.
A conversion synchronization control unit including a circuit; a fast Fourier transform of each digital data converted by the A / D conversion unit to obtain a complex current and a complex voltage up to a predetermined n-th order; A power calculator for calculating a power component of the order from the complex current and the complex voltage of the complex current, and a first component of each of the complex current, the complex voltage and the power component.
An integrating unit that integrates from the next to the n-th order;
For each of the complex voltage and the power component, a content calculating unit that calculates the content of the complex wave and the fundamental wave, and set a comparison value for measured values of the complex current, the complex voltage, the power component, the content, and the like. A comparison value setting unit for comparing the comparison value from the comparison value setting unit with the measured value and outputting the measured value under predetermined conditions.

According to a second aspect of the present invention, there are provided a plurality of A / D converters for converting a voltage to be measured and a current to be measured into a digital signal with a sampling signal having a predetermined frequency and obtaining digital data for one cycle. A conversion synchronization control unit including a PLL circuit for synchronizing each sampling signal of the A / D conversion unit; and a complex current up to a predetermined n-th order by fast Fourier-transforming each digital data converted by the A / D conversion unit. And an FFT operation unit for obtaining a complex voltage; a distortion factor calculation unit for calculating a total harmonic distortion factor from the complex current or the complex voltage; and an upper limit order for arbitrarily setting the upper limit order for the distortion factor calculation unit. And a setting unit.

[0013]

According to the first aspect, the complex current, the complex voltage, the power component, the content, and the like can be compared with a predetermined comparison value in each order unit.

According to the second aspect, when obtaining the total harmonic distortion factor, the upper limit value can be set arbitrarily, so that the influence of aliasing can be eliminated.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First, an overall configuration of a power analyzer according to an embodiment of the present invention will be described with reference to FIGS.

The power analyzer according to the present embodiment has three channels (measured voltages V1 to V3 and measured currents A1 to A3) for converting a plurality of input measured signals (measured voltage and measured current) into inputtable levels. A3) The input units 10 to 12 and the cut-off frequency which allows the fundamental wave and the harmonic contained in the analog signal of the signal to be measured via these input units 10 to 12 to be variable, and is used to prevent aliasing distortion. Filter units 13 to 18, A / D converters 19 to 24 for digitally converting analog signals passing through the filter units 13 to 18 with a sampling signal of a predetermined frequency, and A / D converters 19 to 24
A memory 25 for storing the digital data converted by 24
, A first switching unit 31 for selecting one of the analog signals via the input units 10 to 12, and a waveform shaping of the analog signal switched by the first switching unit 31 to obtain a rectangular shape. A filter waveform shaping unit 32 that converts the signal into a wave signal;
A signal for variably controlling the cutoff frequency of the filter units 13 to 18, a sampling signal of a predetermined frequency of the A / D conversion units 19 to 24, and a write signal of the memories 25 to 30 are output. And synchronize the frequency to 5 times the frequency of the input signal under measurement.
The rectangular wave signal from the storage control unit 33 and the filter waveform shaping unit 32, which is 12 times, is used as a source, and the square wave signal and the sampling frequency of the A / D converters 19 to 24 are set to integer (for example, 512). The phase difference from the signal set to 1 is detected, the voltage of the internal VCO is varied according to the phase difference, a signal of a predetermined frequency is output to the storage control unit 33, and the sampling of the A / D conversion units 19 to 24 is performed. The signal is synchronized with the analog signal switched by the switching unit 31,
And a PLL (Phase Locked Loop) unit 3 for stabilizing the frequency of the sampling signal.
4 is provided.

The power analyzer also includes a frequency measuring section 35 for measuring the frequency of the input signal under measurement by using the rectangular wave signal obtained by the filter waveform shaping section 32, and an oscillating section for outputting a fixed predetermined frequency signal. 36, and a second signal for switching between the frequency signal from the oscillation unit 36 and the frequency signal from the PLL unit 34 and outputting the frequency signal to the storage control unit 33.
And a switching unit 37.

Therefore, the sampling mode of A / D conversion, that is, the storage mode, can be of two types, a PLL synchronous system and a fixed synchronous system, by switching the second switching unit 37.

Further, in this power analyzer, a fundamental wave and a harmonic of a predetermined order contained in the input signal under measurement are subjected to an FFT (fast Fourier transform) based on the digital data fetched into the memories 25 to 30. ) Calculation is performed so that analysis for each order can be performed.

Therefore, as shown in FIG. 2, the power analyzer includes a CPU 38 as a central processing unit for controlling the whole of the power analyzer. The memories 25 to 30 and the storage controller 3
3, PLL unit 34, frequency measuring unit 35, and oscillating unit 36
In addition, fast Fourier transform (FFT) is performed on the digital data written in the memory units 25 to 30, and a fundamental wave and a predetermined order included in the input signal under measurement, in this embodiment, harmonics up to the 49th order. Digital signal processor (DPS) 40 for high-speed operation of waves and the like, an EPROM unit 41 for storing a control program of the device and an operation program thereof, and a RAM unit (SRAM, DRAM) for storing data such as operation results. ) 42
And a direct memory access (DMA) controller unit 4 for controlling writing and reading of the RAM unit 42.
3, a VRAM (video ram) unit 44 capable of writing and reading numerical data and waveform data based on the calculation result, a CRT controller unit 45 for writing, reading and controlling display of the data of the VRAM unit 44; A parallel interface 47 for connecting a printer unit 46 for printing out the numerical values and waveforms and the like, and a floppy disk controller (FDC) 49 for controlling a floppy disk drive unit 48 for storing data such as numerical values and waveforms in a proppy or the like. When,
A GP-IB interface 50 and an asynchronous communications interface 51 for outputting data such as numerical values and waveforms to the outside and inputting data from other devices are connected.

Further, this power analyzer apparatus has a display section (for example, a liquid crystal display apparatus) 52 for displaying numerical values or waveforms processed by the CRT controller section 45, and an operation panel having measurement operation switches of the apparatus. 53, and a signal corresponding to the operation is input to the CPU 38 via the bus line 39.

FIG. 3 schematically shows the circuit configuration of the digital signal processor 40. That is,
The processor 40 includes two FFT operation circuits 401a, 401
01b, a power calculation unit 402 that calculates power components of each order from the complex signals obtained from the FFT calculation circuits 401a and 401b, an integration unit 403 that integrates the complex signals and power components of each order, Content calculating unit 4 for calculating the content of complex signal or power component of order
04.

The complex signal, the power component, the integrated value, and the content rate are input to a comparison unit 405, and are compared by the comparison unit 405 with comparison values set from the operation panel 53.

[0024] As the power calculating portion 402 is illustrated in FIG. 4, the multiplication circuit 402 ₀ for zero order, from the primary 49
There are provided power calculation circuits 402 _{1 to} 402 ₄₉ for the next use. Here, for convenience of explanation, the power calculation circuits are assigned for each order, but in reality, the number can be reduced by processing the complex data of each order in a time-division manner.

[0025] Each power calculating circuits ₄₀₂ 1 to 402 ₄₉ are the same configuration is shown an internal circuit of the power calculation circuit 402 ₁ in FIG. That is, the power calculation circuit 402 ₁
Is a multiplication circuit 402 for multiplying the complex current and the complex voltage
b, and a conjugate circuit 402a is interposed on one of the input sides. In this example, it is on the complex current side. Further, on the output side of the multiplication circuit 402b, a real part extraction circuit 402c and an imaginary part extraction circuit 40c are provided.
2d are connected in parallel.

Referring again to FIG. 3, the digital signal processor 40 provides the total harmonic distortion (THD; Total Harmonic Dis
and a distortion ratio calculation unit 410 that calculates the distortion. The distortion factor is V ₁ for the fundamental wave and V ₁ for the second and higher harmonics.
If k,

[0027]

(Equation 1) In the present invention, the upper limit degree setting unit 411
And the upper limit value M can be arbitrarily changed. For reference, a flowchart in the case of the distortion factor calculation mode is illustrated in FIG.

Next, the operation of the power analyzer will be described. In this embodiment, three-channel input units 10 to 13 are respectively provided with two input units 10a and 10a.
b, 11a, 11b, 12a, and 12b, and by applying the voltage and current of the signal under measurement to the input section,
Single-phase to three-phase power measurement is possible.

When a plurality of signals to be measured are respectively input to the input units 10 to 13 and, for example, the power measurement operation of the inverter device is performed, the CPU 38 performs control necessary for the power measurement. A / D conversion sampling and memory 2 based on the measurement frequency of the unit 35
5 is controlled.

That is, A /
The sampling signals of the D converters 19 to 24 are output, the write signals of the memories 25 to 30 are output, and the input signals to be measured are level-converted to the inputtable levels of the A / D converters 19 to 24, respectively. .

As a result, the analog signals passed through the filters 13 to 18 are converted into digital data by the A / D converters 19 to 24 and stored in the memories 25 to 30.
At this time, since the A / D converters 19 to 24 operate simultaneously, digitally converted digital data is stored in the memories 25 to 30 at the same time.

When the storage mode is not the fixed synchronization system but the PLL synchronization system, the second switching unit 37 is switched to the PLL unit 34 side. The analog signal of one input signal under measurement (measured voltage V1 to V3 or measured current A1 to A3) selected by the switching unit 31 is
4 sources.

That is, the analog signal is shaped into a rectangular wave signal by the filter waveform shaping section 32, and the rectangular wave signal is input to the PLL section 34.
The synchronization of the sampling signal of the predetermined frequency of the A / D converters 19 to 24 and the selected signal under measurement is adjusted by the unit 34. In this case, the synchronization is performed at least for several cycles of the selected signal under measurement, and the zero cross point of the input signal under measurement is used as the start point of A / D conversion, and one cycle of the input signal under measurement is accurately captured. Can be.

Here, in order to accurately calculate the 2nd to 49th harmonics among the harmonics included in the signal under measurement by the FFT operation, in this embodiment, one cycle of the input signal under measurement is used. Is divided into 512 to obtain data of each point. In this case, by the PLL synchronization method,
Since one cycle is accurately captured, 512
Digital data of points can be reliably captured.

In this manner, 5 is stored in each of the memories 25 to 30.
Twelve points of digital data are written, and harmonic analysis by FFT is performed based on the data.

That is, a memory corresponding to each channel,
For example, current data a (t) and voltage data v (t) are stored in the digital signal processor 40 from the memories 25 and 26.
And are subjected to fast Fourier transform by the FFT operation circuits 401a and 401b.

As a result, the complex currents An (n = 0,..., 4) of the 0th to 49th orders are output from the FFT operation circuit 401a.
9), and the complex voltage Vn (n = 0,..., 49) from the 0th to 49th order is output from the FFT operation circuit 401b.

With this complex current An and complex voltage Vn,
In power calculation section 402, as shown in FIG. 4, power calculation for each order is performed. Here, the complex current An is represented as (Ar + jAi), and the complex voltage Vn is represented as (Vr + jVi). As shown in FIG. 5, in this example, after the complex current An is conjugated by the conjugate circuit 402a and is set to (Ar-jAi), the multiplication circuit 4
In 02b, multiplication with the complex voltage Vn (Vr + jVi) is performed.

As a result, a real part of (VrAr + ViAi) and an imaginary part of (ViAr-VrAi) are obtained, and the real power W of that order is obtained from the real part extraction circuit 402c.
n is output, and the imaginary part extraction circuit 402d outputs the same order reactive power varn. Also, the power calculation unit 4
02, the apparent power VA of each order
n and the power factor PFn are calculated.

In this manner, the power calculator 402 outputs the active power Wn, the reactive power var, and the apparent power VA of each order.
n and a power factor PFn (n is 0,..., 49) are output.
5 is input.

In the integrating section 403, the complex current An, the complex voltage Vn, the active power Wn, the reactive power varn, and the apparent power V
For each of An and power factor PFn, the first to fourth
Integrates up to the 9th order, and the integrated values ΣAn, ΣVn, ΣW
n, Σvarn, ΣVAn, ΣPFn are output to the comparison unit 405.

In the content rate calculating section 404, the complex current An, the complex voltage Vn, the active power Wn, and the reactive power v
For each of arn, apparent power VAn, and power factor PFn, the content of the n-th harmonic component with respect to the fundamental component is calculated, and the content is output to the comparison unit 405.

In the comparison unit 405, the operation panel 53
Parameters to be compared (for example, current, voltage, active power, etc.), orders of harmonics to be compared (for example, 5th order, 10th order, etc.), upper and lower limits as comparison reference values for measured values, integrated values, content ratios, etc. Are set in advance.

The comparison unit 405 compares these comparison values with the data specified from the operation panel 53, and for example, if the data does not exceed the upper limit value or does not reach the lower limit value, is output as abnormal data from the output unit 406 to the display unit 52 or the like. Output to It should be noted that this comparison is actually performed after being converted into an absolute value.

In FIG. 7, the channel 1 is displayed on the display section 52.
Of the fundamental signal and the voltage components and the current components of the harmonics from the second to the 49th order included in the input signal under measurement (V1, A1) of FIG. Display unit 5 also displays the active power Wn and reactive power var of the
2 is displayed.

In the figure, "1" in the column "k" indicates the voltage and current of the fundamental wave (primary) based on the input signal to be measured of channel 1, and "2" to "49" indicate the measured value. The voltage and current components of the 2nd to 49th harmonics included in the signal are displayed. Further, for example, the first switching unit 3
When 1 is switched to the input unit 10a side, "PLL (V1)" indicating the input unit of the signal under measurement which is the source of the PLL unit 34 is displayed on the screen of the display unit 52 ( (Shown by arrow A in the figure).

Here, the measured signal (measured voltage (V
If the distortion of 1)) is too large or its level is too low, a normal rectangular wave signal cannot be obtained when the filter waveform shaping unit 32 shapes the waveform of the analog signal of the input signal under measurement of the channel 1. Cases arise. In such a case, the switching unit 31 is operated from the operation panel 53 via the CPU 38.
, And another line to be measured may be selected.

On the other hand, when the distortion factor calculation mode (THD mode) is selected by the operation panel 53, the distortion factor calculator 41
At 0, the distortion rate is calculated according to either of the complex current An or the complex voltage Vn according to the above equation. At this time, the upper limit order setting unit 411 can arbitrarily set the upper limit order. For example, if the upper order is 2
If it is set to 0, the second to 20th orders will be integrated.

[0049]

As described above, according to the first aspect of the present invention, the complex current, the complex voltage, the power component, the content, and the like can be compared with the predetermined comparison value in each order unit. This is extremely convenient for measuring harmonics, particularly for measuring the power system of a semiconductor power device.

The higher the order, the higher the harmonic distortion (THD) is affected by the aliasing distortion.
According to the second aspect, when calculating the distortion rate, the upper limit order can be set arbitrarily, so that the influence of aliasing can be eliminated as much as possible.

[Brief description of the drawings]

FIG. 1 is a schematic partial block diagram of a power analyzer according to an embodiment of the present invention.

FIG. 2 is a schematic partial block diagram of a power analyzer according to one embodiment of the present invention.

FIG. 3 is a schematic block diagram of the digital signal processor shown in FIG. 2;

FIG. 4 is a schematic block diagram of a power calculation unit shown in FIG. 3;

FIG. 5 is a schematic block diagram of the power calculation circuit shown in FIG. 4;

FIG. 6 is a flowchart of a total harmonic distortion calculation mode.

FIG. 7 is a display screen diagram displaying measurement data on a display unit of the power analyzer device.

FIG. 8 is a schematic block diagram of a conventional wattmeter.

[Explanation of symbols]

 10 to 12 input unit 19 to 24 A / D conversion unit 25 to 30 memory 31 switching unit 32 filter waveform shaping unit 33 storage control unit 34 PLL unit 35 frequency measurement unit 38 CPU 40 digital signal processor 53 operation panel 401 FFT operation circuit 402 Power calculation unit 403 Integration unit 404 Content calculation unit 405 Comparison unit 410 THD calculation unit 411 Upper limit order setting unit

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-2-75966 (JP, A) JP-A-63-289462 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G01R 11/00-11/66 G01R 21/00-22/04

Claims (2)

(57) [Claims] 1. A plurality of A / D converters for converting a voltage to be measured and a current to be measured into digital data by using a sampling signal of a predetermined frequency, and obtaining digital data for one cycle of each of the plurality of A / D converters. A conversion synchronization control unit including a PLL circuit for synchronizing each sampling signal; and an FF for performing fast Fourier transform on each digital data converted by the A / D conversion unit to obtain a complex current and a complex voltage up to a predetermined n-th order
A T calculator, a power calculator for calculating a power component of the order from the complex current and the complex voltage of each order, and a first to n-th power of each of the complex current, the complex voltage, and the power component. An integration unit that integrates the following, a content calculation unit that calculates the content of each of the complex current, the complex voltage, and the power component with respect to a fundamental wave, and the complex current, the complex voltage, and the power component And a comparison value setting unit for setting a comparison value for a measurement value such as the content ratio, and a comparison unit for comparing the measurement value with the comparison value from the comparison value setting unit. Analyzer device. 2. A plurality of A / D converters for converting a voltage to be measured and a current to be measured into digital data by using a sampling signal of a predetermined frequency, and obtaining digital data for one cycle of each of the signals. A conversion synchronization control unit including a PLL circuit for synchronizing each sampling signal; and an FF for performing fast Fourier transform on each digital data converted by the A / D conversion unit to obtain a complex current and a complex voltage up to a predetermined n-th order
A T calculator, a distortion calculator for calculating a total harmonic distortion from the complex current or the complex voltage, and an upper order setting unit for arbitrarily setting the upper order of the distortion calculator. A power analyzer device, comprising: