JP3036324B2 - Electronic components and their manufacturing method - Google Patents
Electronic components and their manufacturing methodInfo
- Publication number
- JP3036324B2 JP3036324B2 JP25684993A JP25684993A JP3036324B2 JP 3036324 B2 JP3036324 B2 JP 3036324B2 JP 25684993 A JP25684993 A JP 25684993A JP 25684993 A JP25684993 A JP 25684993A JP 3036324 B2 JP3036324 B2 JP 3036324B2
- Authority
- JP
- Japan
- Prior art keywords
- metal film
- cover
- electronic component
- electrode
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は素子を基体とカバーで覆
った電子部品と、その製造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic component in which an element is covered with a base and a cover, and a method for manufacturing the same.
【０００２】[0002]
【従来の技術】従来この種の電子部品においては、基板
上に素子を実装し、この素子をほこり等の異物付着から
保護するために、該基板上にカバーを被せて素子を覆っ
た構成としている。2. Description of the Related Art Conventionally, this type of electronic component has a structure in which an element is mounted on a substrate, and the element is covered with a cover on the substrate in order to protect the element from foreign substances such as dust. I have.
【０００３】[0003]
【発明が解決しようとする課題】上記構成においては、
基板とカバーにより素子をほこりなどから保護すること
が出来るが、水分の浸入についてはさらに改善を要する
ものであった。即ち基板或いはカバーを生産性を高める
ために樹脂材料で成型した場合、大気中の水分等がその
樹脂構成部分を浸透して素子部分まで浸入し、素子の特
性を劣化させてしまうことがある。そこで本発明は、こ
の水分の浸入を防ぎ素子の特性劣化を防止するものであ
る。In the above configuration,
Although the element can be protected from dust and the like by the substrate and the cover, infiltration of moisture requires further improvement. That is, when a substrate or a cover is molded from a resin material in order to increase productivity, moisture or the like in the air may penetrate the resin component and penetrate into the element, thereby deteriorating the characteristics of the element. Therefore, the present invention is to prevent the infiltration of the moisture and prevent the characteristic deterioration of the element.
【０００４】[0004]
【課題を解決するための手段】そしてこの目的を達成す
るために本発明は、樹脂素材からなる基板と、この基板
の上面側に設けた金属膜と、この金属膜上に実装された
素子と、この素子を覆う如く前記金属膜上に被せられる
と共にその下面側に少なくとも金属表面を有するカバー
を備え、前記基板は複数の貫通電極とこの貫通電極の下
端に接続された外部電極を有し、前記貫通電極の上端に
対応する金属膜の外周部位を陽極酸化させると共に、こ
の陽極酸化層部に囲まれた金属膜部分と前記素子の電極
を電気的接続手段で接続したものである。In order to achieve this object, the present invention provides a substrate made of a resin material, a metal film provided on the upper surface of the substrate, and an element mounted on the metal film. A cover having at least a metal surface on the lower surface side of the metal film so as to cover the element, the substrate has a plurality of through electrodes and external electrodes connected to lower ends of the through electrodes, An outer peripheral portion of the metal film corresponding to the upper end of the through electrode is anodically oxidized, and a metal film portion surrounded by the anodic oxide layer is connected to an electrode of the element by an electrical connection means.
【０００５】[0005]
【作用】上記構成とすれば基板上の金属膜及びカバーの
基板側面の金属表面により、水分の素子部分への浸入を
防ぐことが出来、その結果として素子の特性劣化を防止
出来るのである。According to the above construction, the metal film on the substrate and the metal surface on the side of the substrate of the cover can prevent moisture from entering the element portion, and as a result, prevent the characteristic deterioration of the element.
【０００６】[0006]
【実施例】図１において１は例えばエポキシ樹脂よりな
る基板で、その裏面側には図２に示す如く６個の外部電
極２が設けられている。またこの基板１の表面側にはＡ
ｌからなる第１の金属膜３が全面に設けられている。そ
してこの第１の金属膜３の前記外部電極２に対応する部
分には夫々図１に示す如く電極４が形成され、この電極
４と前記外部電極２とは基板１に予め形成された貫通電
極５により接続されている。この電極４は図３，図４に
示す工程を経て作られている。即ちまず図３に示す如く
外部電極２と、貫通電極５を各々６個ずつ図２に示すよ
うに配置した基板１の上面に、Ａｌからなる第１の金属
膜３を全面的に設ける。次に図４に示す如く、下層がＣ
ｒ，Ｔｉ或いはＮｉなど、上層がＡｕ層もしくはＳｎ層
からなる第２の金属膜６を設ける。In FIG. 1, reference numeral 1 denotes a substrate made of, for example, an epoxy resin, and six external electrodes 2 are provided on the back side as shown in FIG. A surface of the substrate 1
1 is provided on the entire surface. As shown in FIG. 1, electrodes 4 are formed on portions of the first metal film 3 corresponding to the external electrodes 2, respectively, and the electrodes 4 and the external electrodes 2 are formed through electrodes formed on the substrate 1 in advance. 5 are connected. The electrode 4 is manufactured through the steps shown in FIGS. That is, first, as shown in FIG. 3, the first metal film 3 made of Al is entirely provided on the upper surface of the substrate 1 on which six external electrodes 2 and six through electrodes 5 are arranged as shown in FIG. Next, as shown in FIG.
A second metal film 6, such as r, Ti or Ni, whose upper layer is made of an Au layer or a Sn layer is provided.
【０００７】この第２の金属膜６は図１に示す如く、電
極４の外周部域上の部分がドーナツ状（環状）に切欠か
れた形状で、第１の金属膜３上に印刷、或いは蒸着、も
しくはメッキ法により形成されたものであり、同形状を
形成するためにホトレジスト等のマスク材を用いた場合
は、同マスク材を同層上に残置させても良い。As shown in FIG. 1, the second metal film 6 has a portion on the outer peripheral region of the electrode 4 cut out in a donut shape (annular shape), and is printed on the first metal film 3 or It is formed by vapor deposition or plating, and when a mask material such as a photoresist is used to form the same shape, the mask material may be left on the same layer.
【０００８】この図４に示す状態の基板１を、例えばリ
ン酸第１アンモニウム水溶液中に浸漬し、外部電極部に
電源の陽極を、電源の陰極を水溶液中に浸漬した陰極電
極に接続して溶液中で通電すれば、図４に示す如く電極
４上の外周部で第２の金属膜が設けられていない部分、
即ち図１における第２の金属膜６のドーナツ状切欠部６
ａに対応する第１の金属膜３であるＡｌ膜が露出してい
る部分において、その膜厚全体にわたりドーナツ状の陽
極酸化層が形成される。この後ホトレジスト等のマスク
材を金属膜６上に残置させた場合は、同マスク材を除去
する。これにより電極４はその外周部の陽極酸化層部４
ａにより、その外周の第１の金属膜とは電気的に絶縁分
離された電極となる。この独立した電極４上には、第２
の金属膜６による電極６ｂが設けられており、この電極
６ｂと第２の金属膜６上に図５に示す如く、接着剤７に
よって実装された素子８の図１に示す電極８ａとがワイ
ヤー９により接続されている。この場合電極８ａはＡ
ｌ、ワイヤー９はＡｕ、電極６ｂはＡｕにより構成され
ている。つまり素子８の電極８ａはワイヤー９、電極６
ｂ及び４、貫通電極５を介して外部電極２に引出されて
いるのである。またその場合例えば図２に示す中部の外
部電極２が入出力用電極、上下４個の外部電極２はアー
ス用電極となる。The substrate 1 in the state shown in FIG. 4 is immersed in, for example, an aqueous solution of ammonium phosphate, and the external electrode is connected to the anode of the power supply, and the cathode of the power supply is connected to the cathode electrode immersed in the aqueous solution. If a current is passed in the solution, a portion where the second metal film is not provided on the outer peripheral portion on the electrode 4 as shown in FIG.
That is, the donut-shaped notch 6 of the second metal film 6 in FIG.
In a portion where the Al film as the first metal film 3 corresponding to a is exposed, a donut-shaped anodic oxide layer is formed over the entire thickness. Thereafter, when a mask material such as a photoresist is left on the metal film 6, the mask material is removed. As a result, the electrode 4 is formed around the anodic oxide layer 4 on the outer periphery.
As a result, the electrode is electrically insulated and separated from the first metal film on the outer periphery. On this independent electrode 4, the second
An electrode 6b made of a metal film 6 is provided, and the electrode 6b and the electrode 8a shown in FIG. 1 of the element 8 mounted on the second metal film 6 by an adhesive 7 as shown in FIG. 9. In this case, the electrode 8a is A
1, the wire 9 is made of Au, and the electrode 6b is made of Au. That is, the electrode 8a of the element 8 is the wire 9 and the electrode 6
b and 4, and are drawn out to the external electrode 2 via the through electrode 5. In that case, for example, the central external electrode 2 shown in FIG. 2 is an input / output electrode, and the upper and lower four external electrodes 2 are ground electrodes.
【０００９】次に第２の金属膜６上に図６に示す如く、
樹脂等からなるカバー１０が固着させられる。即ちカバ
ー１０は下面が開口した箱型であり、その下面全域には
図６に示す如く第３の金属膜１０ａが設けられている。
この第３の金属膜１０ａは、少なくとも表層はＳｎで構
成されており、第２の金属膜６に当接させると共に加熱
することで、Ｓｎ−Ａｕ共晶合金が形成され、この結果
としてカバー１０は基板１上に気密状態で固定されるこ
とになる。また第２の金属膜６をＳｎで構成した場合
は、第３の金属膜１０ａは少なくとも表層がＡｕで形成
した構成とし、カバー１０を基板１の第２の金属膜６上
に当接加熱した際には前記の場合と同様にＳｎ−Ａｕ共
晶合金が形成される構造となっている。Next, on the second metal film 6, as shown in FIG.
A cover 10 made of resin or the like is fixed. That is, the cover 10 has a box shape with an open lower surface, and a third metal film 10a is provided on the entire lower surface as shown in FIG.
At least the surface layer of the third metal film 10a is made of Sn. By bringing the third metal film 10a into contact with the second metal film 6 and heating it, an Sn-Au eutectic alloy is formed. Are fixed on the substrate 1 in an airtight state. In the case where the second metal film 6 is made of Sn, the third metal film 10a has a structure in which at least the surface layer is made of Au, and the cover 10 is abutted and heated on the second metal film 6 of the substrate 1. In this case, the structure is such that a Sn-Au eutectic alloy is formed as in the case described above.
【００１０】またカバー１０の第３の金属膜１０ａを半
田金属で構成した場合には、基板１の第２の金属膜６の
Ａｕ或いはＳｎとの間で、半田溶融接合が当接部でなさ
れ、前記の場合と同様にカバー１０と基板１が気密状態
で接合固定される。When the third metal film 10a of the cover 10 is made of a solder metal, the solder fusion bonding between the Au and Sn of the second metal film 6 of the substrate 1 is made at the contact portion. As in the case described above, the cover 10 and the substrate 1 are joined and fixed in an airtight state.
【００１１】以上の如く素子８は基板１とカバー１０に
より、ほこり等の外気から保護され、またこれらが樹脂
製であって、それらの素材中に水分が浸入したとして
も、その水分は第１の金属膜３と第３の金属膜１０ａに
より上下で完全に遮断され、その結果として容器中に実
装した素子８はほこりだけでなく、外部から浸入する水
分からも完全に保護され、素子の性能劣化を起こさない
ものとなる。As described above, the element 8 is protected from the outside air such as dust by the substrate 1 and the cover 10. Even if these elements are made of resin and moisture enters the material, the moisture is kept at the first level. The element 8 mounted in the container is completely protected not only from dust but also from moisture entering from the outside, and the performance of the element is completely shut off by the metal film 3 and the third metal film 10a. It will not cause deterioration.
【００１２】さらに素子８の上下をこの様に第１の金属
膜３と第３の金属膜１０ａで包囲した構成となり、外部
からの素子８に対する電磁気波の遮蔽がなされ、この点
からもその性能劣化及び誤動作を防ぐことが出来る。Further, the upper and lower portions of the element 8 are surrounded by the first metal film 3 and the third metal film 10a in this manner, so that electromagnetic waves are shielded from the element 8 from the outside. Deterioration and malfunction can be prevented.
【００１３】なお、上記実施例においては、電極６ｂと
８ａをワイヤー９で接続したが、例えば貫通電極５の上
端を基板１上面へ突出させ、その状態で上記と同じく電
極４，６ｂを形成すれば、電極６ｂは図１の状態から上
方へ突出した形態で形成される。そしてこの場合には素
子８を反転させてその電極８ａを直接この突出した電極
６ｂ上に電気的に接続しても良い。勿論この時はワイヤ
ー９は廃止されることになる。In the above embodiment, the electrodes 6b and 8a are connected by the wire 9. However, for example, the upper end of the through electrode 5 is projected to the upper surface of the substrate 1, and in that state, the electrodes 4 and 6b are formed in the same manner as described above. For example, the electrode 6b is formed so as to protrude upward from the state of FIG. In this case, the element 8 may be inverted and the electrode 8a may be electrically connected directly to the protruding electrode 6b. At this time, of course, the wire 9 is abolished.
【００１４】また、図１に示したものでは、素子８のＡ
ｌ電極８ａと電極６ｂをＡｕワイヤー９により接続した
が、電極４のＡｌ上の電極６ｂのＡｕ或いはＳｎからな
る金属層を廃止し、電極４のＡｌと素子８の電極８ａの
Ａｌを、Ａｌからなるワイヤーで接続しても良く、この
様に接続する３者のすべてをＡｌとすれば異種金属接合
による金属間化合物の生成を防いだ電極接合法とするこ
ともできる。Further, in the device shown in FIG.
Although the electrode 8a and the electrode 6b were connected by the Au wire 9, the metal layer made of Au or Sn of the electrode 6b on Al of the electrode 4 was eliminated, and the Al of the electrode 4 and the Al of the electrode 8a of the element 8 were changed to Al. Alternatively, if all of the three members connected in such a manner are made of Al, an electrode joining method in which the formation of an intermetallic compound due to dissimilar metal joining can be prevented.
【００１５】[0015]
【発明の効果】以上の様に本発明は、樹脂製の基板とこ
の基板の上面側に設けた金属膜と、この金属膜上に実装
された素子と、この素子を覆う如く前記金属膜上に被せ
られると共に、その下面側に少なくとも金属表面を有す
るカバーとを備え、前記基板は複数の貫通電極とこの貫
通電極の下端に接続された外部電極を有し、前記貫通電
極の上端に対応する金属膜の外周部分を陽極酸化させる
と共に、この陽極酸化層により囲まれた金属膜部分と前
記素子の電極を電気的に接続したものである。As described above, the present invention relates to a resin substrate, a metal film provided on the upper surface of the substrate, an element mounted on the metal film, and a metal film provided on the metal film so as to cover the element. And a cover having at least a metal surface on the lower surface thereof, wherein the substrate has a plurality of through electrodes and external electrodes connected to lower ends of the through electrodes, and corresponds to upper ends of the through electrodes. An outer peripheral portion of the metal film is anodized, and a metal film portion surrounded by the anodized layer is electrically connected to an electrode of the element.
【００１６】そして以上の構成とすれば基板上の金属膜
及びカバーの基板側面の金属表面により、水分の素子部
への浸入を防ぐことが出来、その結果として素子の特性
劣化を防止出来るのである。With the above structure, the penetration of moisture into the element portion can be prevented by the metal film on the substrate and the metal surface on the side of the substrate of the cover, and as a result, the characteristic deterioration of the element can be prevented. .
【図１】本発明の一実施例の一部切欠斜視図FIG. 1 is a partially cutaway perspective view of one embodiment of the present invention.
【図２】その基板の平面図FIG. 2 is a plan view of the substrate.
【図３】その製造工程を示す断面図FIG. 3 is a sectional view showing the manufacturing process.
【図４】その製造工程を示す断面図FIG. 4 is a sectional view showing the manufacturing process.
【図５】その製造工程を示す断面図FIG. 5 is a sectional view showing the manufacturing process.
【図６】その断面図FIG. 6 is a sectional view thereof.
１ 基板 ２ 外部電極 ３ 第１の金属膜 ４ 電極 ４ａ 陽極酸化部 ５ 貫通電極 ６ 第２の金属膜 ８ 素子 ８ａ 電極 ９ ワイヤー １０ カバー DESCRIPTION OF SYMBOLS 1 Substrate 2 External electrode 3 1st metal film 4 Electrode 4a Anodized part 5 Through electrode 6 2nd metal film 8 Element 8a Electrode 9 Wire 10 Cover
Claims (8)
面側に設けた金属膜と、この金属膜上に実装された素子
と、この素子を覆う如く前記金属膜上に被せられると共
にその下面側に少なくとも金属表面を有するカバーを備
え、前記基板は複数の貫通電極とこの貫通電極の下端に
接続された外部電極を有し、前記貫通電極の上端に対応
する金属膜の外周部位を陽極酸化させると共に、この陽
極酸化層部に囲まれた金属膜部分と前記素子の電極を電
気的接続手段で接続した電子部品。1. A substrate made of a resin material, a metal film provided on an upper surface side of the substrate, an element mounted on the metal film, and a lower surface of the metal film so as to cover the element and cover the element. A cover having at least a metal surface on a side thereof, wherein the substrate has a plurality of through electrodes and external electrodes connected to lower ends of the through electrodes, and an outer peripheral portion of the metal film corresponding to an upper end of the through electrode is anodized. An electronic component in which the metal film portion surrounded by the anodic oxide layer portion and the electrodes of the element are connected by electrical connection means.
陽極酸化時にマスクとなる第２の金属膜層を設け、この
第２の金属膜上にカバーの金属表面を当接させた状態で
固着させた請求項１に記載の電子部品。2. A state in which a second metal film layer serving as a mask during anodic oxidation is provided on the entire surface of the metal film except for the anodic oxide layer, and the metal surface of the cover is brought into contact with the second metal film. The electronic component according to claim 1, wherein the electronic component is fixed by:
は少なくともＡｕ或いはＳｎを表面層とした薄膜からな
る請求項２に記載の電子部品。3. The electronic component according to claim 2, wherein the metal film layer is formed of Al, and the second metal film is a thin film having at least Au or Sn as a surface layer.
ｌのワイヤーを介して、素子のＡｌ電極とを接続した請
求項３に記載の電子部品。4. A metal film portion surrounded by an anodic oxide layer
The electronic component according to claim 3, wherein the electronic component is connected to an Al electrode of the element via a wire l.
属の少なくとも一つの金属膜より形成した請求項３に記
載の電子部品。5. The electronic component according to claim 3, wherein the metal surface of the cover is formed of at least one metal film of Sn, Au, and a solder metal.
面側には第３の金属膜を設けた請求項５に記載の電子部
品。6. The electronic component according to claim 5, wherein the cover is formed of resin, and a third metal film is provided on a lower surface thereof.
側に金属膜を設け、この金属膜の前記貫通電極の上端に
対応する外周部分を陽極酸化処理し、その後この金属膜
上に素子を実装すると共に、この素子の電極と前記陽極
酸化層に囲まれた金属膜部分とを電気的に接続し、その
後この素子を覆う如く前記金属膜上にカバーを被せ、次
にこのカバーの基板側面に設けた金属表面と、前記金属
膜とを当接させた状態で、カバーを基板上の金属膜に固
定する電子部品の製造方法。7. A metal film is provided on an upper surface side of a resin substrate having a plurality of through electrodes, and an outer peripheral portion of the metal film corresponding to an upper end of the through electrode is subjected to anodizing treatment. Thereafter, an element is formed on the metal film. At the same time as mounting, an electrode of this element is electrically connected to a metal film portion surrounded by the anodized layer, and then a cover is put on the metal film so as to cover the element. A method of manufacturing an electronic component, wherein a cover is fixed to a metal film on a substrate in a state where the metal surface provided in the above-mentioned manner and the metal film are in contact with each other.
２の金属膜を設けた、請求項７に記載の電子部品の製造
方法。8. The method for manufacturing an electronic component according to claim 7, wherein a second metal film serving as a mask during anodic oxidation is provided on the metal film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25684993A JP3036324B2 (en) | 1993-10-14 | 1993-10-14 | Electronic components and their manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25684993A JP3036324B2 (en) | 1993-10-14 | 1993-10-14 | Electronic components and their manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH07111297A JPH07111297A (en) | 1995-04-25 |
| JP3036324B2 true JP3036324B2 (en) | 2000-04-24 |
Family
ID=17298271
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP25684993A Expired - Fee Related JP3036324B2 (en) | 1993-10-14 | 1993-10-14 | Electronic components and their manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3036324B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100764386B1 (en) * | 2006-03-20 | 2007-10-08 | 삼성전기주식회사 | Insulation structure for high thermal condition and its manufacturing method |
| KR100735310B1 (en) * | 2006-04-21 | 2007-07-04 | 삼성전기주식회사 | Led package having structure of multi - reflectors and its manufacturing method |
-
1993
- 1993-10-14 JP JP25684993A patent/JP3036324B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH07111297A (en) | 1995-04-25 |
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