JP3009483B2 - Image processing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus for converting image data input through a predetermined image input means into binary data and performing image processing such as medium pit processing, contour processing and shading processing. More particularly, the present invention relates to an image processing apparatus that improves the efficiency of using a line memory with a simple configuration.

[0002]

2. Description of the Related Art Generally, image processing after binary processing in an image processing apparatus includes, for example, medium ume processing, contour processing,
Flat lizard processing, solid lizard processing, medium ume / solid lizard processing, contour / solid lizard processing, contour / flat lizard processing, and the like are performed. These processes are basically realized by a combination of the outline processing and the shadow processing. As memories used for image processing, two memories, an outline processing memory and a shadow processing memory, are used.

[0003]

However, according to the conventional image processing apparatus, since the memory for contour processing and the memory for ruggedness processing are used independently of each other, for example, contour processing or medium processing is used as image processing. When performing ume processing or the like, the memory for slash processing is not used. Conversely, when performing flat or three-dimensional processing, the memory for contour processing is not used, and each memory is sufficiently used. There is a problem in that the memory is often not utilized, in other words, there is a problem that the use efficiency of the memory is poor.

The present invention has been made in view of the above, and has as its object to use a memory efficiently.

[0005]

According to a first aspect of the present invention, there is provided an image processing apparatus for performing image processing on input image data. A line memory for storing, area generating means for generating area data based on a plurality of different image processing contents, control means for writing or reading the image data to or from the line memory in a plurality of different data formats; and Coloring means for performing a plurality of different coloring processes on the image data based on the data.

According to a second aspect of the present invention, an image processing apparatus converts image data input through a predetermined image input unit into binary data, and performs image processing such as medium ume processing, contour processing, and shading processing. In the image processing apparatus to be applied, a line memory for storing binary data and N × N
Contour data calculation means for obtaining contour data of binary data by a matrix logical operation of
It is used by the kage data generation means for moving the value data to the right by 45 degrees to generate kage data, and the outline data calculation means in the line memory based on the contents of image processing such as medium burr processing, outline processing and shading processing. And memory area changing means for changing the memory size of the area and the area used by the kage data generation means in the line memory.

According to a third aspect of the present invention, there is provided an image processing apparatus which converts image data input through a predetermined image input means into binary data, and performs image processing such as medium stalk processing, contour processing, and shading processing. In the image processing apparatus to be applied, a line memory for storing binary data and N × N
Contour data calculation means for obtaining contour data of binary data by a matrix logical operation of
A kage data generation means for generating kage data by moving the value data to the right 45 degrees, and a writing format to the line memory and a format from the line memory based on the contents of image processing such as medium burr processing, contour processing and shading processing. Line memory access control means for changing the read format.

[0008]

In the image processing apparatus according to the present invention, the coloring processing means is based on the area data generated by the area generating means.
A plurality of different coloring processes are performed on each image data, and the control unit writes or reads the image data to or from the line memory in a plurality of different data formats based on the region data generated by the region generation unit.

In the image processing apparatus according to the present invention, the memory area changing means is used by the contour data calculating means in the line memory based on the contents of the image processing such as the medium pit processing, the contour processing, and the shading processing. The memory size of the area and the area used by the kage data generation means in the line memory is changed.

In the image processing apparatus according to the present invention, the line memory access control means includes a writing format for the line memory and a line memory based on the contents of the image processing such as the middle-size processing, the contour processing, and the shading processing. Change the read format from.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an image processing apparatus according to the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing a basic configuration of an image processing apparatus according to the present invention. The image reading unit 100 includes a CCD sensor and the like.
An image processing unit 200 that performs predetermined image processing on input image data input through the image processing unit 200, and an image recording unit 300 that outputs output image data that has been subjected to image processing by the image processing unit 200 via a laser printer or the like. Is done.

FIG. 2 is a block diagram showing only a configuration of a portion for performing image processing according to the present invention out of various types of image processing in the image processing section 200. A binary processing unit 201 for binarizing input image data, an area generating unit 202 for generating area data to be described later based on the content of image processing,
An image processing unit 203 that outputs outline data and lizard data based on the image data binarized by the value processing unit 201 (hereinafter, referred to as binary data) and the region data;
A coloring section 204 for creating final output image data based on the input image data, the area data, the contour data, and the kage data.

The area generating section 202 generates area data based on the contents of the image processing as described above. here,
With reference to FIGS. 3A to 3H, types of image processing performed in the present embodiment will be described. (A) shows a case where the input image data is output as it is (hereinafter referred to as no processing),
(B) Medium ume processing for creating outline data of image data and coloring the center portion as medium ume data, (c)
Is a contour processing for creating a contour part of image data as contour data, (d) is a flat key processing for creating a key of the image data, (e) is a three-dimensional key processing for creating a key of the image data three-dimensionally, (f) ) Is a medium plum / stereoscopic processing that combines medium plumage processing and three-dimensional
(G) is a contour / solid kage process in which contour processing and three-dimensional key processing are performed on image data, and (h) is a contour / flat key process in which contour processing and flat key processing are performed on image data. is there.

When the above-described processing is designated through input means such as an operation panel (details are omitted), the area generating section 202 generates area data as shown in Table 1. still,
In the present embodiment, a case where the area data is composed of 3 bits will be described as an example.

[0015]

[Table 1]

Next, with reference to FIG. 4, a block diagram of the image processing unit 203 which is a main part of the present invention is shown. The image processing unit 203 includes an outline processing unit 205 that obtains outline data of binary data by an N × N matrix logic operation, a kage processing unit 206 that moves the binary data to the right by 45 degrees to generate kage data, A line memory 207b to be used by the contour processing unit 205 in the line memory 207b based on the area data of the area generating unit 202;
And a line memory unit 207 having a function of changing the memory size of an area used by the lizard processing unit 206.

Further, in more detail, the contour processing unit 205
, The lizard processing unit 206 has the configuration shown in FIG. 7, and the line memory unit 207 has the configuration shown in FIG. 11 and FIG.

As shown in FIG. 5, in the contour processing unit 205, when 3-bit area data is input to the circuit 205d, if the area data is "0", a signal is output from the terminal Y0 and the area data is "0". If "1", a signal is output from terminal Y1, similarly if "2", terminal Y2, if "3", terminal Y3, if "4", terminal Y4, if "5", terminal Y
5, if "6", a signal is output from terminal Y6; if "7", a signal is output from terminal Y7. Here, as shown in FIG.
Only the terminals Y1 and Y2 output to the outside from "d" are output from the circuit 20 only when the area data is "1" or "2".
A signal is output from 5d.

The contour width select P ₀ (205c) is for determining the contour width of the contour data in the contour processing unit 205, and is an input means (not shown) such as an operation panel.
The contour width is set to 2 or 4 based on the signal from. However, if the content of the image processing is “contour + kage”, the contour width is automatically set to “2”. The outputs of the selectors 205a and 205b are selected based on the output of the circuit 205d and the output of the contour width select P ₀ (205c).

Although not described in detail, an AND circuit, an OR circuit, and a FlipFlo are provided on the input side of the selector 205a.
A narrowing circuit composed of a p circuit (denoted by F in the figure) is provided, and an AND side is provided on the input side of the selector 205b.
A fattening circuit composed of a circuit, an OR circuit, and a FlipFlop circuit is provided.

In this embodiment, as shown in the figure, by inputting the binary data and the outline FIFO OUT from the line memory unit 207 to the thinning circuit and the thickening circuit, two types of thinning data are obtained. Two types of fat data are generated. Here, it is a rectangular pattern that performs processing in the main scanning direction after processing in the sub-scanning direction.

Thereafter, the selector 205a and the selector 2
05b, the output is selected, and the outline data (data generated from the thinning data and the thickening data) is colored by the coloring unit 20.
4 and the fat data is output to the lizard processing unit 206. FIG. 6 shows the principle of generating contour data from thinned data and thickened data.

FIG. 7 shows a circuit configuration of the lizard processing unit 206. When the area data is input to the circuit 206b (similar to the circuit 205d and the details are omitted), in the case of image processing that requires a ridge, the corresponding terminal (Y3, Y4, Y5,
Y6, Y7).

The ridge width P ₀ (206a) is used to determine the ridge width of the lizard data in the lizard processing unit 206, and is an input means (not shown) such as an operation panel.
To output the ridgeline width set via.

When the area data is "3" or "4" (that is, when only the lizard is used), the binary data and the fat data input to the lizard processing unit 206 are selected. Are "5", "6", "7" (that is,
In case of contour), fat data is selected, otherwise, 0
Is selected as input data.

Here, as for the type of the lizard, the area data "3" and "7" are flat lizards, the area data "4",
“5” and “6” are three-dimensional lizards, each of which has different processing. Therefore, for a flat lizard, the input B of the selector 206c and the selector 206d is selected, and for a three-dimensional lizard,
The input A of the selector 206c and the selector 206d is selected. FIG. 8 shows a three-dimensional lizard when the ridge width is 3, and FIG. 9 shows a flat lizard when the ridge width is 3.

FIG. 10 shows the input data input to the lizard processing unit 206, the lizard FIFO OUT (input from the line memory unit 207), and the lizard FIFO IN output.
(Output to the line memory unit 207) and shows the relationship between the kage data. In the figure, X is FIFO for lizard
OUT data is shown.

Next, a circuit configuration of the line memory unit 207 will be described with reference to FIGS. Line memory unit 2
Reference numeral 07 denotes a circuit 207a and a line memory 207b (in this embodiment, μPD4250 manufactured by NEC Corporation) for storing data for n lines (this embodiment describes the case where n = 8).
5C) , gate circuits 207d1-d3, selector
207e1 to 207e4 .

When the area data is input to the circuit 207a , the circuit 207a operates similarly to the terminal Y in FIG.
A signal is output from a corresponding terminal among 0 to Y7. This
Is a circuit 207a of which eight signals are obtained from signals representing three area data.
Decoding circuit that outputs signals (M0 to M7) indicating the area of
Road. Specifically, if the area data is "0", the terminal
A signal is output from Y0, and if the area data is "1",
A signal is output from the child Y1. Similarly, if "2", the terminal Y
2, "3" for terminal Y3, "4" for terminal Y4,
If "5", terminal Y5; if "6", terminal Y6, "7"
Then, a signal is output from the terminal Y7. Here, Y0
The signals output from the Y7 terminals are respectively designated as M0 to M7.
You. The signals M0 to M7 output from the circuit 207a
M0 is connected to the G gate of the selector 207e4 and M1 and
And M2 are connected to the gate circuit 207d3, and M3 and M4 are connected to the gate circuit 207d3.
M5, M6, and M7 are connected to the gate circuit 207d1.
Output to the gate circuit 207d2. And the gate circuit 2
The output of 07d1 is supplied to the G gate of the selector 207e1.
The output of the gate circuit 207d2 is the G gate of the selector 207e2.
The output of the gate circuit 207d3 is
Input to G gate of e3. Also, the selector 207e
1 includes a FIFO FIFO IN for the lizard from the lizard processing unit 206.
It is input in 4-bit units. In the selector 207e2,
2-bit FIFO IN for lizard from lizard processing unit 206
From unit and contour processing unit 205 to FIFO IN for contour
Is input in units of 2 bits. Selector 207e3
Indicates that the contour FIFO IN from the contour processing unit 205 is
It is entered in units. In the selector 207e4,
"0" level is input. Then, the selector 207e
1 to 207e4, depending on the output of the circuit 207b.
One of them is selected and the license is selected from the selected selector.
The data is output to the memory 207b. Note that, in the line memory unit 207 of this embodiment, the line memory 207
The control circuit (claim 1), the memory area change means (claim 2), the line memory access control, and the other circuits except for “b” change the write format to the line memory 207b and the read format from the line memory 207b. This constitutes means (claim 3) and the like.

When the area data is "0", the process is not executed.
Therefore, M0 is output from the circuit 207a, and
The selector 207e4 is selected , and all0 (all zeros) is selected as the input data of the line memory 207b, and all0 (all zeros) is selected as the output of the line memory 207b.

When the area data is "1" or "2", M1 or M2 is output from the circuit 207a to select.
Data 207e3 is selected and only the contour processing unit 205 performs the processing. Therefore, only the contour FIFO IN is input to the line memory 207b, and the output of the line memory 207b is changed from the contour FIFO OUT to the content of the line memory 207b. It is output as it is, and at the same time, FIFO OU for lizard
T outputs all0 (all zero) data.

If the area data is "3" or "4", the circuit 207a outputs M3 or M4 and selects
Is selected, and only the lizard processing unit 206 performs processing. Therefore, only the lizard FIFO IN is input to the line memory 207b, and the output of the line memory 207b is changed from the digging FIFO OUT to the contents of the line memory 207b. Output as it is, and at the same time, FIFO OU for contour
T outputs all0 (all zero) data.

When the area data is "5", "6",Or
In the case of "7",Circuits 207a through M5, M6, and
Outputs M7 and selects the selector 204e2,ring
Performs the processing of both the Guo processing unit 205 and the Kage processing unit 206
Therefore, the line memory 207b is divided into two and used by half.
Used. As described above, the control means described above
(Claim 1), memory area changing means (claim 2),
The memory access control means (claim 3) and the like
And the FIFO IN for contour and the FIFO for contour shown in FIG.
 IN, FIFO OUT for lizard, FIFO O for contour
The UT is being switched.

[0034] Figure 13 shows a circuit configuration of the colored portion 204 (colored processing means), the holding portion 204a is holding the contour color data P ₀ to specify the color of the contour portion, 204b
The holding portion which holds the Kagetsuke color data P ₀ that specifies the color of Kagetsuke, 204c denotes a holding portion that holds the plum color data P ₀ in specifying the color of the middle plum partial, outline data, Kagedeta , Binary data, and the area data, the input image data is compared with that shown in FIG.
It is possible to obtain output image data subjected to image processing as shown in (h).

As described above, in the image processing apparatus of this embodiment, the line memory 207b used in the contour processing unit 205
Area and the line memory 2 used by the
Since the ratio with the area 07b can be changed, the line memory 207b can be used efficiently.
Further, since the writing format to the line memory 207b and the reading format from the line memory 207b are changed based on the area data, one memory can be used efficiently.

Next, an example in which a plurality of different image processes are performed in the same original as shown in FIG. 14 will be described. still,
Numerals in the figure are area data indicating the contents of image processing.
FIG. 15 shows a case where the input image data of FIG.
7B shows a processing image when processing is performed in 7b. When processing the input image data of FIG. 14, first, the area data "0"
Is selected, and at this time, the contents of the line memory 207b are set to 0.
Continues to be written. Next, when the area data “1” is selected, the corresponding processing (the position indicated by 1 in FIG. 15) is performed. Thereafter, when the area data becomes “0” again, 0 is written to the line memory 207b. Reset.

As described above, by writing 0 in the content of the line memory 207b and resetting it between processes, any graphic can be processed. In other words, since the line memory 207b can be used in a different format for each area data, the capacity of the memory can be greatly reduced. Further, by resetting the line memory 207b for a plurality of processes, it is possible to easily use the processes without inconsistency.

[0038]

As described above, an image processing apparatus according to the present invention (claim 1) is an image processing apparatus for performing image processing on input image data, comprising: a line memory for storing input image data; Area generating means for generating area data based on a plurality of different image processing contents, control means for writing or reading image data to or from a line memory in a plurality of different data formats, and a plurality of image data based on the area data. And a coloring processing means for performing different coloring processing, so that the memory can be used efficiently.

An image processing apparatus according to the present invention (claim 2)
Is a line for storing binary data in an image processing apparatus that converts image data input via a predetermined image input unit into binary data and performs image processing such as medium-size processing, contour processing, and shading processing. A memory, contour data calculating means for obtaining contour data of binary data by N × N matrix logical operation using a line memory, and moving the binary data to the right 45 degrees using a line memory to generate kage data. The area used by the contour data calculating means in the line memory, and the area used by the shading data generating means in the line memory, based on the contents of the image processing such as the medium image processing, the outline processing, and the shading processing. Since the memory area changing means for changing the memory size of the area is provided, the memory can be used efficiently.

An image processing apparatus according to the present invention (claim 3)
Is a line for storing binary data in an image processing apparatus that converts image data input via a predetermined image input unit into binary data and performs image processing such as medium-size processing, contour processing, and shading processing. A memory, contour data calculating means for obtaining contour data of binary data by N × N matrix logical operation using a line memory, and moving the binary data to the right 45 degrees using a line memory to generate kage data. And a line memory access control means for changing a writing format to the line memory and a reading format from the line memory based on the contents of image processing such as medium burr processing, contour processing, and shading processing. Therefore, one memory can be used easily and efficiently.

[Brief description of the drawings]

FIG. 1 is a block diagram of a basic configuration of an image processing apparatus according to the present invention.

FIG. 2 is a block diagram in which only a configuration of a part that performs image processing according to the present invention is extracted from an image processing unit.

FIGS. 3A to 3H are explanatory diagrams illustrating types of image processing performed in the present embodiment.

FIG. 4 is a block diagram of an image processing unit which is a main part of the present invention.

FIG. 5 is an explanatory diagram illustrating a circuit configuration of a contour processing unit.

FIG. 6 is an explanatory diagram showing the principle of generating contour data from thinned data and thickened data.

FIG. 7 is an explanatory diagram illustrating a circuit configuration of a lizard processing unit.

FIG. 8 is an explanatory view showing a three-dimensional lizard when the ridge width is 3.

FIG. 9 is an explanatory diagram illustrating a flat key when the key width is 3;

FIG. 10 is an explanatory diagram showing a relationship among input data, a FIFO FIFO OUT for a lizard, a FIFO IN for a lizard, and lizard data input to a lizard processing unit.

FIG. 11 is an explanatory diagram showing a circuit configuration of a line memory.

FIG. 12 is an explanatory diagram illustrating a circuit configuration of a line memory.

FIG. 13 is an explanatory diagram illustrating a circuit configuration of a coloring unit.

FIG. 14 is an explanatory diagram illustrating an example in which a plurality of different image processes are performed in the same document.

FIG. 15 is an explanatory diagram showing a processing image when the input image data of FIG. 14 is processed by a line memory.

[Explanation of symbols]

 REFERENCE SIGNS LIST 100 image reading unit 200 image processing unit 300 image recording unit 201 binary processing unit

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Claims (3)

(57) [Claims] 1. An image processing apparatus for performing image processing on input image data, comprising: a line memory for storing the input image data; and an area generator for generating area data based on a plurality of different image processing contents. Means, control means for writing or reading the image data to or from the line memory in a plurality of different data formats, and coloring processing means for performing a plurality of different coloring processes on the image data based on the area data. An image processing apparatus characterized by the above-mentioned. 2. An image processing apparatus for converting image data input via a predetermined image input means into binary data and performing image processing such as medium-mesh processing, contour processing, shading processing, and the like. A contour data calculating means for obtaining contour data of the binary data by N × N matrix logical operation using the line memory; and a 45 ° rightward conversion of the binary data using the line memory. And a region used by the contour data calculation unit in the line memory based on the contents of the image processing such as the medium burr process, the contour process, and the shading process, and A memory area changing means for changing a memory size of an area used by the kage data generating means in the line memory. The image processing apparatus according to claim. 3. An image processing apparatus for converting image data input through a predetermined image input means into binary data and performing image processing such as medium pitting processing, contour processing, shading processing, and the like. A contour data calculating means for obtaining contour data of the binary data by N × N matrix logical operation using the line memory; and a 45 ° rightward conversion of the binary data using the line memory. A writing data generating means for generating the writing data by moving to a memory, and changing a writing format to the line memory and a reading format from the line memory based on the contents of the image processing such as the medium burr processing, the contour processing, and the shading processing. And a line memory access control unit.