JP3006515B2 - DC parallel measurement circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a DC parallel measuring circuit, and more particularly to a DC parallel measuring circuit in a memory IC tester.

[0002]

2. Description of the Related Art FIG. 3 shows the configuration of a DC parallel measuring circuit according to the prior art. FIG. 3 is a configuration diagram of a part of the DC parallel measurement system of the memory IC tester.
It is called DUT. ) Shows a configuration in the case where the maximum number of parallel circuits is N.

[0003] 1 in FIG. 3 is a CPU for controlling DC measurement,
2A and 2B convert a set voltage or set current into an analog value, and send a D / A converter to a DC unit. 3A to 3D convert the set voltage or current into a D / A through a force line.
A DC unit for applying voltage to any pin of the UT and performing voltage measurement or current measurement via the sense line, 4A to 4D converts the measured value of each DC unit into a digital value,
A / D converter for transferring to U, 51A-51C / 52A-
52C is a switching relay for switching the force line between the DC unit and the DUT, 61A to 61C and 62A to 62C.
Is a switching relay for switching a sense line between the DC unit and the DUT, 7A to 7D are switching circuits for connecting each DC line to a set measurement pin of each DUT, and 8 is a DUT board.
And 9A to 9D, 10A, and 10B are DUTs.

FIG. 3 shows a configuration in which the number of DC units is N.
Only the (2 + 1) -th and the N-th are shown.
In FIG. 3, the first D / A converter 2A is the first DC
Unit 3A and (N / 2 + 1) th DC unit 3
C, and the N / 2th D / A converter 2B is connected to the N /
2nd DC unit 3B and Nth DC unit 3
Connect to D. Similarly, other D / A converters not shown are connected to two DC units separated by N / 2.

[0005] The first DC unit 3A is a switch 5
The force line is connected to the switching circuit 7A via 1A, and the sense line is connected to the switching circuit 7A via the switch 61A. N / 2th DC unit 3B
Switches the force line through the switch 52A to the switching circuit 7.
B, and the sense line is connected to the switching circuit 7B via the switch 62A.

The (N / 2 + 1) -th DC unit 3C
Switches the force line through the switch 51B to the switching circuit 7.
C, and the sense line is connected to the switching circuit 7C via the switch 61B. The Nth DC unit 3D connects the force line to the switching circuit 7D via the switch 52B and connects the sense line to the switching circuit 7D via the switch 62B.

The force line of the first DC unit 3A is connected to the force line of the (N / 2 + 1) th DC unit 3C via a switch 51C, and the sense line of the first DC unit 3A. Is
It is connected to the sense line of the (N / 2 + 1) th DC unit 3C via the switch 61C.

[0008] The force line of the N / 2th DC unit 3B is connected to the force line of the Nth DC unit 3D via a switch 52C, and the sense line of the N / 2th DC unit 3B. Is connected to the sense line of the Nth DC unit 3D via the switch 62C.

As described above, each DC unit outputs a force line and a sense line and is connected to a switching circuit via a switch. The output of each switching circuit is DUT
DU input to the board 8 and attached to the DUT board 8
T is connected to T to test the DUT. Note that FIG.
The CPU 1 supplies data to each D / A converter and controls each switch and each switching circuit.

In the configuration shown in FIG. 3, the number of DUTs measured in parallel is N or N / 2. Next, the operation when the number of mounted DC units and the number of parallel measurements of the DUT are the same will be described with reference to FIG. That is, since the number of parallel measurement of the DUT is N, as an example, among the DC measurement pin information for the DUT set in advance by the program, the CPU 1 sends an instruction to measure only one pin to the switching circuits 7A to 7D. Shall be

The first D / A converter 2A is commonly connected to the first DC unit 3A and the (N / 2 + 1) th DC unit 3C, and switches the force line of the DC unit 3A. As for the relay, 51A is turned on and 51C is turned off.
1C is turned off and the DC unit 3C
51B is turned on for the switching relay of the line, and 61B is turned on for the switching of the sense line.

The N / 2th D / A converter 2B is connected to the N /
2nd DC unit 3B and Nth DC unit 3
D is connected in common to the DC unit 3B.
As for the switching relay of the line, 52A is turned on and 52C is turned off, and the switching relay of the sense line is turned on 62A and 62C.
Is turned off, the switching relay of the force line of the DC unit 3D is turned on at 52B, and the switching relay of the sense line is turned on at 62B. Other D / not shown
The A-converter / DC unit and the switching circuit are also operated in the same manner by the switching relays connecting them, so that the force sense lines of the N DC units are connected to the measurement pins of each DUT, and the programmed set voltage is set. Alternatively, the set current is sent from the CPU 1 to the DC units 3A and 3B via the D / A converter 2, and the DC of the pin A is simultaneously applied to all DUTs
A measurement is taken.

Next, a case where the number of DUTs measured in parallel is N / 2 will be described. At this time, since the number of DC units and the number of switching circuits are N, the number of measurable pins per DUT is doubled.

In FIG. 3, the force sense line of the (N / 2 + 1) th DC unit 3C is connected to an arbitrary pin of the (N / 2 + 1) th DUT 9C when the number of DUTs measured in parallel is N. However, the number of parallel measurements of the DUT is
In the case of two, it is connected to the pin B of the first DUT 10A.

When the number of parallel measurements of the DUT is N, the force sense line of the N / 2th DC unit 3B is connected to an arbitrary pin of the N / 2th DUT 9B. If the number of parallel measurements is N / 2,
Connected to pin A of N / 2th DUT 10B. Further, when the number of parallel measurement of the DUT is N, the N-th DU
The force sense line connected to an arbitrary pin of T9D is N / 2th when the number of parallel measurement of the DUT is N / 2.
Connected to pin B of the DUT 10B.

Here, when the pins A and B of the DUT 10A are measured in parallel, first, the switching relay 51A of the force line of the DC unit 3A is turned on in the first measurement.
B / 51C is turned off, sense line switching relay 61A is turned on, and 61B / 61C is turned off. Further, the switching relay 52A of the force line of the DC unit 3B is turned on,
B.52C is turned off, sense line switching relay 62A is turned on, and 62B and 62C are turned off. Similarly, by controlling the connection of a switching relay between a DC unit (not shown) and the switching circuit, the first DUT 10A to the N / 2th
The pin A of the DUT 10B is measured simultaneously by the first DC unit 3A to the N / 2th DC unit 3B.

Next, in the second measurement, the foreline switching relay 51C is turned on, 51A and 51B are turned off, the sense line switching relay 61C is turned on, and 61A and 61B are turned off. Also, the foreline switching relay 52C is turned on, 52A and 52B are turned off, and the sense line switching relay-6 is turned off.
2C is turned on, and 62A and 62B are turned off. Similarly, by controlling the connection of the switching relay between the DC unit (not shown) and the switching circuit, the first DUTs 10A to 10
Connect pin B of the N / 2th DUT 10B to the first DC
Measurement is performed simultaneously by the unit 3A to the N / 2th DC unit 3B.

FIG. 4 summarizes this operation for each parallel measurement number. In this way, one DC unit channel is connected to each DUT while switching the DC line between the DC unit and the DUT by relay, and the DC parallel measurement of the DUT is performed.

[0019]

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention
In the C parallel measurement circuit, in the configuration of the related art, when the number of DC unit mounting channels and the number of parallel measurement of the DUT are different, a DC unit is connected to a pin of each DUT by a relay for switching a DC line between the DC unit and the DUT.
Measurement must be performed by connecting each channel. Therefore, when the number of DC units increases in accordance with the number of parallel measurements of the DUT, the relay increases, and the mounting area increases. In addition, in the configuration of FIG. 3, when performing DC measurement of each pin, only one pin can be measured in parallel.
Has a problem that the measurement time becomes long.

[0020]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention transfers a signal relating to a programmed measurement to a measurement system and controls a maximum of N samples to be measured in parallel. A D / A converter that converts a programmed set value from the CPU 1 into an analog value and outputs the analog value, and an output of the D / A converter as an input. N DC units for applying and measuring voltage or current to the
In accordance with the measurement pin information specified by U1, there are provided N switching circuits for connecting the DC line of each DC unit to an arbitrary pin of each sample to be measured, and the number of parallel measurements of the sample to be measured is N In this case, the output of each DC unit is connected to a first arbitrary pin of each sample to be measured. If the number of parallel measurements is N / 2, the (N / 2 + 1) th to Nth DC units are connected. Connected to the second arbitrary pins B of the first to N / 2th samples to be measured, respectively,
Each time the ratio becomes / 2, the number of DC units connected to the sample to be measured is doubled, and a plurality of pins are simultaneously measured. Also,
The CPU 1 executes the (N / 2 + 1) -th to N-th D / A
The converter connects the data connected to the (N / 2 + 1) -th to N-th DC units and the first to N / 2-th D / D units.
The data output from the A converter to the first to N / 2th DC units is set to different data, and the number of parallel measurements is 1
/ 2, the data of the D / A converter output to the DC unit connected to the sample to be measured is set to different data, and different data are respectively set to a plurality of arbitrary pins connected to the sample to be measured. At the same time.

[0021]

FIG. 1 shows the configuration of a DC parallel measuring circuit according to the present invention. FIG. 1 is a configuration diagram of a part of a DC parallel measurement system of a memory IC tester, similarly to FIG.
The configuration when the maximum number of parallel DUTs is N is shown.

2C and 2D in FIG. 1 are D / A converters.
Others are the same as FIG. In FIG. 1, the D / A converter is, for example, a first, N / 2-th, (N / 2 + 1) -th,
And only the Nth one. That is, D /
An A converter is provided corresponding to each DUT to be measured in parallel.

A force line and a sense line, which are outputs of each DC unit, are directly connected to corresponding switching circuits. That is, the configuration of FIG.
The switching relay between the C unit and the switching circuit is eliminated, and the number of D / A converters is equal to the number of DUTs that can be measured in parallel.

Next, the operation of the DC parallel measurement according to the present invention will be described. As in FIG. 3, among the DC measurement pin information for the DUT set in advance by the program,
If the CPU 1 sends an instruction to measure only the pin A to the switching circuits 7A to 7D, the number of mounted DC units and the DU
When the number of parallel measurements of T is the same, one DC unit corresponds to one DUT as in the conventional case, and the force sense lines of the N DC units are connected to the measurement pins of each DUT, and the programmed setting is performed. The voltage or the set current is sent from the CPU 1 to the DC units 3A to 3D via the respective D / A converters, and the DC measurement of an arbitrary pin is performed simultaneously for all DUTs. This is repeated one pin at a time until all the set pins are measured.

When the number of parallel measurements is N / 2, the (N / 2 + 1) th DUT when the number of parallel measurements is N shown in FIG.
The pin A of 9C is connected to the pin B of the first DUT 10A in FIG. Since the signal input to the pin B of the DUT 10A fixes the force sense line of the DC unit, the (N / 2 + 1) th DC unit 3
Given from C.

Similarly, the pin A of the Nth DUT 9D in FIG. 3 is connected to the pin B of the N / 2th DUT 10B in FIG. 1, and the signal input to the pin B of the DUT 10B is
Since the force sense line of the DC unit is fixed, it is provided from the Nth DC unit 3D.

Therefore, when the pins A and B of each DUT are measured in parallel, the pin A of the DUT 10A is connected to the DC unit 3A, the pin B of the DUT 10A is connected to the DC unit 3C, and the other DUTs are also connected to the pin A. A DC unit is connected to each of B, and pins A and B are measured simultaneously.

When the CPU 1 determines that the first to N / 2th D /
By making the data set in the A converter the same as the data set in the (N / 2 + 1) -th to N-th D / A converters, the same signal is input to pins A and B of the DUT, By setting the data set for the first to N / 2th D / A converters and the data set for the (N / 2 + 1) th to Nth D / A converters to be different data,
Different signals are input to pins A and B of the DUT, and DC parallel measurement is performed at the same time.

FIG. 2 is a table summarizing this operation for each parallel measurement number. DC measurement is completed once when the number of parallel measurement of the DUT is N or N / 2. It is shown to be.

The DU measured in parallel in the configuration of FIG.
Although the number of T is N or N / 2, according to the configuration of FIG. 1, the number of pins that can be measured simultaneously is doubled each time the number of DUTs to be measured in parallel is further reduced to half. You.

[0031]

According to the present invention, in order to measure N DUTs in parallel, a D / A converter for inputting data from the CPU is provided for each DUT, and switching between the DC unit and the switching circuit is performed. Since the relay is eliminated, the circuit scale can be reduced, and the number of parallel measurements is, for example, N / 2.
When the number of DUTs becomes two, the remaining pins are connected to the respective DUTs, so that the DUT has two pins at the same time,
Different data can be given to each pin for measurement, and the measurement time can be shortened. Each time the number of DUTs measured in parallel becomes １ ／, a plurality of DC units are connected to one DUT, the number of pins that can be measured simultaneously increases, and the test time can be further reduced.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a DC parallel measurement circuit according to the present invention.

FIG. 2 is a correspondence table of DUTs, pins, and DC units for each DUT parallel measurement number in FIG. 1;

FIG. 3 is a configuration diagram of a DC parallel measurement circuit according to the related art.

FIG. 4 is a correspondence table of DUTs, pins, and DC units for each DUT parallel measurement number in FIG. 3;

[Explanation of symbols]

1 CPU 2A-2D D / A converter 3A-3D DC unit 4A-4D A / D converter 51A-51C, 52A-52C DC force line switching relay 61A-61C, 62A-62C DC sensing line switching relay 7A-7D switching circuit 8 DUT board 9A-9D DUT 10A / 10B DUT

Claims (2)

(57) [Claims] 1. A CPU (1) for transferring a signal relating to a programmed measurement to a measurement system and performing a control for measuring a maximum of N samples to be measured in parallel, and a programmed signal from the CPU (1). A set value is converted to an analog value, and N D / A converters for outputting are output. The output of the D / A converter is input, and a voltage or a current is applied to an arbitrary pin of the sample to be measured. N to measure
DC units, and N switching circuits for connecting the DC lines of the DC units to arbitrary pins of each sample to be measured according to the measurement pin information specified by the CPU (1). When the number of parallel measurements of the sample is N, the output of each DC unit is connected to the first arbitrary pin of each sample to be measured, and when the number of parallel measurements is N / 2, the (N / 2 + 1) th
The Nth to Nth DC units are respectively connected to the second arbitrary pins B of the first to N / 2th DUTs, and each time the number of parallel measurements becomes 1/2, the DUT Characterized in that the number of DC units connected to the DC parallel measurement circuit is doubled and a plurality of pins are simultaneously measured. 2. The CPU (1) includes (N / 2 + 1) -th CPU
The Nth D / A converter is (N / 2 + 1) th to Nth
The data connected to the first DC unit and the data output to the first to N / 2th DC units by the first to N / 2th D / A converters are set to different data, Each time the number of measurements becomes １ ／, the data of the D / A converter output to the DC unit connected to the sample to be measured is set to different data, and a plurality of arbitrary pins connected to the sample to be measured are set. 2. The DC parallel measurement circuit according to claim 1, wherein different data are simultaneously inputted to each of the first and second measurement units.