JP3000878B2 - Assembler processing method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an assembler processing method, and more particularly to an assembler processing method capable of high-speed processing.

[0002]

2. Description of the Related Art In order to refer to a certain processing step position in an assembler source, a reference method using an address of the processing step and a reference method using a difference from the position to a certain position currently being executed are well known. . The former is called an absolute address reference method, and the latter is called a relative address reference method.

[0003] Even for the same instruction of the assembler, the instruction code length is different between the absolute address reference method and the relative address reference method, and the instruction code length is shorter in the relative address reference method. Instructions with different code lengths can be selected and specified at the time of program coding, or a translation program such as a compiler or assembler can place an optimization pseudo-instruction written by the user as short as possible according to the reference position of the instruction. Has been replaced. This is called instruction optimization.

First, a description will be given of a conventional assembler processing method capable of performing high-speed assembling but not performing instruction optimization but performing high-speed assembling. Here, a symbol referred to before the definition is called a forward reference symbol, and a conventional assembler processing method for processing the forward reference symbol is shown in FIG.

Referring to FIG. 12, this conventional assembler processing method uses a source file 2 as an input file.
01 and an assembler 202 that performs assembling processing
And an object file 203 serving as an output file.

The detailed flow of the assembler 202 will be described with reference to FIG. 12 again.
First, the source file input part 204
Read 1. Next, the syntax read by the syntax analysis unit 205 is analyzed, a symbol table 206 and a reference information table 207 are generated, and the analyzed content is stored in the intermediate code 20.
Output as 8. The symbol table 206 is a table of symbol information created when a symbol is defined. The reference information table 207 is a table of reference information created when a forward reference is made.
Is a code obtained by converting a source program into machine language code. After finishing the processing of the syntax analysis unit 205, the assembler 202 uses the symbol table 206 and the reference information table 207 in the operand determination processing unit 209 to resolve the operand of the intermediate code 208 that has not been determined by forward reference, and A code is created, and the object code 203 is output by the object file output unit 210.

Details of each of the above-described symbol table 206, reference information 207, and intermediate code 208 will be described with reference to FIG.

First, when n symbol definitions and k forward references are described in the input assembler source, a symbol entry (3
01-301n) are created and the reference information table 30
2, reference information entries (3021 to 302k) are created. Each symbol entry (301 to 301n) has an address value in which the symbol is defined, and the reference information has a pointer to the symbol entry being referred to and a reference position of the reference position to the intermediate code 303.

Further, the flow of the syntax analysis unit 205 will be described with reference to the flowchart shown in FIG.

First, syntax analysis is performed in syntax processing 401. Next, if there is a forward reference symbol in the operand in the forward reference determination processing 402, reference information generation processing 403 is performed, and end determination processing 404 is performed. Reference information generation processing 4
In step 03, reference information is generated in the reference information table.
In the end determination process 404, it is determined whether or not there is a syntax. If there is a syntax, the process returns to the syntax process 401; otherwise, the syntax analysis ends.

Next, the flow of the operand determination processing unit 209 will be described with reference to the flowchart shown in FIG.

The operand determination processing unit 209 processes reference information entries in the reference information table one by one from the top. First, reference information end determination processing 501 is performed. In this reference information end determination processing 501, it is determined whether or not reference information is still present at the reference position. If there is, reference information resolution processing 502 is performed; otherwise, the operand determination processing unit ends.

In the reference information resolution process 502, an address value is extracted from the symbol pointed to by the reference information currently being referenced, the address value is embedded in the position of the intermediate code pointed to by the reference information, a patch is performed, and the reference position is changed. Processing 503 is performed. In the reference position change processing 503, the reference information is changed to the position of the reference information next to the reference position of the reference information, and the process returns to the reference information end determination processing 501.

Next, a description will be given of a second conventional assembler processing method which can perform instruction optimization but is not as fast as the assembler processing method described above.

Referring to FIG. 16, a second conventional assembler processing method for performing instruction optimization processing includes a source file 601 as an input file, an assembler 602 to perform assembling processing, and an object file as an output file. 603.

The detailed flow of the assembler 602 will be described with reference to FIG. 16 again.
First, the source file input unit 604
Read 1 Next, the content read by the syntax analysis unit 605 is syntax-analyzed, a symbol table 606 and optimization information 607 are created, and the analyzed content is created as intermediate data 608. Branch information generation unit 6051 in syntax analysis unit 605
Creates optimization information when the syntax is an optimization pseudo-instruction. The symbol table 606 is a table of symbol information created when a symbol is defined.
The branch information 607 is a table of optimization information created when there is an optimization pseudo-instruction. The intermediate data 608 analyzes a source program, and changes the analyzed information into information that facilitates code generation for each line. Data. After the completion of the syntax analysis, the optimization processing unit 609 uses the symbol table 6
The optimization process is performed using the information 06 and the branch information 607, and the symbol table 606 is updated. Intermediate data analyzer 6
10, the intermediate data 60 is generated using the symbol table 606.
8 is performed, an object code is created, and the object code is output by the object file output unit 611.

The details of the intermediate data 608 are shown in FIG.
When n lines of instructions are described in the assembler source, data entries (7011-701n) are created in the intermediate data 701.

The data entries (7011-701n) have instruction identification values (7011-170), respectively.
1n1). The instruction identification value includes information indicating whether it is determined (set to 1) or not determined (set to 0).
If the instruction of the line can be determined at the time of parsing, the decision information (1) is inserted. If the instruction of the line cannot be determined at the time of parsing, undetermined information is entered. At the time of determination, the determined object code is stored in the data entry. When not determined, the data entry stores the undetermined object code and the value of the operand necessary for determining the object code as intermediate reference information.

The intermediate reference information has reference position information and reference symbol information. The reference position information is a position in the object code where the operand is referenced, and the reference symbol information has a pointer to the symbol entry referenced by the operand.

FIG. 1 is a flowchart of the syntax analysis unit 605.
FIG.

Referring to FIG. 18, the syntax analyzer 605
Analyzes the syntax of each line from the assembler source input in the syntax processing 801. Next, semantic analysis processing 8
In 02, the meaning is analyzed from the syntax, and what kind of object code should be output for the described line is analyzed. However, in the semantic analysis processing 802, the object code is not actually output, but an analysis of what kind of object code should be output is necessary for determining the address. If the semantic analysis unit has analyzed “end” as described, the processing of the syntax analysis unit ends, and if not, the object code solution determination processing is performed. Where "end" is en
This is a pseudo-instruction that indicates the end of the syntax with the d pseudo-instruction.

Next, an object code determination determination process 8
At 03, it is determined whether the object code can be determined. If the value of the operand is currently known,
If the object code can be determined, the determined intermediate language data creation processing 804 is performed; otherwise, the undetermined intermediate language data creation processing 805 is performed. In the determined intermediate language data creation processing 804, information of the determination is output as the instruction identifier, and then the determined object code is output, and the end determination processing 806 is performed. In the undetermined intermediate language data creation processing 805, undetermined information is output as an instruction identifier, an undetermined object code is output, operand information is output as intermediate reference information, and an end determination processing 806 is performed. In the end determination processing 806, it is determined whether or not there is a syntax, and the syntax analysis ends.

Next, FIG. 19 shows a flowchart of the intermediate data analysis section 610.

In the identification value determination processing 901, the instruction identification value of the intermediate data is determined. If the information of the determination is included, the object output processing 903 is performed. Otherwise, the object determination processing 902 is performed. In the object determination processing 902, the value of the symbol entry pointed to by the reference symbol information is output to the reference position of the object code included in the reference position information to determine the object code, and the object output processing 903
Perform Next, an object output process 03 is performed. In the object output end 903, the object code in the data entry is output, and the end determination processing 904 is performed. In the end determination process 904, it is determined whether or not there is a data entry. If there is a data entry, the process returns to the identification value determination process 901; otherwise, the intermediate data analysis ends.

The operation of the syntax analyzer 605 and the intermediate data analyzer 610 when the assembler source shown in FIG. 20 is input will be described as a specific example. In FIG. 10, "lab:" is a label definition instruction in an assembler source consisting of three lines, and "mov A, X" is an object code "000".
"1", "mov A, lab" is an object code "10XX", and "end" is an end pseudo instruction which indicates the end of the syntax. However, it is assumed that XX contains the relative address of lab.

Next, the syntax analyzer 605 creates the intermediate data shown in FIG. First, in syntax processing 801, “mo
It analyzes that the syntax “v A, lab” has been input. Next, in the semantic analysis processing 802, “mov A, la
b), the object code “10” is analyzed.
XX "is output. Next, it is determined whether or not an object code can be determined in an object code determination determination process 803. In the intermediate language data creation processing 803, an intermediate language is created. In this case, since the object code has not been determined, the undetermined intermediate language data creation processing 805 is performed.

In the undecided intermediate language data creation processing 805, undecided information is output as the instruction identifier 110111.
10112, and outputs the information of the operand as the intermediate reference information 110113. Here, the intermediate generation information 1
In the reference position information 1101131 in 10113, 1 is entered, and in the reference symbol information 1101132, a pointer to the symbol entry of “lab” is stored.
Return to 01.

Next, in syntax processing 801, “mov A, X”
It analyzes that the syntax was input. Next, in the semantic analysis processing 802, the meaning of the syntax of “mov A, X” is analyzed, and analysis is performed to output the object code “0001”. Next, it is determined whether or not an object code can be determined in an object code determination determination process 803. In the intermediate language data creation processing 803, an intermediate language is created. In this case, since the object code is determined, the determined intermediate language data creation processing 804 is performed. In the determined intermediate language data creation processing 804, information that has not been determined is output as the instruction identifier 1101121, and then the determined object code 110122 is output.
And returns to the syntax processing 01. Next, in the syntax processing 801, it is analyzed that the syntax “end” is input. Next, in the semantic analysis process 02, the meaning of the syntax of “end” is analyzed, and the syntax analysis ends.

Next, the operation of the intermediate data analyzer 610 will be described.

First, in an identification value determination process 901, the instruction identification value 110112 of the intermediate data is determined.
Since it has not been determined, the object determination processing 902 is performed. In the object determination process 902, the value 2 of the symbol entry “lab” pointed to by the reference symbol information is set to the object code 110112 included in the reference position information.
To the reference position of the object code 110112
Make a decision. The object code 110112 is updated from “1000” to “1002”. An object output process 903 is performed. Object output processing 9
03, the object code “10” in the data entry
02 ", and an end determination process 904 is performed.
In the end determination reason 904, it is determined whether or not a data entry still exists. If there is a data entry, the process returns to the identification value determination processing 901.

Next, in the identification value determination processing 901, the instruction identification value 110112 of the intermediate data is determined, and since it is determined, the object output processing 903 is performed. In the object output process 903, the object code "0001" in the data entry is output, and the end determination process 904 is performed. In the end determination processing 904, it is determined whether or not there is a data entry, and the intermediate data analysis ends.

[0032]

The symbol reference cannot be determined by the first syntax analysis because the definition position and the reference position of the symbol are shifted by the optimization process. Therefore, as in the above-described conventional optimization processing, a method using an intermediate language is used, but the intermediate data represented by the intermediate language is larger and more complex than the generated object code. Since the analysis must be performed line by line, there is a problem that it takes a lot of processing time to generate and analyze the intermediate language.

[0033]

According to the assembler processing method of the present invention, input data is read , reference information is generated each time a predetermined syntax refers to a symbol table, and an optimization information table is generated for each optimization instruction. Generated and the syntax
A syntax analysis step of generating block information at the time of an optimization pseudo instruction and creating an intermediate code from the input data, and optimizing the number of steps of the optimization instruction corresponding to each of the symbol table and the optimization information table Optimization processing step, and the intermediate code pointed to by the block information to resolve an undecided operand in the intermediate code
A code generation processing step of performing only the size of the block information from the position of
Object that outputs generated object code
And a task file output step .

Further, the syntax analysis step of the assembler processing method of the present invention includes a syntax processing step of generating an intermediate code when the syntax is an instruction, and an optimization processing for determining whether the syntax is the optimization pseudo instruction. of directive and determination process step, the optimization directive decision processing branch information generation processing step of executing time of the syntax the optimized pseudo-instruction in step the syntax segment determines segment directive or pseudo An instruction determination processing step, a block information generation processing step to be executed when the syntax is a segment pseudo instruction in the segment pseudo instruction determination processing step, and a determination whether an undefined reference symbol exists in the operand of the syntax. A definition reference determining step, and when there is an undefined reference symbol in the operand of the syntax It may be configured to have a reference information processing step of executing.

[0035]

FIG. 1 is a system block diagram of a processing method of an assembler according to a first embodiment of the present invention.

Referring to FIG. 1, a processing method of the assembler according to the present embodiment uses a source file 10 as an input file.
1 and an assembler 102 that performs assembler processing, and an object file 103 that is an output file.

In the assembler 102, first, the source file input section 104 reads the source file 101. Next, the content read by the syntax analysis unit 105 is parsed, and the symbol table 106, the optimization information table 107, the block information table 108, and the reference information table 10 are analyzed.
9 are created, and the intermediate code 11 is
Create 0. When the syntax is an optimization pseudo-instruction by the optimization information generation unit 1051 in the syntax analysis unit 105, an optimization information entry is created in the optimization information table 107, and the syntax is changed by the block processing 1052 in the syntax analysis unit 105. A block information table 108 is created at the beginning of a block.

The above-mentioned blocks are individual parts obtained by dividing a source program by optimization pseudo-instructions. For example, the assembler source shown in FIG. 2 includes n optimization pseudo-instructions and (n + 1) pieces of optimization pseudo-instructions. Blocks 1201 to 120
(N + 1). However, “lab:” is a label definition, “br lab” is an optimization pseudo instruction, and “no
"p" is a machine language instruction, and "end" is a pseudo-instruction indicating the end of the assembler.

The symbol table 106 is a table of symbol information created when a symbol is defined.
The optimization information table 107 is a table of optimization information created when there is an optimization pseudo instruction. The block information table 108 is a table of block information created at the beginning of each block.
Reference numeral 9 denotes a table of reference information created when a forward reference is made, and the intermediate code 110 is a code obtained by converting a source program into a machine language code. After the syntax analysis, the optimization processing unit 111 performs optimization processing using the symbol table 106 and the optimization information table 107, and updates the symbol table 106. After the optimization processing 111 is completed, the code generation processing unit 112 causes the symbol table 10
6. The optimization pseudo-instruction is resolved using each of the optimization information table 107, the block information table 108, and the reference information table 109, and the operand of the intermediate code 110 that has not been determined by forward reference is resolved into an object code. Is created, and the object code is output by the object file output unit 113.

The details of each of the symbol table 106, the optimization information table 107, the block information table 108, the reference information table 109, and the intermediate code 110 will be described with reference to FIG.

First, when n symbol definitions, m optimization pseudo-instructions, and k symbol references are described in the input assembler source, the symbol table 130
1 has n symbol entries (13011 to 1301)
n) is created, m optimization information entries (13021 to 1302m) are created in the optimization information table 1302, and (m + 1) is created in the block information table 1303.
Block information entries (13031 to 1303 (m
+1)) is created, and k is added to the reference information table 1304.
Pieces of reference information entries (13041 to 1304k) are created.

Symbol entries (13011 to 1301)
n) is an entry having information on the defined symbol, and has an address value at which the symbol is defined. The optimization information entries (13021 to 1302m) are entries having information required for optimization, and have information on which instruction the optimization pseudo instruction has been replaced with. Block information entry (13031 to 1303 (m +
1)) is an entry having information on a block, the number of reference information in the block, a pointer to a reference information entry generated by a forward reference described at the head of the block, and a description at the head of the block. The pointer to the optimization information entry generated by the optimized optimization pseudo instruction and the intermediate code 1305 at the beginning of the block
And the size of the intermediate code 1305 of the block. However, when the block is the head of the segment, the pointer to the optimization information entry has NULL. Reference information entry (13041 to 1304k)
Is an entry for resolving a symbol reference, and a pointer to the referring symbol entry and an intermediate code 1
It has a pointer to a position in 305 where a symbol reference is made.

Next, FIG. 4 shows a flowchart of the syntax analysis process of the syntax analysis unit 105.

First, syntax analysis is performed in syntax processing 1401. If the analyzed syntax is an instruction, an intermediate code is generated, and then an optimization pseudo instruction determination process 1402 is performed. If the syntax is an optimization pseudo instruction, branch information generation processing 1403 is performed; otherwise, segment pseudo instruction determination processing 1404 is performed.

In the branch information generation processing 1403, an optimization information entry is generated in the optimization information table 107.
Next, block information generation processing 1405 is performed. In the segment pseudo instruction determination processing 1404, if the syntax is a segment pseudo instruction, block information generation processing 1405 is performed.
Otherwise, an undefined definition reference determination process 1406 is performed. In block information generation processing 1405, a block information entry is generated in the block information table 108, and
Next, an undefined reference determination process 1406 is performed. In the reference information generation processing 1407, a reference information entry is generated in the reference information table 109, and then an end determination processing 1408 is performed. In the end determination processing 1408, it is determined whether or not the syntax still exists.
Return to, otherwise terminate the parsing. The optimization processing unit 111 performs optimization using the branch pseudo information, and determines the address of the symbol in the symbol table 106 to be the optimum.

Next, referring to FIG. 5 showing a flowchart of the code generation processing section 112,
2 processes the block information entries in the block information table 108 one by one from the top. First, code generation end determination processing 1501 is performed. In the code generation end determination processing 1501, it is determined whether or not there is a block information entry at the block information reference position. If so, the reference information reference position setting processing 1502 is performed. Otherwise, the code generation processing 112 is ended. In the reference information reference position setting processing 1502, a pointer to the reference information entry of the referenced block information is set at the reference position of the reference information, and the reference in the block of the block information referenced by the remaining number of reference information is set. The number of pieces of information is set, and reference information end determination processing 1503 is performed. Reference information end determination processing 1503
Then, it is determined whether or not there is still a reference information entry. If the remaining number of reference information is 0, optimization information determination processing 1506 is performed. Otherwise, reference information processing 1504 is performed.

The reference information processing 1504 extracts an address value from the symbol pointed to by the reference information currently being referenced, embeds the address value at the position of the intermediate code pointed to by the reference information, and resolves the address. Reference position change processing 1505 is performed. In the reference information reference position change processing 1505, the reference information reference position is changed to the position of the next reference information entry, the remaining number of reference information is reduced by one, and the process returns to the reference information determination processing 1503. In the optimization information determination processing 1506, if the pointer to the optimization information entry of the block information referred to is not NULL, the optimization information processing 1507 is performed. If the pointer is NULL, the code output processing 1508 is performed.

The optimization information processing 1507 outputs, as an object code, an instruction to replace the optimization information entry pointed to by the referred block information, and performs a code output process 1508. Code output processing 1508
Then, from the position of the intermediate code pointed to by the referring block information, only the size of the intermediate code held by the block information referencing the intermediate code is output as the object code, and the process returns to the code generation end determination processing 1501.
The operation when the assembler source shown in FIG. 6 is input will be described as a specific example.

FIG. 6 shows a three-line assembler source in which "lab:" is a label definition instruction and "mov A,
"lab" is the object code "10XX",
A "brlab" optimization pseudo-instruction, which is replaced with a short-code branch instruction when the object code "01X
X ". "End" is an end pseudo instruction which indicates the end of the syntax. However, it is assumed that XX contains the relative address of lab.

FIG. 7 shows the symbol table 106, the optimization information table 107, the block information table 108, the reference information table 109, and the intermediate code 110 after the optimization processing 111 has been completed.

The symbol table 1701 has a symbol entry 17011, and the symbol entry 17011 has an address value 2 in which a label is defined. The optimization information table 1702 has an optimization information entry 17021, and has information that the optimization pseudo-instruction of the optimization information entry 17021 is replaced by a short code branch instruction. The block information table 1703 has a block information entry 17031 and a block information entry 17032. The block information entry 17031 is the number of reference information 1
And a pointer to the reference information entry 17041 and the size 2 of the intermediate code. Block information entry 17032
Has a reference information number 0, a pointer to the optimization information entry 17021, and an intermediate code size 0. The reference information table 1704 has a reference information entry 17041, and the reference information entry 17041 stores a pointer to the symbol entry 17011 being referred to and two of the intermediate code 1710.
Points to the byte.

Next, the operation of the code generation processing unit 112 will be described. First, code generation end determination processing 1501 is performed. In the code generation end determination processing 1501, it is determined whether or not there is still block information at the block information reference position, and reference information reference position setting processing 1502 is performed. In the reference information reference position setting processing 1502, a pointer to the reference information entry 17041 of the block information 17021 referred to in the reference position of the reference information is set, and the block information referred to in the remaining number of reference information has The reference information number 1 in the block is set, and reference information end determination processing 1503 is performed.

In reference information end determination processing 1503, it is determined whether or not there is still a reference information entry.
Perform 504. In the reference information processing 1504, the symbol entry 170 indicated by the reference information entry 17031
The address value 0 is extracted from the address 11, the address value is embedded in the position of the intermediate code pointed to by the reference information, the reference is resolved, and the reference information reference position change processing 1505 is performed. In the reference information reference position change processing 1505, the remaining number of reference information is reduced by one to 0, and the process returns to the reference information end determination processing 1503. In reference information end determination processing 1503, it is determined whether or not there is a reference information entry, and optimization information determination processing 1506 is performed.

In the optimization information determination processing 1506, it is determined whether or not the pointer to the optimization information entry of the block information referred to is NULL, and here, since the pointer is NULL, the optimization information processing 1507 is performed and the code output processing 1508 is performed. . In the code output processing 1508, an intermediate code is output from the position of the intermediate code pointed to by the referenced block information as an object code with a size of 2 bytes of the intermediate code held by the referenced block information, and the code generation ends. The process returns to the determination processing 1501. In the code generation end determination processing 1501, it is determined whether or not there is still block information at the block information reference position, and reference information reference position setting processing 1502 is performed.

In the reference information reference position setting 1502, the number 0 of reference information in the block of the block information entry 17032 which is referred to the remaining number of reference information referred to the reference position of the reference information is set, and the reference is set. Information end determination processing 1
Perform 503. In reference information end determination processing 1503, it is determined whether or not there is a reference information entry, and reference information processing determination processing 1506 is performed. Optimization information determination processing 15
At 06, it is determined whether or not the referenced block information has a pointer to the optimization information entry, and the optimization information processing 1507 is performed. The optimization information processing 1507 outputs, as an object code, an instruction to replace the optimization information entry 17021 pointed to by the referred block information entry 17032, and outputs the code.
Perform 508. In the code output process 1508, the intermediate code is output as an object code from the position of the intermediate code pointed to by the referenced block information by the size of the intermediate code held by the referenced block information. Since the size of the intermediate code is 0 bytes, the process returns to the code generation end determination processing 1501. In the code generation end determination processing 1501, it is determined whether or not there is still a block information entry at the block information reference position, and the code generation processing 112 ends.

Next, an assembler processing method according to the second embodiment of the present invention will be described.

Referring to FIG. 8, the assembler processing method of the present embodiment employs a source file 180 as an input file.
1 and an assembler 1802 that performs assembling processing;
An object file 1803 serving as an output file is provided.

In the assembler 1802, the source file input unit 1804 reads the source file 1801 first. Next, the content read by the syntax analysis unit 1805 is analyzed, and a symbol table 1806, an optimization information table 1807, and a reference information table 1808 are created, and an intermediate code 1809 is created based on the analyzed content. Optimization information generating section 18051 in parsing section 1805
When the instruction is a syntax optimization instruction, an optimization information entry is created in the optimization information table 1807.

After the completion of the syntax analysis, the optimization processing unit 1810 performs a symbol table 1806 and an optimization information table 180
7 is optimized using the symbol table 18
06 is updated. After the optimization process is completed, the code generation processing unit 1811 solves the optimization pseudo instruction using each of the symbol table 1806, the optimization information table 1807, and the reference information table 1808 to create an object code. The data is output by the object file output unit 1812.

FIG. 9 shows details of the symbol table 1806, the optimization information table 1807, the reference information table 1808, and the intermediate code 1809.

When n symbol definitions, m optimization pseudo-instructions, and k symbol references are described in the input assembler source, the symbol table 1901 has n symbol entries (19011-1901n). ) Is created, m optimization information entries (19021 to 1902m) are created in the optimization information table 1902, and k reference information entries (19031 to 1903k) are created in the reference information table 1903.

The symbol entry (19011-1901)
n) is an entry having information on the defined symbol, and has an address value at which the symbol is defined. The optimization information entries (19021 to 1902m) are entries having information necessary for optimization, and include information on which instruction the optimization pseudo instruction has been replaced with and reference information generated by the optimization instruction. Have a pointer. The reference information entry (19031 to 1903k)
This is an entry for resolving a symbol reference, and has a reference type, a pointer to the symbol entry being referred to, and a pointer to a position in the intermediate code 1904 where the symbol reference is performed. A reference type is an identifier of an instruction generated by an optimization pseudo instruction for an entry whose reference is an optimization pseudo instruction, or an identification value indicating that the reference is not an entry by an optimization pseudo instruction. enter.

FIG. 10 shows a flowchart of the syntax analysis process of the syntax analysis unit 1805.

Referring to FIG. 10, syntax analysis is performed in syntax processing 2001. If the analyzed syntax is an instruction, an intermediate code is generated, and then an undefined reference determination process 2002 is performed. Undefined reference determination processing 2
In 002, if there is an undefined reference symbol in the operand, an optimization pseudo-instruction determination process 2003 is performed; otherwise, an end determination process 2006 is performed. Next, an optimization pseudo instruction determination process 2003 is performed. If the syntax is an optimization pseudo instruction, an optimization information generation process 2004 is performed; otherwise, a reference information generation process 2005 is performed. In the optimization information generation process 2004, an optimization information entry is generated in the optimization information table 1807, and the reference information generation process 2005 is performed. In the reference information generation processing 2007, a reference information entry is generated in the reference information table 1808, and then the end determination processing 2008 is performed. In the end determination process 2008, it is determined whether or not there is a syntax. If there is a syntax, the process returns to the syntax process 2001; otherwise, the syntax analysis ends. The optimization processing unit 1810 performs optimization using the branch pseudo information, and
The address of the symbol 06 is determined to be optimized, and the reference type of the reference information entry in the reference information table 1807 is determined.

Referring to FIG. 11 which shows a flowchart of the code generation processing step of the code generation processing section 1811, the code generation processing section 1811 processes reference information entries in the reference information table 1808 one by one from the top.
First, code generation end determination processing 2101 is performed. In the code generation end determination process 2101, it is determined whether or not there is a reference information entry.
02, otherwise terminate the end process 2106. In the reference type determination process 2102, if the reference type in the reference information being referred to includes an identification value whose reference is not an entry by an optimization pseudo instruction, the reference resolution process 2102
103 is performed, and if not, an object output process 2104 is performed. In the reference decision processing 2103, an address value is extracted from the symbol indicated by the reference information, the address value is embedded in the position of the intermediate code indicated by the reference information, the address is resolved, and the process returns to the code generation end determination processing 2101.

In the object output process 2104, the object code is output up to the position of the symbol reference in the intermediate code 1904 pointed to by the reference information being referred to, and the instruction generation process 2105 is performed. In the instruction generation processing 2105, an instruction is generated according to the reference type in the reference information being referred to, and the code generation end determination processing 21
Return to 01. In the end processing 2106, the object code in the intermediate code 1904 that has not been output is output, and the code generation processing ends.

[0067]

As described above, the assembling time of the conventional optimizing assembling is (the time required for parsing) + (the time required for optimizing) + (the time required for analyzing the intermediate language). The assembling processing time of the optimization assembling according to the present invention is (time required for syntax analysis) + (time required for optimization processing) + (time required for code generation processing).

In any case of the intermediate language analysis, the processing for each line is performed, whereas the code generation processing only needs to solve the part where the reference is made. The time is longer than this time, and the assembler processing method according to the present invention can perform assembling in a shorter time. By reducing this time, the execution time can be reduced from (1 / 1.5) to (1/2) times.

[Brief description of the drawings]

FIG. 1 is a system block diagram of an assembler processing method according to a first embodiment of the present invention.

FIG. 2 is a diagram showing an assembler source.

FIG. 3 shows a symbol table, an optimization table, a block information table, a reference information table,
FIG. 4 is a diagram showing an intermediate code.

FIG. 4 is a flowchart of a syntax analysis process of a syntax analysis unit according to the first embodiment of the present invention shown in FIG. 1;

FIG. 5 is a flowchart of a code generation process of a code generation processing unit according to the first embodiment of the present invention shown in FIG. 1;

FIG. 6 is a diagram showing an assembler source.

FIG. 7 is a diagram illustrating a symbol table, an optimization table, and an optimization table when the optimization processing according to the first embodiment of the present invention illustrated in FIG. 1 is completed;
It is a figure showing a block information table, a reference information table, and an intermediate code.

FIG. 8 is a system block diagram of an assembler processing method according to a second embodiment of the present invention.

FIG. 9 is a diagram showing a symbol table, an optimization information table, and a reference information table intermediate code according to the second embodiment of the present invention shown in FIG.

FIG. 10 is a flowchart of a syntax analysis step of the syntax analysis unit according to the second embodiment of the present invention shown in FIG. 8;

FIG. 11 is a flowchart of a code generation process of a code generation processing unit according to the second embodiment of the present invention shown in FIG.

FIG. 12 is a system block diagram of a conventional assembler processing method.

FIG. 13 is a diagram showing a symbol table, reference information, and an intermediate code in a conventional assembler processing method.

FIG. 14 is a flowchart of a syntax analysis step of a syntax analysis unit in a conventional assembler processing method.

FIG. 15 is a flowchart of an operand determination processing step of an operand determination processing unit of a conventional assembler processing method.

FIG. 16 is a system block diagram of a conventional second assembler processing method.

FIG. 17 is a diagram showing intermediate data.

FIG. 18 is a flowchart of a syntax analysis step of the syntax analysis of the second conventional assembler processing method.

FIG. 19 is a flowchart of an intermediate data analysis step of the intermediate data analysis unit in the second conventional assembler processing method.

FIG. 20 is a diagram showing an assembler source.

FIG. 21 is a diagram showing intermediate data.

[Explanation of symbols]

101 source file 102 assembler 103 object file 104 source file input unit 105 syntax analysis unit 1051 optimization information generation unit 1052 block processing unit 106 symbol table 107 optimization information table 108 block information table 109 reference information table 110 intermediate code 111 optimization processing Part 112 code generation processing part 113 object file output part 201 source file 202 assembler 203 object file 204 source file input part 205 syntax analysis part 206 symbol table 207 reference information table 208 intermediate code 209 operand determination processing part 210 object file output part 301 Symbol table 302 Reference information table 3011 to 301n Symbol entry Birds 3021 to 302k Reference information entry 303 Intermediate code 401 Syntax processing 402 Forward reference determination processing 403 Reference information generation processing 404 End determination processing 501 Reference information end determination processing 502 Reference information determination processing 503 Reference position change processing 601 Source file 602 Assembler 603 Object File 604 Source file input section 605 Syntax analysis section 6051 Optimization information generation processing 606 Symbol table 607 Optimization information table 608 Intermediate data 609 Optimization processing section 610 Intermediate data analysis section 611 Object file output section 701 Intermediate data 7011-701n Token entry 801 syntax processing 802 semantic analysis processing 803 intermediate language data creation processing 804 end determination processing 901 syntax processing 902 semantic analysis processing 9 3 End determination processing 1101 Intermediate data 1101 to 1104 Token entry 1201 to 120 (n + 1) block 1301 Symbol table 13011 to 1301n Symbol entry 1302 Optimization information table 13021 to 1302m Optimization information entry 1303 Block information table 13031 to 1303 (m + 1) block Information entry 1304 Reference information table 13041 to 1304k Reference information entry 1305 Intermediate code 1401 Syntax processing 1402 Optimization pseudo instruction determination processing 1403 Optimization information generation processing 404 Segment boiling instruction determination processing 1405 Block information generation processing 1406 Undefined reference determination processing 1407 Reference information generation processing 1408 End determination processing 1501 Code generation end determination processing 1502 Reference information reference Reference position setting processing 1503 Reference information end determination processing 1504 Reference information processing 1505 Reference information reference position change processing 1506 Optimization information determination processing 1507 Optimization information processing 1508 Code output processing 1701 Symbol table 17011 Symbol entry 1702 Optimization information table 17021 Optimization Information entry 1703 block information table 17031 to 1703n block information entry 1704 reference information table 17041 reference information entry 1801 source file 1802 assembler 1803 object file 1804 source file input unit 1805 syntax analysis unit 18051 optimization information generation unit 1806 symbol table 1807 optimization information Table 1808 Reference information table 1809 Intermediate code 1810 Optimal Processing unit 1811 Code generation processing unit 1812 Object file output unit 1901 Symbol table 19011 to 1901n Symbol entry 1902 Optimization information table 19021 to 1902m Optimization information entry 1903 Reference information table 19031 to 1903k Reference information entry 1904 Intermediate code 2001 Syntax processing 2002 Not yet Definition reference determination processing 2003 Optimization pseudo instruction determination processing 2004 Optimization information generation processing 2005 Reference information generation processing 2006 End determination processing 2101 Code generation end determination processing 2102 Reference type determination processing 2103 Reference resolution processing 2104 Object output processing 2105 Instruction generation processing 2106 End processing

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G06F 9/44, 9/45

Claims (2)

(57) [Claims] 1. A a process of reading the input data to generate optimization information table for each product to optimize instruction reference information each time the predetermined syntax refers to the symbol table the structure
And parsing step statement creates an intermediate code from the input <br/> force data to generate block information when optimization directives, the optimization in correspondence with each of the symbol table and the optimization information table An optimization processing step of optimizing the number of steps of the instruction; and the intermediate step in which the block information points to the solution of an undecided operand in the intermediate code.
The size of the block information from the position of the code
Code generation processing performed only for the minutes, and the code generation processing
Output the object code generated in the process
A method of outputting an object file . 2. The syntax analysis step includes: a syntax processing step of generating an intermediate code when the syntax is an instruction; and an optimization pseudo-instruction determination processing step of determining whether the syntax is the optimization pseudo-instruction. and branch information generation processing step of the syntax by the optimization directives determination process step is executed when the optimization directive, and segment directives determination processing step of determining whether the syntax segment directive or the A block pseudo-instruction determining step in which the syntax is executed when the syntax is a segment pseudo-instruction; an undefined reference determining step of determining whether the operand of the syntax includes an undefined reference symbol; A reference information processing step to be executed when there is an undefined reference symbol in the operand of the syntax. 2. The assembler processing method according to claim 1, further comprising: