JP2994934B2 - Wiring formation method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a wiring formed on an integrated circuit or the like.

[0002]

2. Description of the Related Art As the integration density of integrated circuits increases, the current density of wiring formed on a substrate tends to increase. When an Al (aluminum) film is used as a wiring, a defect called a void occurs in the Al film due to a phenomenon called so-called electromigration, or the void expands and the wiring breaks. The electromigration refers to Al
This is a phenomenon in which atoms diffuse in the Al film. In the case of Al, since the diffusion speed is relatively high, the voids are generated even when the Al is left alone in a normal temperature atmosphere. Further, when the density of the current flowing in the wiring increases, the temperature of the Al film increases. Al
When the temperature of the film increases, the above-mentioned phenomenon becomes more remarkable, and the frequency of occurrence of defects and disconnections increases. In order to solve the above-mentioned inconvenience, Cu (copper) having lower resistance, higher heat resistance and less likely to cause electromigration is used instead of Al.

FIG. 8 is a sectional view showing step by step a method of forming a Cu wiring 1 according to a first conventional example. For example, on one surface of a substrate 2 realized by a silicon substrate, FIG.
The insulating film 3 is formed as shown in FIG. On the surface of the insulating film 3, a Cu film 4 is formed as shown in FIG. A resist film 5 is formed on the surface of the Cu film 4.
The resist film 5 is formed on substantially the entire surface of the Cu film 4, and is exposed to a predetermined wiring pattern and developed to form a pattern as shown in FIG. 8C. Next, the exposed Cu film 4 is etched, and the remaining resist film 5 is peeled off, so that the Cu film 4 shown in FIG.
Is formed as shown in FIG.

When etching the Cu film 4, a dry etching method is used in the prior art. This is because in an integrated circuit or the like, it is required to further reduce the width and the interval of the wiring. A dry etching method having excellent properties is used.

FIG. 9 is a sectional view showing step by step a method of forming a Cu wiring 8 according to a second conventional example. The second conventional example is formed almost in the same manner as the first conventional example, except that a diffusion prevention film 6 is formed between the insulating film 3 and the Cu wiring 8.
Another difference is that the diffusion preventing film 7 is also formed on the surface 4a of the Cu wiring 8. That is, the Cu wiring 8 is formed as follows. In FIG. 9, the same members as those in the first conventional example are denoted by the same reference numerals.

An insulating film 3 is formed on one surface of the substrate 2 as shown in FIG.
As shown in FIG. 9B, the diffusion preventing film 6 is formed. The Cu film 4 is formed on the surface of the diffusion prevention film 6 as shown in FIG.
As shown in (4), the diffusion prevention film 7 is formed. On the surface of the diffusion preventing film 7, a resist film 5 is formed. The resist film 5 is formed as shown in FIG.
The pattern is formed as shown in (5). Next, the exposed diffusion preventive film 7 is formed with the Cu film 4 formed immediately below.
By removing the resist film 5 together with the diffusion prevention film 6 and the dry etching method, and removing the remaining resist film 5, the Cu wiring 8 shown in FIG. 9 (6) is formed.

[0007] The diffusion preventing film 6 is composed of Cu
, For example, to prevent T
This is realized by an iN film. The diffusion preventing film 7 is made of Cu
This is to prevent diffusion of Cu atoms into the insulating film when an insulating film is further provided on the wiring 8 to form a multilayer wiring structure. For this reason, similarly to the diffusion prevention film 6, it is realized by, for example, a TiN film. When the diffusion of Cu atoms occurs, a defect or disconnection occurs in the Cu wiring 8, so that the performance as the Cu wiring is lowered and the reliability is lowered.

[0008]

As described above, in the conventional Cu wirings 1 and 8, the Cu film 4 is patterned by dry etching. Reactive products such as copper chloride generated when patterning the Cu film 4 by dry etching have a low vapor pressure. Therefore, it is necessary to increase the temperature of the stage holding the substrate 2 in order to remove the reactive products. If the temperature of the stage is increased, it becomes difficult to control the temperature uniformity in the stage. If the temperature uniformity is poor, reactive products will remain, corrosion due to the reactive products will occur, and if the corrosion spreads to the Cu wirings 1 and 8, the performance as Cu wiring will be reduced. Occurs. In addition, since the time required for heating and cooling becomes long, it takes time to manufacture.

Further, according to the second conventional example, the Cu wiring 8
Is not provided with a diffusion prevention film. Therefore, when an insulating film is provided on the Cu wiring 8 in order to form a multilayer wiring structure, Cu atoms diffuse from the side surface into the insulating film. Diffusion of Cu atoms is not preferable because the performance as a Cu wiring is reduced due to the above-described inconvenience.

An object of the present invention is to provide a method for forming a wiring which is highly reliable, can be formed easily and efficiently.

[0011]

According to the present invention, there is provided a method of forming an insulating film on a surface of a substrate, a step of forming a recess in a predetermined wiring pattern on the insulating film; Depositing Cu by a predetermined thickness from the surface where the recess is not formed to form a Cu film; and forming the Cu film into a recess of the insulating film from the surface of the Cu film. A method for forming a wiring, comprising: a step of oxidizing by a thickness up to a non-existing surface; and a step of removing the oxidized Cu film.

The present invention also provides a step of forming an insulating film on a substrate surface, a step of forming a recess in a predetermined wiring pattern on the insulating film, and a step of forming a C along the insulating film surface.
forming a diffusion barrier film for preventing u from diffusing into the insulating film; and a surface of the diffusion barrier film formed on the surface of the diffusion barrier film where no recess is formed in the insulating film. Depositing Cu by a predetermined thickness to form a Cu film, and oxidizing the Cu film by a thickness from a surface of the Cu film to a surface of the insulating film where no recess is formed. And removing the oxidized Cu film, and removing the diffusion barrier film exposed by removing the oxidized Cu film.

[0013]

According to the present invention, an insulating film is formed on a substrate surface,
Forming a recess in a predetermined wiring pattern on the insulating film, forming a Cu film by depositing Cu by a predetermined thickness from the surface where the recess is not formed on the insulating film surface,
The Cu film is oxidized by a thickness from the surface of the Cu film to the surface of the insulating film where the recess is not formed, and the wiring is formed by removing the oxidized Cu film.

The Cu film is formed in a pattern without using a dry etching method as in the prior art. For this reason, it is not necessary to consider the temperature uniformity of the stage holding the substrate, and corrosion due to residual reactive organisms due to poor temperature uniformity does not occur, and the performance as a wiring does not decrease. Further, heating and cooling of the stage are not required, and it is possible to improve manufacturing efficiency. Therefore, highly reliable wiring can be easily and efficiently formed.

According to the invention, an insulating film is formed on the surface of the substrate, a recess is formed in the insulating film in a predetermined wiring pattern, and Cu diffuses along the surface of the insulating film into the insulating film. Forming a diffusion prevention film for preventing diffusion, and a predetermined thickness of Cu from the surface of the diffusion prevention film formed on the surface of the diffusion prevention film where the recess of the insulating film is not formed.
Depositing a Cu film, oxidizing the Cu film by a thickness from the surface of the Cu film to the surface of the insulating film where the recess is not formed, removing the oxidized Cu film, Wiring is formed by removing the diffusion prevention film exposed by removing the oxidized Cu film.

An anti-diffusion film is formed between the wiring formed by patterning the Cu film and the insulating film. Since the diffusion preventing film prevents Cu atoms from diffusing into the insulating film, wiring defects and disconnections caused by Cu atoms diffusing into the insulating film are eliminated. Therefore,
The reliability of the wiring is further improved.

[0017]

FIG. 1 is a process chart showing a method for forming a Cu wiring 11 according to a first embodiment of the present invention. FIG. 2 is a sectional view showing step by step the method of forming the Cu wiring 11.

In step a1, an insulating film 13 is formed on one surface of the substrate 12, as shown in FIG. The substrate 12 is realized by a silicon substrate on which desired elements such as capacitors and transistors are formed. The insulating film 13 is realized by, for example, a SiO ₂ film and is formed by CVD (C
The film is formed to a thickness of 1.5 μm by a chemical vapor deposition method.

In step a2, a trench 14 as a recess is formed on the surface of the insulating film 13 as shown in FIG. The trench 14 is formed in a predetermined wiring pattern shape, for example, by forming a resist film on the surface of the insulating film 13, etching the insulating film 13 by a dry etching method, and removing the resist film. . The depth d1 of the trench 14 is set to, for example, 0.5 μm, and the width d2 of the trench 14 is set to, for example, 0.5 μm. The depth d1 and the width d2 of the trench 14 are appropriately selected depending on the wiring to be formed.

In step a3, a Cu film 16 is formed on the surface of the insulating film 13 as shown in FIG. In the present embodiment, Cu is formed by cold-wall CVD.
The insulating film 13 was deposited so that the thickness d3 from the surface where the trench 14 was not formed to the surface of the Cu film 16 was 0.6 μm. According to this method, Cu is uniformly deposited on the entire surface of the insulating film 13 and C
u is deposited. By selecting the thickness of Cu to be deposited, that is, the thickness d3 to be equal to or more than half the width d2 of the trench 14, the surface of the formed Cu film 16 is substantially flattened. This is because, as described above, Cu is the insulating film 13.
This is because they are uniformly deposited from the entire surface.

The cold-wall type CVD method is a method in which the temperature of only the substrate is increased and the temperature of the side walls in the chamber is kept at a relatively low temperature. According to this method, the Cu film can be formed only on the substrate, and the controllability of the thickness is improved. Here, Cu (hfac) TMVS (Copperhexa) is used as a film material for forming the Cu film.
Using fluoroacetylacetonate trimethylvinylsilane), H ₂ is used as a carrier gas. Further, the substrate temperature was set to 200 ° C., the H ₂ flow rate was set to 800 cc / min,
The pressure was set to 40 Torr.

In step a4, the Cu film 16 is
6 is oxidized by the thickness from the surface of the insulating film 13 to the surface of the insulating film 13 where the trench 14 is not formed, that is, the thickness d3. In this embodiment, the substrate 12 on which the Cu film 16 is formed is heated to 200 ° C., and is oxidized by holding the substrate 12 in an O ₂ / N ₂ mixed gas. Since this oxidation proceeds from the surface of the Cu film 16 in the thickness direction, the process ends when the oxidation proceeds by the thickness d3. Therefore, FIG.
As shown in (4), only the Cu film 16 formed above the surface of the insulating film 13 where the trenches 14 are not formed is oxidized to become the copper oxide film 17.

In step a5, the copper oxide film 17 is removed as shown in FIG. The removal of the copper oxide film 17
For example, it is removed by dipping in an acidic aqueous solution such as an aqueous solution of HCl or an aqueous solution of H ₂ SO ₄ and dissolving copper oxide.
Since only copper oxide dissolves in the acidic aqueous solution, the Cu film 16 formed in the trench 14 is not removed. Thus, the Cu wiring 11 is formed.

As described above, in this embodiment, since the Cu film 16 is patterned without using a dry etching method as in the conventional example, it is not necessary to consider the temperature uniformity of the stage holding the substrate. Corrosion does not occur due to the remaining reactive products due to poor uniformity, and the performance as a wiring is not reduced. Further, heating and cooling of the stage are not required, and it is possible to improve manufacturing efficiency. Therefore, it is possible to easily and efficiently form the highly reliable Cu wiring 11.

In step a5, copper oxide is dissolved in an acidic aqueous solution. Therefore, all unnecessary copper can be recovered.

FIG. 3 shows a second embodiment of the present invention.
FIG. 4 is a process chart showing a method for forming a wiring 19. FIG.
Is a cross-sectional view showing step by step a method of forming the Cu wiring 19; The method of forming the second embodiment is substantially the same as the forming method of the first embodiment, but is characterized in that the diffusion preventing film 15 is formed. In FIG. 4, the same members as those in the first embodiment are denoted by the same reference numerals.

In step b1, an insulating film 13 is formed on one surface of the substrate 12, as shown in FIG. The insulating film 13 is formed in the same manner as in the step a1.

In step b2, a trench 14 is formed on the surface of the insulating film 13 as shown in FIG. The trench 14 is formed in the same manner as in the step a2.

In step b3, as shown in FIG. 4C, a diffusion preventing film 15a is formed on the surface of the insulating film 13 where the trench 14 has been formed. In this embodiment, the diffusion prevention film 1
As 5a, a TiN film was formed. The TiN film is DC
The film was formed to a thickness of 0.1 μm by a reactive sputtering method using a (direct current) magnetron sputtering apparatus.
Here, a mixed gas of Ar and N ₂ was used as a gas used during sputtering, and the Ar / N ₂ partial pressure ratio was set to 2/3. Titanium (Ti) was used as a target. Further, the DC power is set to 5000 W, and the substrate temperature is set to 2 W.
The temperature was set to 00 ° C., and the pressure was set to 4 mTorr. The diffusion preventing film 15a is formed along the shape of the trench 14.

In step b4, a Cu film 16 is formed on the surface of the diffusion preventing film 15a as shown in FIG.
The Cu film 16 is formed in the same manner as in the step a3, and the thickness d3 from the surface of the diffusion prevention film 15a formed on the surface of the insulating film 13 where the trench 14 is not formed to the surface of the Cu film 16 is reduced. It is formed to have a thickness of 0.6 μm.

In step b5, the Cu film 16 is
6 is oxidized by the thickness d4 from the surface of the insulating film 13 to the surface where the trench 14 is not formed. This oxidation is performed in the same manner as in the step a4, and a copper oxide film 17 is formed as shown in FIG.

In step b6, the copper oxide film 17 is removed as shown in FIG. The removal of the copper oxide film 17
This is performed in the same manner as in the step a5. In this way,
The Cu wiring 19 is formed.

In step b7, a diffusion preventing film 15b is formed on the exposed surface of the Cu wiring 19 as shown in FIG. The anti-diffusion film 15b is formed of the anti-diffusion film 15a.
Is realized by a TiN film in the same manner as described above.
It is formed to a thickness of 1 μm. The diffusion preventing film 15b
May be formed only on the exposed surface of the Cu wiring 19 as in the present embodiment, or may be formed on the exposed surface of the Cu wiring 19 and the surface of the diffusion prevention film 15a. The diffusion prevention film 15b and the diffusion prevention film 15a serve as the diffusion prevention film 15.

In step b 8, the diffusion preventing film 15 is patterned so as to surround the Cu wiring 19. That is, FIG.
As shown in (8), the diffusion prevention film 1 on the Cu wiring 19
The resist film 18 is patterned on the surface of the substrate 5, and the diffusion preventing film 15 where the resist film 18 is not formed is removed by, for example, a dry etching method. Further, the resist film 18 is removed as shown in FIG.

As described above, the Cu wiring 19 of this embodiment is
Since it is surrounded by the diffusion prevention film 15, the C
The diffusion of u atoms into the insulating layer 13 can be prevented. Therefore, it is possible to easily and efficiently form the highly reliable Cu wiring 19 without any defect or disconnection.

The diffusion preventing film 15 is for preventing the diffusion of Cu atoms, and any material having such a function may be used. As 15, a tungsten film or a tantalum film can be used instead of the TiN film. The material of the diffusion prevention film 15 is selected based on, for example, the diffusion coefficient of each material.

In this embodiment, the diffusion preventing film 15 is made of Ti
An N film was used. Although TiN, tungsten and tantalum have a higher resistance value than Cu, they have conductivity, so in this embodiment, TN surrounding the Cu wiring 19 is used.
The TiN film other than the iN film was removed.

When the Cu wiring 19 is a wiring formed on the uppermost layer on the substrate 12, a protective film called a passivation film is generally provided to prevent the wiring and other elements from being deteriorated by water or oxygen. Can be In this embodiment,
Although the diffusion preventing film 15b was formed also on the surface of the Cu wiring 19 exposed by removing the copper oxide film 17,
For example, when a material having a function of a diffusion prevention film such as silicon nitride is used as the passivation film, the diffusion prevention film 15b may be omitted.

When another wiring is provided on the Cu wiring 19, an interlayer insulating film is provided on the Cu wiring 19. In this case, in order to prevent the diffusion of Cu atoms into the interlayer insulating film, a diffusion preventing film 15b is provided on the Cu wiring 19 as in this embodiment.

FIG. 5 is a circuit diagram showing an example of the circuit 21 formed on the P-type silicon substrate 25. FIG. 6 is a sectional view showing a wiring 26 formed according to the present invention on a P-type silicon substrate 25 on which the circuit 21 is formed.
The circuit 21 includes a capacitor 22, a transistor 23, and a resistor 24. On one surface of the P-type silicon substrate 25, an N ⁺ layer 27, an N layer 28, and an N ⁺ layer 29 are laminated in this order to form the capacitor 22. Also, the N ⁺ layer 3
0, an N layer 31, a P layer 32, and N ⁺ layers 33 and 34 are laminated in this order to form the transistor 23. Further, an N ⁺ layer 35, an N layer 36, and a P layer 37 are laminated in this order to form the resistor 24. On one surface of the substrate 25 on which the capacitor 22, the transistor 23 and the resistor 24 are formed, an insulating film 38 and a Cu wiring 26 are formed based on the present embodiment.

The Cu wirings 26a to 26e shown in FIG.
Respectively correspond to the wirings 26a to 26e shown in FIG. The capacitor 22 and the transistor 23
They are connected by u wiring 26b. At this time, the trench 39 is formed in the insulating film 38, and is further through hole 40 is formed, the capacitor 22 N ⁺
The layer 29 and the P layer 32 of the transistor 23 are
b. The N ^{+ of} the transistor 23
The layer 33 is also connected to the Cu wiring 26e by forming a through hole 40 in the insulating film 38. Transistor 2
3 is connected to the resistor 24 in the same manner.
The fourth P layer 37 is similarly connected to the Cu wiring 26c.

FIG. 7 is a sectional view showing an example of a multilayer wiring structure 41 formed according to the present invention. The multilayer wiring structure 41 has a three-layer wiring structure. For example, a first wiring layer 42, a second wiring layer 43,
The third wiring layer 44 is formed by laminating in this order. First,
The second and third wiring layers 42 to 44 are each formed of an interlayer insulating film 4.
5, 47, 49 and Cu wirings 46, 48, 50. The Cu wiring 46 of the first wiring layer 42 and the Cu wiring 48 of the second wiring layer 43 are connected by forming a through hole 51 in the interlayer insulating film 47. Similarly, by forming a through hole 52 in the interlayer insulating film 49, the Cu wiring 48 of the second wiring layer 43 and the Cu wiring 50 of the third wiring layer 44 are connected.

[0043]

As described above, according to the present invention, a wiring is formed by patterning a Cu film without using a dry etching method. For this reason, it is not necessary to consider the temperature uniformity of the stage holding the substrate, and it is possible to prevent the remaining reactive organisms from corroding and deteriorating the performance as wiring. In addition, since heating and cooling of the stage are not required, it is possible to improve manufacturing efficiency. Therefore, a highly reliable wiring can be easily and efficiently formed.

Further, according to the present invention, a diffusion preventing film for preventing Cu atoms from diffusing into the insulating film is provided between the wiring and the insulating layer. Therefore, no defect or disconnection occurs in the wiring, and the reliability is further improved.

[Brief description of the drawings]

FIG. 1 is a process chart showing a method for forming a Cu wiring 11 according to a first embodiment of the present invention.

FIG. 2 is a sectional view showing step by step a method of forming the Cu wiring 11;

FIG. 3 is a process chart showing a method for forming a Cu wiring 19 according to a second embodiment of the present invention.

FIG. 4 is a sectional view showing step by step a method of forming the Cu wiring 19;

FIG. 5 is a circuit diagram showing an example of a circuit 21 formed on a P-type silicon substrate 25.

FIG. 6 shows a P-type silicon substrate 2 on which the circuit 21 is formed.
FIG. 5 is a cross-sectional view showing a wiring 26 formed on the fifth embodiment according to the present invention.

FIG. 7 shows a multilayer wiring structure 41 formed according to the present invention.
FIG. 3 is a cross-sectional view showing one example.

FIG. 8 is a sectional view showing step by step a method of forming a Cu wiring 1 according to a first conventional example.

FIG. 9 is a sectional view showing step by step a method of forming a Cu wiring 8, which is a second conventional example.

[Explanation of symbols]

 11, 19, 26, 46, 48, 50 Cu wiring 12 Substrate 13, 38 Insulating film 14, 39 Trench 15, 15a, 15b Diffusion preventing film 16 Cu film 17 Copper oxide film 25 P-type silicon substrate 45, 47, 49 interlayer Insulating film

Claims (2)

(57) [Claims] A step of forming an insulating film on the surface of the substrate; a step of forming a recess in a predetermined wiring pattern on the insulating film; and forming the recess on the surface of the insulating film. Forming a Cu film by depositing Cu by a predetermined thickness from a non-existing surface; And a step of removing the oxidized Cu film. 2. a step of forming an insulating film on the surface of the substrate; a step of forming a recess in a predetermined wiring pattern on the insulating film; and diffusing Cu into the insulating film along the surface of the insulating film. Forming a diffusion barrier film to prevent the diffusion barrier film from being cleaved by a predetermined thickness from the surface of the diffusion barrier film formed on the surface of the diffusion barrier film where the recess of the insulating film is not formed. Depositing a Cu film to form a Cu film; and oxidizing the Cu film by a thickness from a surface of the Cu film to a surface of the insulating film where the recess is not formed. The oxidized Cu film And removing the oxidized Cu film to remove the exposed diffusion barrier film.