JP2990130B2 - Manufacturing method of molded BGA type semiconductor device - Google Patents

Manufacturing method of molded BGA type semiconductor device

Info

Publication number
JP2990130B2
JP2990130B2 JP9295636A JP29563697A JP2990130B2 JP 2990130 B2 JP2990130 B2 JP 2990130B2 JP 9295636 A JP9295636 A JP 9295636A JP 29563697 A JP29563697 A JP 29563697A JP 2990130 B2 JP2990130 B2 JP 2990130B2
Authority
JP
Japan
Prior art keywords
recess
semiconductor device
thin metal
manufacturing
metal wire
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP9295636A
Other languages
Japanese (ja)
Other versions
JPH11135664A (en
Inventor
直人 木村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP9295636A priority Critical patent/JP2990130B2/en
Publication of JPH11135664A publication Critical patent/JPH11135664A/en
Application granted granted Critical
Publication of JP2990130B2 publication Critical patent/JP2990130B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明はBGA型半導体装置
製造方法に関し、特に、モールドBGA型半導体装置
製造方法に関する。
The present invention relates to a BGA type semiconductor device.
It relates to a method of manufacturing, in particular, the mold BGA type semiconductor device
And a method for producing the same.

【0002】[0002]

【従来の技術】従来のBGA[ボールグリッドアレイ
(Ball grid array)]型半導体装置
は、例えば、図4に示すように、半導体チップ1にエラ
ストマ14(緩衝用弾性材)を貼り付け、さらに、銅配
線11を接合したポリイミドテープ13を貼り付け、銅
配線11を半導体チップのパッド2に熱圧着にて接合
し、封止材12にて封止した構造となっている。ここで
は、パッド2が半導体チップの周辺部に設けられている
例を示したが、中央部に設けられているものもある。
2. Description of the Related Art A conventional BGA (Ball grid array) type semiconductor device is, for example, as shown in FIG. A polyimide tape 13 to which the copper wiring 11 is bonded is attached, the copper wiring 11 is bonded to the pad 2 of the semiconductor chip by thermocompression bonding, and the structure is sealed with a sealing material 12. Here, the example in which the pad 2 is provided in the peripheral portion of the semiconductor chip is shown, but there is also a case where the pad 2 is provided in the central portion.

【0003】[0003]

【発明が解決しようとする課題】この従来のBGA型半
導体装置は、エラストマや銅配線を接合したポリイミド
テープが必要であり部品点数が多く高価となる。
The conventional BGA type semiconductor device requires a polyimide tape to which an elastomer or copper wiring is bonded, and requires many parts and is expensive.

【0004】半導体チップの寸法及びパッド配置に応じ
て各種のポリイミドテープを用意しなければならないの
で生産管理が煩雑となる。
Since various polyimide tapes must be prepared according to the dimensions of the semiconductor chip and the arrangement of the pads, production management becomes complicated.

【0005】パッドと銅配線とを熱圧着で接合するが、
接合強度や均一性の実現には困難を伴い、信頼性の確保
が容易でない恨みがある。
[0005] The pad and the copper wiring are joined by thermocompression bonding.
There are difficulties in achieving joint strength and uniformity, and there is a grudge that it is not easy to ensure reliability.

【0006】本発明の目的は、より少ない部品点数で信
頼性を一層容易に確保できるモールドBGA型半導体装
置とその製造方法を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a molded BGA type semiconductor device which can more easily secure reliability with a smaller number of parts and a method of manufacturing the same.

【0007】[0007]

【0008】[0008]

【課題を解決するための手段】 本発明のモールドBGA
型半導体装置の製造方法は、半導体チップを載置する凹
所を備えたセット治具及び前記セット治具の凹所が設け
られている面に前記凹所から第1の所定寸法離れて設置
されるワークを準備し、前記凹所に半導体チップを載置
して固定し、前記半導体チップのパッドと前記ワークと
をワイヤボンディングにより金属細線で接続する工程
と、前記凹所を充填してモールド樹脂を形成する工程
と、前記金属細線をモールド樹脂外で切断し、前記モー
ルド樹脂を選択的に除去して前記金属細線の先端部を露
出させる窪みを形成する工程と、前記窪みを埋めて前記
金属細線に接続する外部端子を形成する工程とを有する
というものである。この場合、ワークが、セット治具の
凹所が設けられている面からそれぞれ第1の高さ及びこ
れより大きい第2の高さにあり、前記凹所から第1の所
定寸法及びこれより大きい第2の所定寸法離れた第1の
平面及び第2の平面を有するようにすることができる。
又、外部端子として、リフロー法で半田ボールを形成す
ることができる。
Means for Solving the Problems] mold BGA of the present invention
The method of manufacturing a semiconductor device includes a set jig provided with a recess for mounting a semiconductor chip, and a set jig provided on a surface of the set jig where the recess is provided at a first predetermined distance from the recess. Preparing a work to be mounted, mounting and fixing a semiconductor chip in the recess, connecting a pad of the semiconductor chip and the work with a thin metal wire by wire bonding, and filling the recess with a mold resin. Forming a recess exposing the tip of the fine metal wire by selectively removing the mold resin and cutting the thin metal wire outside the mold resin; Forming an external terminal connected to the thin wire. In this case, the work is at a first height and a second height larger than the surface where the recess of the set jig is provided, respectively, and is at a first predetermined dimension and larger than the recess from the recess. It may have a first plane and a second plane separated by a second predetermined dimension.
Also, solder balls can be formed as external terminals by a reflow method.

【0009】金属細線を外部端子と直接接続するのでエ
ラストマやポリイミドテープが不要となる。
Since the thin metal wires are directly connected to the external terminals, no elastomer or polyimide tape is required.

【0010】[0010]

【発明の実施の形態】本発明の一実施の形態により製造
されたモールドBGA型半導体装置は、図1(a)、
(b)に示すように、表面にパッド2を有する半導体チ
ップ1をモールド樹脂8で封止し、モールド樹脂8表面
にボール状の外部端子をアレイ状に配置したモールドB
GA型半導体装置において、パッド2上方のモールド樹
脂8の表面部に前述の外部端子(半田ボール10)がパ
ッド2と金属細線3で直接接続されて設けられていると
いうものである。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Manufacturing according to one embodiment of the present invention.
The molded BGA type semiconductor device is shown in FIG.
As shown in (b), a semiconductor chip 1 having pads 2 on its surface is sealed with a mold resin 8 and a mold B in which ball-shaped external terminals are arranged in an array on the surface of the mold resin 8.
In the GA type semiconductor device, the above-mentioned external terminals (solder balls 10) are provided directly on the pad 2 and the thin metal wires 3 on the surface of the mold resin 8 above the pads 2.

【0011】次に、この実施の形態の製造方法について
説明する。
Next, a manufacturing method according to this embodiment will be described.

【0012】図2(a)、(b)に示すように、平面の
方形領域を占有して深さ方向に幅が小さくなる凹所51
を有するセット治具5を準備する。凹所51の深さは半
導体チップ1の厚さより大きく、底面は平坦で、底面に
真空吸着孔7及びエジェクトピン挿入孔61を有してい
る。凹所51から寸法a離れてワーク4を設置する。例
えばステンレス製のワーク4は、高さb、幅cの平面4
1及び高さdの平面42を有している。
As shown in FIGS. 2A and 2B, a recess 51 occupying a rectangular area in a plane and having a width reduced in the depth direction.
Is prepared. The depth of the recess 51 is larger than the thickness of the semiconductor chip 1, the bottom is flat, and the bottom has the vacuum suction hole 7 and the eject pin insertion hole 61. The work 4 is set at a distance a from the recess 51. For example, a stainless steel work 4 has a flat surface 4 having a height b and a width c.
1 and a plane 42 of height d.

【0013】半導体チップ1のパッド2が設けられてい
る表面を上にしてセット治具5の凹所51に載置し、真
空吸着孔7を図示しない排気管に接続して真空吸着して
固定する。半導体チップ1の平面形状が長方形で、その
2つの長辺のそれぞれに沿ってパッド2r1,2r2,
・・・、2l1,2l2,・・・が設けられ、左右の長
辺の間の中央を通る中間線上にもパッド2c1,2c
2,・・・が設けられているものとする。前述の方形領
域が占有する平面52(破線で表示)上に、規則的に配
置された座標点を想定する。この座標点とその近傍に半
田ボールを設けるものとする。座標点の分布は、例え
ば、外部の機関による規格で定められる半田ボールの位
置分布に対応する。パッドの位置分布は、半導体装置の
種類によって必ずしも一定しない。
The semiconductor chip 1 is placed on the recess 51 of the set jig 5 with the surface on which the pads 2 are provided facing upward, and the vacuum suction hole 7 is connected to an exhaust pipe (not shown) to be vacuum-suctioned and fixed. I do. The planar shape of the semiconductor chip 1 is rectangular, and the pads 2r1, 2r2,
,..., 2l1, l2,... Are provided, and pads 2c1, 2c are also provided on an intermediate line passing through the center between the left and right long sides
2,... Are provided. It is assumed that coordinate points are regularly arranged on a plane 52 (indicated by a broken line) occupied by the aforementioned rectangular area. It is assumed that a solder ball is provided at this coordinate point and in the vicinity thereof. The distribution of the coordinate points corresponds to, for example, the position distribution of the solder balls defined by a standard by an external organization. The position distribution of the pads is not always constant depending on the type of the semiconductor device.

【0014】パッドとワークとをワイヤボンディング法
により、金属細線、例えば金線で結ぶ。一の金属細線と
平面52との交点(黒丸印で表示)が前述の一の座標点
を通ることを目標にしてボンディングヘッドの軌跡を数
値制御する。現状の数値制御ボンディング装置によれ
ば、金属細線の塑性変形を考慮に入れてX、Y、Z方向
にそれぞれ±50μm程度の精度でボンディング後の金
属細線の形状を制御できる。黒丸印で表示した交点と目
標とする座標点とのずれは、±50μm程度以下になる
わけである。
The pad and the work are connected by a thin metal wire, for example, a gold wire by a wire bonding method. The trajectory of the bonding head is numerically controlled so that the intersection (indicated by a black circle) of one thin metal wire and the plane 52 passes through the one coordinate point. According to the current numerical control bonding apparatus, the shape of the thin metal wire after bonding can be controlled in the X, Y, and Z directions with an accuracy of about ± 50 μm in consideration of the plastic deformation of the thin metal wire. The deviation between the intersection indicated by the black circle and the target coordinate point is about ± 50 μm or less.

【0015】中間線上のパッド2c1,2c2,2c3
・・・は、金属細線3c1,3c2,3c3,・・・に
よりワーク4の右側の平面41,左側の平面41,右側
の平面41と接続する。右側のパッド2r1,・・・は
左側の平面42と金属細線3r1,・・・により接続
し、左側のパッド2l1,・・・は右側の平面42と金
属細線3l1,・・・により接続する。
Pads 2c1, 2c2 and 2c3 on the intermediate line
Are connected to the right plane 41, the left plane 41, and the right plane 41 of the work 4 by the thin metal wires 3c1, 3c2, 3c3,. The right pads 2r1,... Are connected to the left plane 42 by thin metal wires 3r1,.

【0016】次に、図3(a)に示すように、液状樹脂
を滴下し、固化させてモールド樹脂8で封止する。
Next, as shown in FIG. 3A, a liquid resin is dropped, solidified, and sealed with a mold resin 8.

【0017】次に、図3(b)に示すように、モールド
樹脂8の外側の金属細線3l1,3r1等を切断し、紫
外線レーザービーム9を照射して、モールド樹脂8の一
部を昇華させて除去することにより窪み15を形成す
る。紫外線ビーム8の照射位置は、前述の各座標点とそ
の周囲の直径300〜400μmの円形領域とする。
Next, as shown in FIG. 3B, the thin metal wires 311 and 3r1 outside the mold resin 8 are cut and irradiated with an ultraviolet laser beam 9 to partially sublimate the mold resin 8. The dents 15 are formed by removing them. The irradiation position of the ultraviolet beam 8 is the above-described coordinate point and a circular area having a diameter of 300 to 400 μm around the coordinate point.

【0018】次に、図3(c)に示すように、リフロー
法等により、半田ボール10を形成する。半田ボールの
大きさは450〜500μmであるので、それぞれ対応
する金属細線と接続することができる。次に、エジェク
トピン6により、半導体チップ1を押し上げ、モールド
樹脂ごとセット治具5から分離させる。
Next, as shown in FIG. 3C, a solder ball 10 is formed by a reflow method or the like. Since the size of the solder ball is 450 to 500 μm, it can be connected to the corresponding thin metal wire. Next, the semiconductor chip 1 is pushed up by the eject pin 6 and separated from the set jig 5 together with the mold resin.

【0019】以上、半田ボールが4列、段差1のワーク
を使用する場合について説明した。列数が6,8と大き
くなると、ワークの段差を2,3と増やしたものを使用
すればよい。
The case where a work having four rows of solder balls and a level difference of 1 is used has been described above. When the number of rows is increased to 6,8, it is sufficient to use a work in which the step of the work is increased to 2,3.

【0020】[0020]

【発明の効果】以上説明したように、本発明によれば、
パッドと外部端子を金属細線により直接接続するので、
銅配線を接合したポリイミドテープやエラストマが不要
となり、部品点数が削減され、CSP(チップサイズパ
ッケージ)化に有利である。モールド樹脂と半導体チッ
プとの熱膨張の差により、外部端子とパッドとの相対位
置が変化しても、金属細線が可撓性なので問題はない。
パッドと金属細線との接続は、ワイヤボンディング法に
よるので十分な接合強度と均一性を確保できる。又、各
種の半導体チップ寸法に容易に対応できる。セット治具
やワークの構造も簡単であるので安価である。
As described above, according to the present invention,
Since the pad and the external terminal are directly connected by a thin metal wire,
This eliminates the need for a polyimide tape or an elastomer to which copper wiring is bonded, reduces the number of components, and is advantageous for a CSP (chip size package). Even if the relative position between the external terminal and the pad changes due to the difference in thermal expansion between the mold resin and the semiconductor chip, there is no problem because the thin metal wire is flexible.
Since the connection between the pad and the thin metal wire is made by the wire bonding method, sufficient bonding strength and uniformity can be secured. Further, it can easily cope with various semiconductor chip dimensions. Since the structure of the set jig and the work is simple, the cost is low.

【0021】このように、モールドBGA型半導体装置
の低コスト化及び信頼性の向上が容易に実現可能となる
効果がある。
As described above, there is an effect that cost reduction and improvement in reliability of the molded BGA type semiconductor device can be easily realized.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施の形態により製造されたモール
ドBGA型半導体装置を示す平面図(図1(a))及び
図1(a)のX−X線断面図(図1(b))。
FIG. 1 is a plan view (FIG. 1A) showing a molded BGA type semiconductor device manufactured according to an embodiment of the present invention, and a cross-sectional view taken along line XX of FIG. FIG. 1 (b).

【図2】本発明の一実施の形態の製造方法について説明
するための平面図(図2(a))及び断面図(図2
(b))。
FIG. 2 is a plan view (FIG. 2A) and a cross-sectional view (FIG. 2) for describing a manufacturing method according to an embodiment of the present invention.
(B)).

【図3】図2に続いて、本発明の一実施の形態の製造方
法について説明するための(a)、(b)及び(c)に
分図して示す工程順断面図。
FIG. 3 is a process order sectional view shown in (a), (b), and (c) for explaining the manufacturing method of the embodiment of the present invention, following FIG. 2;

【図4】従来の一例を示す断面図。FIG. 4 is a cross-sectional view showing an example of the related art.

【符号の説明】[Explanation of symbols]

1 半導体チップ 2、2c1,2c2,・・・、2l1,2l2,・・
・、2r1,2r2,・・・ パッド 3、3c1,3c2,・・・、3l1,3l2,・・
・、3r1,3r2,・・・ 金属細線 4 ワーク 41 平面 42 平面 5 セット治具 51 凹所 52 平面 6 エジェクトピン 61 エジェクトピン挿入孔 7 真空吸着孔 8 モールド樹脂 9 紫外線レーザービーム 10 半田ボール 11 銅配線 12 封止材 13 ポリイミドテープ 14 エラストマ 15 窪み
1 semiconductor chip 2, 2c1, 2c2,...
.. 2r1, 2r2,..., Pad 3, 3c1, 3c2,.
· 3r1, 3r2, ··· Fine metal wire 4 Work 41 Flat surface 42 Flat surface 5 Set jig 51 Recess 52 Flat surface 6 Eject pin 61 Eject pin insertion hole 7 Vacuum suction hole 8 Mold resin 9 Ultraviolet laser beam 10 Solder ball 11 Copper Wiring 12 Sealant 13 Polyimide tape 14 Elastomer 15 Depression

Claims (3)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 半導体チップを載置する凹所を備えたセ
ット治具及び前記セット治具の凹所が設けられている面
に前記凹所から第1の所定寸法離れて設置されるワーク
を準備し、前記凹所に半導体チップを載置して固定し、
前記半導体チップのパッドと前記ワークとをワイヤボン
ディングにより金属細線で接続する工程と、前記凹所を
充填してモールド樹脂を形成する工程と、前記金属細線
をモールド樹脂外で切断し、前記モールド樹脂を選択的
に除去して前記金属細線の先端部を露出させる窪みを形
成する工程と、前記窪みを埋めて前記金属細線に接続す
る外部端子を形成する工程とを有することを特徴とする
モールドBGA型半導体装置の製造方法。
The method according to claim 1] workpiece recess setting jig and the setting jig having a recess for mounting the semiconductor chip is mounted from said recess in a surface which is provided apart first predetermined size Prepare, place and fix the semiconductor chip in the recess,
Connecting the pad of the semiconductor chip and the work with a thin metal wire by wire bonding, forming the mold resin by filling the recess, cutting the thin metal wire outside the mold resin, A step of forming a recess for exposing the tip of the thin metal wire by selectively removing the fine wire, and a step of forming an external terminal connected to the thin metal wire by filling the recess. Of manufacturing a semiconductor device.
【請求項2】 ワークが、セット治具の凹所が設けられ
ている面からそれぞれ第1の高さ及びこれより大きい第
2の高さにあり、前記凹所から第1の所定寸法及びこれ
より大きい第2の所定寸法離れた第1の平面及び第2の
平面を有する請求項1記載のモールドBGA型半導体装
置の製造方法。
2. The workpiece is at a first height and a second height greater than the surface of the set jig where the recess is provided, and the workpiece has a first predetermined dimension and a predetermined height from the recess. 2. The method of manufacturing a molded BGA type semiconductor device according to claim 1, further comprising a first plane and a second plane separated from each other by a larger second predetermined dimension.
【請求項3】 外部端子として、リフロー法で半田ボー
ルを形成する請求項1又は請求項2記載のモールドBG
A型半導体装置の製造方法。
3. The mold BG according to claim 1 , wherein a solder ball is formed by a reflow method as the external terminal.
A method for manufacturing an A-type semiconductor device.
JP9295636A 1997-10-28 1997-10-28 Manufacturing method of molded BGA type semiconductor device Expired - Fee Related JP2990130B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9295636A JP2990130B2 (en) 1997-10-28 1997-10-28 Manufacturing method of molded BGA type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9295636A JP2990130B2 (en) 1997-10-28 1997-10-28 Manufacturing method of molded BGA type semiconductor device

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