JP2987967B2 - Epitaxial wafer and its growth method - Google Patents
Epitaxial wafer and its growth methodInfo
- Publication number
- JP2987967B2 JP2987967B2 JP3044852A JP4485291A JP2987967B2 JP 2987967 B2 JP2987967 B2 JP 2987967B2 JP 3044852 A JP3044852 A JP 3044852A JP 4485291 A JP4485291 A JP 4485291A JP 2987967 B2 JP2987967 B2 JP 2987967B2
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- epitaxial wafer
- plane
- thin film
- growth
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Crystals, And After-Treatments Of Crystals (AREA)
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
Description
【0001】[0001]
【産業上の利用分野】この発明は、GaAs基板上に分
子線エピタキシャル成長法(以下MBE法と略記する)
により、GaAs、AlGaAs等の化合物半導体の薄
膜を積層したエピタキシャルウエハおよびその成長方法
に関するもので、特に高い電子移動度が要求されるHE
MT(高電子移動度トランジスタ)などの作製に使用さ
れるエピタキシャルウエハの用途に適する。The present invention relates to a molecular beam epitaxial growth method (hereinafter abbreviated as MBE method) on a GaAs substrate.
The present invention relates to an epitaxial wafer on which a thin film of a compound semiconductor such as GaAs or AlGaAs is stacked and a method for growing the same, and in which HE requires particularly high electron mobility.
It is suitable for use in epitaxial wafers used for producing MT (high electron mobility transistor) and the like.
【0002】[0002]
【従来の技術】MBE法によりGaAs基板上に化合物
半導体の薄膜をエピタキシャル成長する場合は、従来基
板の面方位は(001)面に0.5度以内程度のずれで
一致した面を使用していた。(例えば、特開平2−28
8223号公報)この場合、特定の成長条件において
は、エピタキシャルウエハの表面に基板の転位に起因す
る微小欠陥が現れることが知られている。2. Description of the Related Art When a compound semiconductor thin film is epitaxially grown on a GaAs substrate by the MBE method, a plane in which the plane orientation of the conventional substrate coincides with the (001) plane within 0.5 ° or less is used. . (See, for example, JP-A-2-28
In this case, it is known that, under specific growth conditions, micro defects caused by dislocation of the substrate appear on the surface of the epitaxial wafer.
【0003】上記微小欠陥の発生を少なくするために、
従来成長温度、砒素の圧力、成長速度などの条件を適切
に選んで成長していた。低雑音HEMT用や、半導体レ
ーザ用等の一般的な用途では、こうして微小欠陥の発生
を押さえ得る条件で(001)面の基板上に成長したウ
エハを用いて十分な特性を有する素子を作製することが
可能であった。In order to reduce the occurrence of the above minute defects,
Conventionally, growth was performed by appropriately selecting conditions such as growth temperature, arsenic pressure, and growth rate. In general applications such as for low-noise HEMTs and semiconductor lasers, an element having sufficient characteristics is manufactured using a wafer grown on a (001) plane substrate under such conditions that the generation of minute defects can be suppressed. It was possible.
【0004】ところが、このような条件で成長した場
合、特に高い電子移動度が要求される高移動度HEMT
の作製に適するエピタキシャルウエハを得ることは困難
であった。(001)面の基板を用いて特に高い電子移
動度を有するエピタキシャルウエハを成長するための条
件が、たまたま上に述べた転位に対応する微小欠陥が発
生しやすい成長の条件に一致していたのである。微小欠
陥が発生しやすい成長の条件は図1の斜線部分で示す通
りである。[0004] However, when grown under such conditions, a high mobility HEMT which requires particularly high electron mobility is required.
It was difficult to obtain an epitaxial wafer suitable for the production of Since the conditions for growing an epitaxial wafer having a particularly high electron mobility using the (001) plane substrate coincided with the above-mentioned growth conditions in which micro defects corresponding to dislocations are likely to occur. is there. The growth conditions under which minute defects are likely to occur are as shown by the hatched portions in FIG.
【0005】[0005]
【発明が解決しようとする課題】この発明は、上記の問
題点を解決し、表面の微小欠陥が少なくかつ高い電子移
動度を有するMBE法によるエピタキシャルウエハ及び
その成長方法を提供することを目的とする。SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems and to provide an epitaxial wafer by the MBE method having few surface micro defects and high electron mobility, and a method of growing the same. I do.
【0006】[0006]
【課題を解決するための手段】この発明のエピタキシャ
ルウエハは、面方位が(001)面またはこれと結晶学
的に等価な面から1〜5度の範囲で傾いたGaAs基板上にM
BE法により化合物半導体の薄膜を積層し、上記薄膜の転
位密度が上記GaAs基板の転位密度より少ないエピタキシ
ャルウエハである。また、この発明のエピタキシャルウ
エハの成長方法は、MBE法により化合物半導体の薄膜を
成長する際に、基板の温度を560℃〜650℃とし、
砒素の圧力を1×10-3Pa以上とし、薄膜の成長速度を
毎時3μm以下とし、かつ面方位が(001)面または
これと結晶学的に等価な面から1〜5度の範囲で傾いたG
aAs基板を用い、上記薄膜の転位密度が上記GaAs基板の
転位密度より少ないことを特徴とする成長方法である。According to the present invention, an epitaxial wafer is formed on a GaAs substrate whose plane orientation is inclined at 1 to 5 degrees from a (001) plane or a plane which is crystallographically equivalent thereto.
Laminating a thin film of a compound semiconductor by BE method, rotation of the thin film
An epitaxial wafer having a dislocation density lower than the dislocation density of the GaAs substrate . In the method for growing an epitaxial wafer of the present invention, when growing a compound semiconductor thin film by the MBE method, the temperature of the substrate is set to 560 ° C. to 650 ° C.
The pressure of arsenic is 1 × 10 −3 Pa or more, the growth rate of the thin film is 3 μm / hour or less, and the plane orientation is inclined at 1 to 5 degrees from the (001) plane or a crystallographically equivalent plane. G
Using an aAs substrate, the dislocation density of the thin film
This is a growth method characterized by being smaller than the dislocation density .
【0007】[0007]
【作用】本発明者らは成長条件および基板の面方位の影
響について種々研究した結果、以下のことを見いだし
た。すなわち、MBE法において高い電子移動度を有す
るウエハを成長することが出来る条件(これは図1の斜
線で示す範囲内の条件と重なる)でGaAs、AlGa
As等を成長した場合に、(001)面のGaAs基板
を使用すると微小表面欠陥が多数生じるが、(001)
面から1〜5度傾いた基板を使用すると微小表面欠陥が
殆ど生じない。これは、(001)面から傾いた基板を
使用することによって、結晶成長の際の成長位置になる
原子ステップが基板表面に極めて多く存在することにな
り、基板の転位の影響が殆どなくなるためであると考え
られる。The present inventors have conducted various studies on the effects of the growth conditions and the plane orientation of the substrate, and have found the following. In other words, GaAs and AlGa under the condition that a wafer having a high electron mobility can be grown by the MBE method (this overlaps with the condition within the range shown by oblique lines in FIG. 1).
When As or the like is grown, if a (001) plane GaAs substrate is used, many minute surface defects occur, but (001)
If a substrate inclined from 1 to 5 degrees from the surface is used, a minute surface defect hardly occurs. This is because the use of a substrate tilted from the (001) plane causes an extremely large number of atomic steps to be grown at the crystal growth position on the substrate surface, so that the effect of dislocation on the substrate is almost eliminated. It is believed that there is.
【0008】[0008]
【実施例】[実施例] 面方位が(001)面から<1
10>方向に2度傾いたGaAs基板を使用し、この基
板上にMBE法でGaAsエピタキシャル層を成長し
た。GaAs基板の転位密度は、6×104cm-2 であ
った。成長の条件は、基板温度を590℃、砒素の圧力
を6×10-3Paとし、成長速度を毎時1μmに保っ
た。2時間の成長で厚み2μmのGaAsエピタキシャ
ル層を得た。このようにして形成したGaAsエピタキ
シャル成長層の表面には、基板の転位に起因する微小欠
陥は観察されなかった。成長したエピタキシャル層の電
気的特性を測定したところ、残留不純物濃度が5×10
13cm-3という優れた特性が得られた。[Example] [Example] The plane orientation was <1 from the (001) plane.
A GaAs substrate tilted twice in the 10> direction was used, and a GaAs epitaxial layer was grown on the substrate by MBE. The dislocation density of the GaAs substrate was 6 × 10 4 cm −2 . The growth conditions were a substrate temperature of 590 ° C., an arsenic pressure of 6 × 10 −3 Pa, and a growth rate of 1 μm / hour. By growing for 2 hours, a GaAs epitaxial layer having a thickness of 2 μm was obtained. On the surface of the GaAs epitaxial growth layer formed in this way, no micro defects caused by dislocation of the substrate were observed. When the electrical characteristics of the grown epitaxial layer were measured, the residual impurity concentration was 5 × 10
Excellent properties of 13 cm -3 were obtained.
【0009】[比較例] 面方位が(001)面に対し
0.2度以内のずれで一致したGaAs基板を使用し、
この基板上にMBE法でGaAsエピタキシャル層を成
長した。GaAs基板は上記の実施例で使用したものと
同じインゴットの隣接した位置から切り出したものを使
用した。成長の条件は、上記実施例と同様に、基板温度
を590℃、砒素の圧力を6×10-3Paとし、成長速
度を毎時1μmに保った。2時間の成長で厚み2μmの
GaAsエピタキシャル層を得た。得られたGaAsエ
ピタキシャル成長層の表面には、基板の転位に起因する
多数の微小欠陥が観察された。微小表面欠陥の密度は、
基板の転位密度とほぼ同程度であった。なお、このエピ
タキシャル成長層は、電気的特性については実施例のも
のと同じであることを確認した。[Comparative Example] A GaAs substrate whose plane orientation coincides with the (001) plane within 0.2 ° is used.
A GaAs epitaxial layer was grown on this substrate by MBE. As the GaAs substrate, a substrate cut out from an adjacent position of the same ingot as that used in the above embodiment was used. As for the growth conditions, the substrate temperature was 590 ° C., the pressure of arsenic was 6 × 10 −3 Pa, and the growth rate was 1 μm / hour, as in the above-described embodiment. By growing for 2 hours, a GaAs epitaxial layer having a thickness of 2 μm was obtained. On the surface of the obtained GaAs epitaxial growth layer, a large number of minute defects caused by dislocation of the substrate were observed. The density of micro surface defects is
It was almost the same as the dislocation density of the substrate. It was confirmed that the epitaxial growth layer had the same electrical characteristics as those of the example.
【0010】エピタキシャル成長の条件は、上記の実施
例に限られるものではない。成長時の基板温度は560
〜650℃の範囲で選べば同様の結果を得ることができ
る。560℃未満または650℃を越える範囲ではエピ
タキシャル層の移動度が低くなる。ひ素の圧力は1×1
0-3Pa以上とすれば、良好な電気特性を有するエピタ
キシャル層が得られる。成長速度は、毎時3μm以下の
場合に良好なエピタキシャル層が得られる。また、基板
の面方位は(001)面からのずれが1度未満では基板
の転位に対応する微小欠陥が生じ、5度を越えると鏡面
状の成長表面が得られない。The conditions for epitaxial growth are not limited to the above embodiment. The substrate temperature during growth is 560
A similar result can be obtained if the temperature is selected within the range of 650 ° C. If the temperature is lower than 560 ° C. or higher than 650 ° C., the mobility of the epitaxial layer is low. Arsenic pressure is 1 × 1
When the pressure is 0 -3 Pa or more, an epitaxial layer having good electric characteristics can be obtained. When the growth rate is 3 μm / hour or less, a good epitaxial layer can be obtained. If the plane orientation of the substrate deviates from the (001) plane by less than 1 degree, a micro defect corresponding to the dislocation of the substrate occurs, and if it exceeds 5 degrees, a mirror-like growth surface cannot be obtained.
【0011】[0011]
【発明の効果】本発明によれば、MBE法によって表面
の微小欠陥が少なくかつ高い電子移動度を有するエピタ
キシャルウエハが得られ、高電子移動度トランジスタな
どの用途において優れた効果がある。According to the present invention, an epitaxial wafer having few surface micro defects and high electron mobility can be obtained by the MBE method, and has an excellent effect in applications such as a high electron mobility transistor.
【図1】 (001)面のGaAs基板を用いた場合
の、成長条件と微小欠陥の発生との関係を示すグラフで
ある。FIG. 1 is a graph showing the relationship between growth conditions and generation of micro defects when a (001) GaAs substrate is used.
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.6,DB名) C30B 23/08 C30B 29/40 - 29/42 C30B 25/18 ──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int. Cl. 6 , DB name) C30B 23/08 C30B 29/40-29/42 C30B 25/18
Claims (2)
法により化合物半導体の薄膜を積層したエピタキシャル
ウエハにおいて、上記基板の面方位が(001)面また
はこれと結晶学的に等価な面から1度以上5度以下の範
囲で傾いていて、上記化合物半導体の薄膜の転位密度が
上記基板の転位密度より少ないことを特徴とするエピタ
キシャルウエハ。In an epitaxial wafer in which a compound semiconductor thin film is laminated on a GaAs substrate by a molecular beam epitaxial growth method, the plane orientation of the substrate is at least 1 degree from the (001) plane or a plane crystallographically equivalent thereto. Degrees, the dislocation density of the compound semiconductor thin film is
An epitaxial wafer having a dislocation density lower than that of the substrate.
法により化合物半導体の薄膜を積層してエピタキシャル
ウエハを成長する際に、基板の温度を560℃〜650
℃とし、砒素の圧力を1×10-3Pa以上とし、薄膜の成
長速度を毎時3μm以下とし、かつ面方位が(001)
面またはこれと結晶学的に等価な面から1度以上5度以
下の範囲で傾いたGaAs基板を用いて成長し、上記化合物
半導体の薄膜の転位密度が上記基板の転位密度より少な
いことを特徴とするエピタキシャルウエハの成長方法。2. When a compound semiconductor thin film is laminated on a GaAs substrate by molecular beam epitaxy to grow an epitaxial wafer, the temperature of the substrate is set to 560 ° C. to 650 ° C.
° C, the arsenic pressure is 1 × 10 −3 Pa or more, the growth rate of the thin film is 3 μm / hour or less, and the plane orientation is (001).
Grown on a GaAs substrate inclined from 1 ° to 5 ° from the surface or a crystallographically equivalent surface ,
The dislocation density of the semiconductor thin film is lower than the dislocation density of the substrate.
Method of growing the epitaxial wafer, characterized in that the decoction.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3044852A JP2987967B2 (en) | 1991-03-11 | 1991-03-11 | Epitaxial wafer and its growth method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3044852A JP2987967B2 (en) | 1991-03-11 | 1991-03-11 | Epitaxial wafer and its growth method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH04280892A JPH04280892A (en) | 1992-10-06 |
JP2987967B2 true JP2987967B2 (en) | 1999-12-06 |
Family
ID=12703015
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3044852A Expired - Fee Related JP2987967B2 (en) | 1991-03-11 | 1991-03-11 | Epitaxial wafer and its growth method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2987967B2 (en) |
-
1991
- 1991-03-11 JP JP3044852A patent/JP2987967B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH04280892A (en) | 1992-10-06 |
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Legal Events
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LAPS | Cancellation because of no payment of annual fees |