JP2984616B2 - Power control IC - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power control IC for an image forming apparatus such as a copying machine or a printer.

[0002]

2. Description of the Related Art Conventionally, in an image forming apparatus such as a copying machine or a printer, a sequence controller circuit for controlling on / off of a load of a motor, a solenoid and the like, and a low-voltage / exposure / charging power supply; It was formed on a completely different board from the power supply circuit for the system.

A switching regulator is used as a power supply. The control circuit includes an error amplifier for comparing a part of the output (error signal) with a reference signal, and a pulse for converting the output of the error amplifier into a pulse width control output. A width modulation circuit (PWM) is required, and a discrete circuit and a power control IC in which both are integrated on one chip have been used for the error amplifier and the pulse width modulation circuit.

In order to simplify the circuit for stabilizing the power supply, a method has been proposed in which the control is performed by a microcomputer program for a sequence controller.

[0005]

However, it is difficult to reduce the size of the conventional device for forming each circuit on a separate board.

Further, a circuit using an error amplifier has a complicated circuit configuration in order to satisfy an offset voltage, a frequency characteristic and the like required for power supply control. In addition, it is necessary to take out the input / output terminals to connect a large-capacity capacitor for phase correction between the input and output, and it is necessary to increase the cell size for measures against static electricity. Mixing with circuits has been considered difficult.

In the case where control is performed by a microcomputer program, a microcomputer for high-speed processing and a high-speed and high-precision A / D converter are required.
In addition, the program becomes complicated, and the peripheral circuits of the microcomputer, that is, analog circuits such as driver circuits and level conversion circuits remain as discrete circuits, so that they have not been realized because they are not so small and simple.

The present invention has been made in view of these problems, and provides a small, low-cost, highly reliable power supply control IC for an image forming apparatus in which an analog circuit and a digital circuit are integrated on the same chip. It is intended to do so.

[0009]

In order to achieve the above object, according to the present invention, a power supply control IC is configured as in the following (1).

(1) Power supply control in which an analog circuit for controlling a switching power supply for supplying power to the image forming apparatus and a digital circuit including a CPU for controlling the operation of the image forming apparatus are integrated on the same chip. Wherein the analog circuit is an inverter, a first switch connected in parallel to both ends of the inverter, a capacitor connected in series to an input side of the inverter, and a reference connected in series to the capacitor and output from the CPU. A chopper-type comparator having a second switch for switching and inputting the output value of the power supply. The first and second switches are controlled on and off by a signal from the CPU, and the digital circuit Includes a PWM circuit that outputs a switching power supply drive signal that is pulse width modulated according to the output of the comparator. Power control IC.

[0011]

According to the above construction, the power supply control analog circuit does not require an external large-capacity capacitor for input and output, can reduce the chip occupation area, and can control most control circuits of the image forming apparatus on the same chip. Can be accumulated.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to an embodiment of "image forming apparatus".

[0013]

The present invention will be described below with reference to examples.

Prior to the description of the embodiment, the related art of the present invention will be described with reference to the block diagram of FIG. 9 and the circuit diagram of FIG.

FIG. 9 is a block diagram of a main part of the image forming apparatus, and is an integrated circuit in which the inside of the dashed line is formed into one chip. The chip is formed by a C-MOS process for the purpose of low power consumption.

Q ₁ is a CPU core including a memory, an internal bus and the like.

Q _{4 to} Q ₁₀ are operational amplifiers or comparators; Q ₁₁ is a buffer; Q ₁₂ and Q ₁₃ are analog multiplexers; Q _{14 to} Q ₁₆ are pulse width modulation circuits (PWM);
_17, Q ₁₈ is a timer counter, Q ₁₉ is an LCD driver, Q
₂₀ Control circuit, Q ₂₁ of the communication with the external device is reset circuit when the power is turned, Q ₂₂ is a watch dog timer circuit for detecting a program runaway of the CPU.

The comparator Q ₄ , the FET _{Tr 4} , the operational amplifier Q ₅ , and the capacitor C ₁ form an A / D converter under the control of programming of the CPU, and are analog signals inputted through an analog multiplexer Q _12. setting voltage of preparative volume VR1, the temperature sensing thermistor voltage of the fixing roller (not shown), the detection output of the photodiode P · S1 for light quantity detection of the fluorescent lamp is converted a-D, are input to the CPU core Q _1.

The timer counter Q ₁₇ , the resistor R ₁ , and the capacitor C ₂ form a DA converter under the control of programming of the CPU, and the output thereof is supplied to the capacitors C ₃ , C ₄ , C ₄ via the analog multiplexer Q _{13. 5} charge is held in the pulse width modulation circuit Q _14, Q _15, the light quantity switching of the through Q ₁₆ fluorescent lamps, switching of the charging high-voltage output, used as a reference voltage for switching the developing DC bias.

[0020] IC · Q ₃₀₁ 5V power for supply, converter transformer T ₃₁ line smoothing output, divided by the DC-DC converter comprising a switching transistor T _R302, obtained by isolation. Converter rectified output of the secondary winding of the transformer T ₃₁ is stabilized to + 5V via a Zener diode ZD ₃₀₁ and is connected to the power input terminal P ₃₀₃ of the IC · Q _301.

Since the IC _Q301 is formed by a C-MOS process, only a few mA of current is consumed. IC ・
When the Q ₃₀₁ + 5V is supplied, after resetting the microcomputer in the reset circuit Q _21, the microcomputer starts the control in accordance with a program stored in the internal ROM. After a predetermined time has passed since the reset,
Operating a pulse width modulation circuit (PWM) of Q _41, PWM
Start the output of. Output pulse is 1 of the converter transformer T ₂₁ of the switching power supply through an output terminal P ₃₀₂
Winding the applied to the base of the switching transistor T _{r 301} connected to the primary side of the gate drive transformer T ₃₂ of the switching FET · T _r101.

[0022] The output of the converter transformer T ₂₁ (24V)
Is _divided at a predetermined ratio by resistors R ₃₀₁ and R ₃₀₂ , and then applied to the input of error amplifier Q ₄₂ of chip Q ₃₀₁ via terminal P ₃₀₁ . Error amplifier Q ₄₂ compares the reference voltage applied to the inverting input and the input is added to the output to the pulse width modulation circuit (PWM) Q _41.

In this way, the 24V output for various power supplies is stabilized.

Next, an embodiment of the present invention will be described with reference to the related art described above.

(Embodiment 1) Embodiment 1 corresponds to a configuration in which the control circuit portions (Q ₇ , Q ₁₅ ) of the charging high-voltage power supply in FIG. 9 are replaced with the circuit of FIG.

Accordingly, the charging high-voltage power supply will be described with reference to FIG.
The description of the other parts is omitted.

[0027] In FIG 1, Q ₅₃ is a chopper type comparator, the switch S _3, a capacitor C _403, normal C-MOS which is adapted to open and close the input and output switch S ₄
Are connected in series.

When the switch S _{4 is} turned on and the switch S ₃ is connected to the output side of the DA converter Q ₅₁ by the output of the programmable counter Q ₅₂ , the input and output of the inverter become the threshold voltage, that is, V in the C-MOS. _CC /
Becomes 2, the capacitor C _403, voltage (V _S -V _CC /
The charge corresponding to 2) is charged.

At the next timing, the switch S _{4 is} turned off and the switch S ₃ is connected to P ₃₀₆ to input an error signal. That is, the load current of the charger connected to the high voltage output terminal P ₄₀₁ is detected by the detection resistor R ₄₀₃ . When voltage (V _e ) is input, V
_e is greater than V _S, the low level, V _e is changed to V _S is smaller than the high level. Output is input to the pulse width modulation circuit (PWM) Q _15. The pulse width modulation circuit includes an up / down counter, and counts down when the output of the comparator is low, and counts up when the output is low. Output, the switching transistor on the primary side of the converter transformer T ₃₃ through the terminal P ₃₀₇ T _R401
Supplied to the base. During the count-up, the energization ratio of the transistor _Tr401 continues to increase, and when the countdown occurs, the energization ratio continues to decrease.

In this way, the load current of the charging high-voltage power supply is controlled at a fixed ratio to the set value V _S.

According to the first embodiment, the chopper-type comparator is composed of only a NAND circuit, a switch circuit, and a small capacitor, and therefore has a very small chip occupation area as compared with a normal comparator or an operational amplifier. In addition, since there is no need for a large-capacity capacitor to be connected between the input and output of the operational amplifier, there is no need to provide an external output terminal and a negative-phase input terminal. It becomes easy to integrate the circuit and the same chip.

[0032] (Example 2) Example 2, as shown in FIG. 2, instead of the D-A converter Q ₅₁ of Example 1 (see FIG. 1), the capacitor C of the CR integration circuit in the programmable counter Q _{52 The} reference voltage is obtained by controlling the charging time to ₄₀₁ . FIG. 3 shows the timing chart.

The capacitor C ₄₀₁ is turned on the switch S ₁ by an output of the programmable counter Q ₅₂ is the power supply V
_Charged from the _CC via the resistor _R401 . When the switch is turned off S _1, to hold the charging voltage V _S until it. On the subsequent switch S _4, and connects the switch S ₃ to the terminal P _306, to charge holds the error voltage V _e which is inputted from the terminal P ₃₀₆ to the capacitor C _403.

Next, the switch S ₄ is turned off and the switch S ₄
Switching ₃ to C ₄₀₁ side, the sign of the difference between V _e and V _S, the comparator output is inverted. Switch S ₂ is
The capacitor _C301 is discharged and reset before charging.

According to the second embodiment, D which requires a large area
Since a programmable counter (or the counter itself is omitted depending on conditions), a switch circuit, and a capacitor having a very small capacity are used instead of the -A converter, the chip occupation area can be reduced.

[0036] (Example 3) In Example 3, as shown in FIG. 4, directly drives the external switching element at the output of the comparator Q ₅₃ to remove the PWM circuit Q ₁₅ of the second embodiment (see FIG. 2) Is what you do. FIG. 5 shows the operation waveform.

The timer counter Q ₅₇ has a predetermined ratio countdown output of the CPU clock (a) (timer output 1)
(B) and outputs (timer output 2) and (c) having the same frequency as the timer output 1 and a predetermined pulse width τ. It takes the output of the chopper comparator Q _53, a NAND timer output 1 in the NAND circuit Q _55, output a timer output 2
And outputs to the terminal P ₃₀₇ taking the NAND in the NAND circuit Q ₅₆ (d).

When the primary side switching element of the converter transformer of the power supply is controlled by the output, the error output (input at terminal P ₃₀₆ ), which is the detection signal of the power supply output, follows the reference voltage as shown at e. become. Even if the output of the comparator Q ₅₃ is not generated, the timer output 2 minimum occurs, it is holding a drop in the power supply converter transformer switching frequency.

FIG. 5F shows an example of how the error signal changes depending on the load of the power supply.

According to the third embodiment, P which requires a large area
Since only a timer counter and two NAND circuits are required instead of the WM circuit, the chip occupation area can be sufficiently reduced.

(Embodiment 4) FIG. 6 is an example in which the circuit of Embodiment 3 is further simplified.

In order to read (charge) the reference signal into the capacitor C ₄₀₃ , the switch S ₄ is first turned on, the switch S ₃ is turned on to the resistor R _{401 for} a time corresponding to the reference voltage, and then the terminal P _Switch to ₃₀₆ side. Power supply V
_The capacitor C ₄₀₃ is charged from the _CC via the resistor R ₄₀₁ to the reference voltage V _{S at the} potential on the S ₃ side of C ₄₀₃ , and the switch S ₃
Is switched to the terminal P ₃₀₆ (applied voltage V _e ), V _S
Chopper comparator Q by positive and negative of the difference between the V _e
The output of ₅₃ will be inverted. Switch S ₅ is intended to keep resetting to zero volts at the common side of the S ₃ of the capacitor C ₄₀₃ before operation.

FIG. 7 shows voltage waveforms at various points in the fourth embodiment.
FIG. 8 shows a flowchart of the switch operation of the embodiment.

[0044] Since the error signal and a reference signal side, according to Embodiment 4 is charged to the same capacitor C _403, can suppress the decrease in the control accuracy due to variations in the capacitance of the capacitor, and further circuit becomes simple Therefore, the area occupied by the chip can be reduced.

In each of the first to fourth embodiments, the chopper type comparator is applied to the control circuit of the high voltage power supply for charging. However, it is needless to say that the control circuit of another power supply can be applied.

[0046]

As described above, according to the present invention, a control analog circuit for controlling various power supplies of the image forming apparatus is provided together with a sequence control CPU and peripheral digital circuits.
B power control, which can be integrated on a chip, is not performed by a program of a microcomputer for sequence control, but is performed individually by an analog circuit.
C can be formed by a C-MOS process including an analog circuit. D. A power supply control circuit is wired in the chip, and the number of bonding pads to external circuits can be reduced. E.
The chopper type comparator used in the power supply control circuit is
Since the chip occupied area can be reduced by forming a NAND circuit, a switch circuit, and a very small capacity, a large part of the control circuit of the apparatus can be integrated on one chip. A power supply control IC can be obtained.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a main part of a first embodiment.

FIG. 2 is a circuit diagram of a main part of a second embodiment.

FIG. 3 is a timing chart of a switch according to a second embodiment.

FIG. 4 is a circuit diagram of a main part of a third embodiment.

FIG. 5 is an operation waveform diagram according to a third embodiment.

FIG. 6 is a circuit diagram of a main part of a fourth embodiment.

FIG. 7 is a voltage waveform diagram of each part according to the fourth embodiment.

FIG. 8 is a flowchart of a switch operation according to the fourth embodiment.

FIG. 9 is a block diagram showing a related art.

FIG. 10 is a circuit diagram of a switching regulator connected to the IC of FIG. 9;

[Explanation of symbols]

Q ₁ CPU core Q ₅₃ chopper comparator S _3, S ₄ switches

Claims (1)

(57) [Claims] An analog circuit for controlling a switching power supply for supplying power to the image forming apparatus; a digital circuit including a CPU for controlling an operation of the image forming apparatus;
Wherein the analog circuit comprises an inverter, a first switch connected in parallel to both ends of the inverter, a capacitor connected in series to an input side of the inverter, and a series connection to the capacitor. And
A chopper-type comparator including a second switch for switching and inputting a reference value output from the CPU and an output value of the power supply, wherein the first and second switches are turned on / off by a signal from the CPU; Wherein the digital circuit includes a PWM circuit that outputs a switching power supply drive signal that is pulse width modulated according to the output of the comparator.