JP2832606B2 - Power circuit control device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a control device for a power supply circuit suitable for controlling an image forming apparatus such as a copying machine and a printer.

[Conventional technology]

2. Description of the Related Art Conventionally, in an image forming apparatus such as a copying machine or a printer, a microcomputer is used as a process sequence control unit.

The microcomputer sends a signal corresponding to a predetermined output to each load, such as a motor, a lamp control circuit for exposure, and a high-voltage power supply for charging and developing, in accordance with the timing of each process. Among the loads, the CP
The control circuit in the high voltage power supply determines the output according to the signal of U, and the lamp control circuit for exposure also has an independent control circuit for turning on / off the lamp and controlling the light amount to a predetermined value.

[Problems to be solved by the invention]

However, in the above-described conventional example, since an independent control circuit is required for each load, the configuration of the system is complicated, it is difficult to improve the reliability of the system, and it is also necessary to cope with miniaturization and cost reduction of the system. There was a problem that it was difficult.

In recent years, a method of controlling an external load by a CPU has also been proposed.However, since software control is performed in the CPU, processing control and load control are affected by the processing speed of the CPU. Because the control of both controls the load on the software in the CPU and increases the processing time of the entire system, the system configuration must be fully examined.

The present invention has been made in view of such problems, and the software load on the CPU is relatively small, the processing time is short, and it is easy to cope with system miniaturization and low cost. It is an object to provide a control device for a power supply circuit.

[Means for solving the problem]

The power supply circuit control device of the present invention is configured as follows.

(1) In a control device for a power supply circuit, an input circuit that inputs a plurality of signals including an output to a load connected to the power supply circuit, selects and outputs each signal, and a reference voltage generator that generates a reference voltage Means, a first switch for turning on and off a signal from the input circuit, a second switch for turning on and off a reference voltage from the reference voltage generating means, and a serial switch respectively connected to the first switch and the second switch. A capacitor connected thereto, an inverter connected in series to the capacitor, and a third switch connected to both ends of the inverter.
By turning on and off the first switch, the second switch, and the third switch at a predetermined timing, a signal from the input circuit is compared with a reference voltage from the reference voltage generation circuit, and a binary value is obtained. A chopper-type comparator that outputs a signal; and a latch circuit that holds an output from the comparator, wherein the output of the latch circuit is supplied to the power supply circuit at a predetermined timing as a control signal.

(2) The comparator and the latch circuit include a CPU, a ROM,
RAM, timer, and system clock generator are formed on the same chip.

(3) The input circuit inputs outputs to a plurality of loads connected to the power supply device, and supplies one of the plurality of outputs to the comparator at a predetermined timing.

[Action]

In the control device of the power supply circuit according to the present invention, since the input pulse is given to the control device from the latch circuit holding the result of the comparator in the repetition cycle, the load on the CPU is reduced.

〔Example〕

FIG. 1 shows a first embodiment of the present invention. FIG. 1 (a) shows a circuit configuration, and FIG. 1 (b) shows a circuit example of a comparator.

In the figure, 1 is a multiplex (MPX) circuit for switching the output detection value of each control device such as a power supply of a copying machine by a control signal of a CPU, 2 is a reference voltage generating means, 3 is an input value selected by the multiplex circuit 1 And a reference voltage value from the reference voltage generating means 2. A comparator 4 is a latch circuit for holding an output value as a comparison result of the comparator 3 as binarized data at a predetermined cycle. Output pulses (A to E) are supplied to the respective control devices, and the outputs of the respective control devices change according to the pulse widths of the input pulses. Reference numeral 5 denotes a timing generator that controls each timing of the multiplex circuit 1, the comparator 3, and the latch circuit 4. Each timing signal is generated by a clock (CLK). 6 is a register for giving information such as timing switching to the timing generator 5;
7 is a CPU, a timing generator 5 and a register 6
Is a CPU bus (BUS).

Further, in FIG. 1 (b), SW ₁ ~SW ₃ switches, C represents the capacitor, Q is shows an inverter.

The comparator 3 and the latch circuit 4 are connected to the CPU, RO
M, RAM, a timer, a system clock generator, and the like may be formed on the same chip, and data stored in the ROM in advance or data stored in the RAM as a result of arithmetic processing of the CPU may be input to the comparator 3 as a reference value. .

Next, the operation will be described with reference to the timing chart of FIG.

The comparator 3 receives a predetermined voltage signal output from the reference voltage generating means 2 and an external signal selected by the multiplex circuit 1 as input switching means for selecting a plurality of external inputs. The result of comparison by the comparator 3 is held by the next-stage latch circuit 4. The latch circuit 4 digitally recognizes the result of the comparator 3 as a binary signal of H (high level) or L (low level), and the latch timing thereof is determined based on a predetermined timing signal by a CPU control signal. Determined by the generated timing generator 5, the timing signal is generated at an arbitrary fixed period.

Here, for example, the multiplex circuit 1 as the external input switching means of the comparator 3 has a configuration of five inputs, and all the comparison results for these inputs are held in the latch circuit 4. That is, the latch circuit 4 is 1 bit ×
5, and the latches are switched in synchronization with the multiplexing circuit 1 to maintain their respective states and output latch results as outputs A to E, respectively. I have. The latch circuit is not limited to the five-circuit configuration. ²ⁿ circuits are easier to handle digitally.

Further, as shown in FIG. 1B, the inverter Q side of the capacitor C in the comparator 3 is connected to the switch SW3.
Is biased to a certain voltage by turning on,
Since the switch SW1 is turned on at the same time as the switch SW3, the inverter Q side of the capacitor C is biased to a constant voltage, and the other end has an input voltage from the multiplex circuit 1.
The capacitor C is charged. Next, the switch SW ₁ and SW ₃ OP
In the EN (off) by turning on the switch SW _2, the external input and the reference voltage and is compared, the result is output through the amplifier to the next-stage latch circuit 4.

As described above, the latch circuit 4 holds the result of the comparator 3 in a repetitive cycle and outputs a control pulse from the latch circuit 4 to each control device.
The output can be controlled only by controlling U and setting data in the register 6. Therefore, the burden on the control of the CPU is very light, and when the microcomputer is used simultaneously for the sequence control of the copying machine and the printer, the design can be freely performed without concern for the processing time and the like, and the efficiency is very high. Processing becomes possible.

FIG. 3 shows an application example in which a high-voltage power supply for a copying machine, a printer, or the like is controlled by using the apparatus shown in FIG. 1, and the dotted line shows the apparatus shown in FIG. Figure 8 is a driver including an oscillation circuit for driving the primary side of the transformer T _1, the other Q ₁ to Q ₃ is a switching element transistor, R ₁ to R ₉ are resistors,
C ₁ -C ₈ capacitors, D ₁ to D ₃ are diodes.

In the above circuit, the transformer T ₁ is connected to the transistor Q ₁
The switching is driven by turning on and off the transformer T ₁
, An AC output of a predetermined frequency is generated on the secondary side. In the example shown in the figure, two outputs I and II are obtained, but they are rectified and smoothed by diodes D ₁ and D ₂ and capacitors C ₄ and C ₇ , respectively, and furthermore, the constant voltage control is performed by the output of the latch circuit 4. Is done.

Taking the output I as an example, here the transformer T ₁
The output of the rectifier in the diode D ₁ and capacitor C _4, performs smoothing, via a filter circuit of the capacitor C _2, C ₃ resistors R _6, R _7, the transistor Q ₂ in the signal of the output A of the latch circuit 4 The output I is controlled by directly switching. The detection of the output control is performed by inputting to detect the resistance R ₂ and the voltage divided by R ₃ voltage output I to the external input terminal of the multiplex circuit 1. Then, as described above, the value input from the outside is compared with the value of the reference voltage generating means 2 using the comparator 3, and the result is held in the latch circuit 4 and taken out as each output.

FIG. 4 is a view showing a second embodiment of the present invention. This embodiment uses a register 10 and a D / A converter 11, and uses the R
Data stored in OM or result RAM of CPU processing
Is input to the comparator 3 through the register 10 and the D / A converter 11 as a reference value.

With such a configuration, a desired control value can be obtained without fixing the reference value. in this case,
The D / A converter 11 can be controlled by the CPU via the CPU bus 7, and the output of the comparator 3 is H, L
It is possible to measure the output level of the detection output by changing the reference value while being a binarized signal. FIG. 5 is a timing chart showing the operation of the comparator 3.

Although FIG. 4 shows a case of one input, it is naturally possible to perform input switching using a multiplex circuit.

FIG. 6 shows an application example in which a halogen lamp of a copying machine or the like is controlled by using the apparatus of FIG. 4, and the dotted line is the apparatus of FIG. In the figure, 12 is a line input power, the halogen lamp is connected to the photo-triac 14 13, T ₂ is conversion transformer, D ₄ are diodes, C ₉ are capacitors, R ₁₀ to R ₁₂
Is resistance.

The output A of the latch circuit 4 is connected to the photodiode of the phototriac 14, and the lighting of the halogen lamp 13 is controlled by the output A. Terminal voltage of the halogen lamp 13 is insulated and a voltage converter for the effective value detected by the conversion transformer T _2. Then, the secondary output of the conversion transformer T ₂ is pseudo-converted into an effective value by a diode D ₄ , resistors R ₁₁ and R ₁₂ and a capacitor C ₉ , and is sent to an external input 1 of the multiplex circuit 1 as an error signal. Is entered.
This error signal is compared with the output of the D / A converter 11 by the comparator 3, and as a result, the lighting ratio of the halogen lamp 13 changes, and the lighting voltage is stabilized. At that time, the D / A converter 11
By changing the input data to, it is possible to control the start and stop of lighting and to perform a soft start operation.

〔The invention's effect〕

As described above, according to the present invention, the pulse is input to the control device from the latch circuit that holds the result of the comparator at the repetition period, so that the load on the CPU is reduced and the processing time is shortened. , System miniaturization,
The effect that low cost can be achieved is obtained.

In addition, since the comparator and the latch circuit are formed on the same chip together with the CPU, ROM, RAM, and the like, and the sequence control and the load control such as the power supply can be performed by one CPU, the system size and cost can be further reduced. Can be promoted.

[Brief description of the drawings]

1 (a) and 1 (b) are a block diagram showing a circuit configuration and a circuit diagram of a comparator according to a first embodiment of the present invention, FIG. 2 is an operation timing chart thereof, and FIG. FIG. 4 is a block diagram showing a circuit configuration of a second embodiment of the present invention, FIG. 5 is a timing chart showing its operation, and FIG. 6 is an application example of the apparatus shown in FIG. FIG. 3 is a circuit configuration diagram showing 1 Multiplex circuit 2 Reference voltage generating means 3 Comparator 4 Latch circuit 5 Timing generator 6 Register 7 CPU bus 10 Register 11 D / A converter

Continuation of the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) G05B 15/02 B41J 29/38 H03K 17/30

Claims (3)

(57) [Claims] An input circuit for receiving a plurality of signals including an output to a load connected to the power supply circuit, selecting and outputting each signal, and a reference for generating a reference voltage. Voltage generating means, a first switch for turning on and off a signal from the input circuit, a first switch for turning on and off a reference voltage from the reference voltage generating means, and a first switch and a second switch, respectively. A capacitor connected in series, an inverter connected in series with the capacitor, and a third switch connected to both ends of the inverter; the first switch, the second switch, and the By turning on and off the switch 3 at a predetermined timing, a signal from the input circuit is compared with a reference voltage from the reference voltage generation circuit, and a binary signal is output. And a latch circuit that holds an output from the comparator, and supplies the output of the latch circuit as a control signal to the power supply circuit at a predetermined timing. Control device. 2. The method according to claim 1, wherein the comparator and the latch circuit are connected to a CP.
2. The device according to claim 1, wherein the U, ROM, RAM, timer, and system clock generator are formed on the same chip.
A control device for the power supply circuit according to the above. 3. The input circuit according to claim 1, wherein outputs to a plurality of loads connected to the power supply device are input, and one of the plurality of outputs is supplied to the comparator at a predetermined timing. 2. The control device for a power supply circuit according to claim 1.