JP2982441B2 - Microwave monolithic integrated circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microwave monolithic integrated circuit (MMIC), and more particularly to a MMIC having a via hole PHS (plated heat sink) structure.

[0002]

2. Description of the Related Art In a conventional MMIC, as shown in FIG.
Via holes for connection to the (gold) plating 5 are formed. Alternatively, as shown in FIG. 2B, there is a semiconductor device in which the heat conduction of the FET unit 2 is improved by thickening the Au plating 5 when the semiconductor substrate 1 is partially thinned.

[0003] In any case, the wiring 7 of the MMIC usually constitutes a microstrip line. In the MMIC in which the semiconductor substrate 1 is made of GaAs, the thickness of the semiconductor substrate 1 immediately below the wiring 7 is processed to about 100 μm.

[0004]

The characteristic impedance of the microstrip line used for the wiring of the MMIC is determined by the resistance of the wiring, the capacitance between the wirings, the inductance of the wiring, and the grounding capacitance of the wiring.

Since the ground capacitance is determined by the dielectric constant and thickness of the semiconductor substrate, the thicker the semiconductor substrate, the smaller the ground capacitance and the smaller the transmission loss of the microstrip line.

For a power FET or the like that generates a large amount of heat, there is a method of thinning a part of the semiconductor substrate 1 and embedding Au plating 5 having a large thermal conductivity as shown in FIG. 2B. On the other hand, when the semiconductor substrate 1 is thick, the processing accuracy when forming the via holes 3 is deteriorated. As the thickness of the semiconductor substrate 1 increases, the inductance in the via hole 3 also increases, so that there is a limit to the thickness of the semiconductor substrate 1.

Therefore, wiring loss, thermal resistance of the FET section,
It is necessary to optimize the thickness of the semiconductor substrate 1 in consideration of conflicting conditions such as via hole processing accuracy.

[0008]

SUMMARY OF THE INVENTION A microwave monolithic integrated circuit according to the present invention comprises an FET section and a via hole on a semiconductor substrate on which a plurality of individual elements and their wirings are formed.
An insulating layer having a lower dielectric constant than the semiconductor substrate is formed on a back surface of the semiconductor substrate except for a periphery of the semiconductor substrate .

[0009]

FIG. 1 (a) shows a first embodiment of the present invention.
This will be described with reference to FIG.

An electric circuit composed of a plurality of individual elements and their wirings is formed on the front surface of the GaAs substrate 1a, and is processed to a thickness of 30 μm by polishing the back surface. Further, via holes 3 for connecting the front electrode to the back Au plating 5
Are formed.

An insulating film 4 made of polyimide having a thickness of 50 μm is formed on the back surface of the GaAs substrate 1 except for the periphery of the FET portion 2 and the via hole 3. An Au plating 5 having a thickness of 20 μm is formed on the insulating film 4.

The FET portion 2 and the via hole 3 are formed on a GaAs substrate 1 having a thickness of 30 μm. The wiring 7 constituting the microstrip line and others are formed on the GaAs substrate 1a having a thickness of 30 μm and the insulating film 4 having a thickness of 20 μm. The dielectric constant of the insulating film 4 made of polyimide is about 3, which is smaller than the dielectric constant 12 of the GaAs substrate 1, so that the total thickness of the GaAs substrate 100
m or more.

The insulating film 4 has a thickness of 30% on the GaAs substrate 1.
After polishing the back side to μm, the polyimide film is
It is formed by thermocompression bonding at 0 to 300 ° C. and selective etching.

Next, a second embodiment of the present invention will be described with reference to FIG.

In this embodiment, after the back surface of the GaAs substrate 1 is polished to deposit a silicon oxide film 6 having a thickness of 1 μm,
It has a three-layer structure in which an insulating film 4 made of polyimide is formed. The surface contamination is further reduced as compared with the first embodiment, and the leak current can be reduced.

[0016]

By forming an insulating film on a part of the back surface of the semiconductor substrate, the apparent thickness can be locally reduced around the FET portion and the via hole and increased at the wiring. As a result, the heat dissipation of the FET can be improved, and the wiring width of the microstrip line can be optimized.

Since the semiconductor substrate is thinned in advance, the processing accuracy of the via hole is improved. It is possible to reduce the size of the via hole and improve the reliability of the MMIC.

[Brief description of the drawings]

FIG. 1A is a cross-sectional view showing a first embodiment of the present invention. (B) is a sectional view showing a second embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a conventional microwave monolithic integrated circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 1a GaAs substrate 2 FET part 3 Via hole 4 Insulating film 5 Au plating 6 Silicon oxide film 7 Wiring

Claims (1)

(57) [Claims] 1. A semiconductor substrate having a plurality of individual elements and wirings formed thereon, wherein an FET section and a via hole are formed.
A microwave monolithic integrated circuit in which an insulating layer having a smaller dielectric constant than the semiconductor substrate is formed on a back surface of the semiconductor substrate excluding sides .