JP2979631B2 - Stencil mask forming method - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electron beam lithography technique for microfabrication of a semiconductor device, and more particularly, to a stencil mask in reduction transfer type electron beam lithography using a stencil mask. It relates to a forming method.

2. Description of the Related Art Electron beam lithography technology is used as a tool for advanced development of LSIs because it does not require the use of a reticle and can form a fine pattern. 2. Description of the Related Art Conventionally, a widely used electron beam writing method is a method in which patterns are sequentially drawn one by one by a Gaussian beam or a variable shaped beam using a field emission type or a thermionic electron gun. Called the law. That is, an electron beam generated from an electron gun can be focused on a resist surface by a converging lens into a narrow beam spot, and the position of the beam spot can be controlled by a deflection system to draw an arbitrary solid on the resist. Is the way. This method has the advantage that the distortion and aberration inside the deflection field can be electrically corrected, and the accuracy can be increased depending on the control technique, and many methods have been developed and put to practical use. However, on the other hand, in this method, the spot diameter of the electron beam is about 0.1 to 2 μm, so that the number of spots to be drawn becomes enormous along with the size of the drawing pattern, and the operating frequency of the deflection system is limited. Therefore, there is a disadvantage that the spot moving speed is limited, the time required for drawing becomes extremely long, and the throughput is reduced.

Therefore, recently, in order to solve these drawbacks, a reduction transfer method has been devised in which a partial pattern is transferred using a mask instead of drawing all the patterns of an LSI chip as a single stroke. . In other words, this method is a method in which a repetitive area of an LSI pattern is decomposed into small area partial patterns, this pattern is formed on a stencil mask, and the pattern is sequentially transferred using this mask. However, this method is expected to have a very high throughput, but it is very difficult to form a stencil mask to be used. For example, FIG. 4 shows an example of a stencil mask forming method that is currently considered.

An acceleration voltage of 50 kV and a dose of 1 × are applied to a semiconductor silicon substrate 11.
Implant boron ions at 10 ¹⁹ cm ^-1
41 are formed (FIG. 4A). An epitaxial layer 43 of silicon is formed thereon, and a nitride film is deposited on the epitaxial layer as a protective film 44 (FIG. 4B). Thereafter, the back surface of the semiconductor silicon substrate is etched to a boron injection layer with an ethylene glycol pyrocatechol solution to remove the protective film (FIG. 4 (c)).

A resist pattern 45 is formed on the epi layer by using an electron beam lithography technique (FIG. 4D).

Using the resist pattern 45 as a mask, the epi layer and the ion-implanted layer are etched to form a mask pattern (FIG. 4D).

With the above-described method, a stencil mask used in electron beam reduction transfer lithography can be formed. However, in this method, a protective film must be deposited, and a mask for stopping the electron beam only by the ion-implanted layer and the epi-layer needs to be provided. It's not easy.

Problems to be Solved by the Invention As described above, when only a silicon material is used in a stencil mask used for electron beam reduction transfer lithography, a film thickness of several tens μm or more is required. In FIG.
It shows the range of electrons in Si with respect to the acceleration voltage of the electron beam. Usually, the acceleration voltage used in electron beam lithography is 20 to 50 keV, so that a silicon film as a mask requires a film thickness of about 20 μm. In addition, silicon itself is fragile and has a drawback that it is easily cracked. Undoped silicon has poor electron conductivity, and there is also a problem that charge-up occurs due to irradiation with an electron beam and the beam shifts. That is, it is desired that the stencil mask be as thin as possible, have mechanical strength, good electronic conductivity, and good dimensional stability and thermal stability due to temperature change.

Therefore, it is conceivable to deposit a metal on the surface of the silicon mask to prevent charge-up or to reduce the film thickness. FIG. 3 also shows the range of electrons in the case of gold as in the case of silicon. Since gold cannot be etched, it can only be deposited on the mask surface,
Further, they are very difficult to treat as impurities in a silicon semiconductor process. Further, when the electron beam is irradiated on the mask, heat is generated, and the mask is deformed.
Gold is 14.2 × 10 ^-6 deg ^-1 compared to × 10 ^-6 deg ^-1 , and the thermal conductivity of silicon is 1.7 cm-deg and gold is 3.1 cm-deg. It is conceivable that the mask is distorted by depositing. The present inventors have completed a method of forming a stencil mask for electron beam reduction transfer lithography in order to solve these problems.

Means for Solving the Problems A stencil mask forming method of the present invention comprises the steps of: implanting boron into a surface of a semiconductor silicon substrate by a high energy ion implantation technique; and depositing tungsten on the entire surface of the boron implanted layer; Forming a resist pattern thereon by using an electron beam lithography technique, etching the tungsten layer and the boron implanted layer using the resist pattern as a mask to transfer the pattern, and removing a silicon portion of the semiconductor silicon substrate from the back surface And depositing tungsten on the back surface of the boron implanted layer. Preferably, the high-energy ion implantation has an energy of 1 MeV or more and a dose of 1 × 10 ¹⁹ cm ⁻² or more, and the film thickness of tungsten deposited on the front and back surfaces of the semiconductor silicon substrate is equal, and A method is provided that is at least μm.

Still further, the present invention provides a method of implanting boron into a surface of a semiconductor silicon substrate by a high-energy ion implantation technique and depositing polysilicon and tungsten over the entire surface of the boron implanted layer, From the step of depositing tungsten on the back surface of the boron implanted layer, and forming a resist pattern on the tungsten layer deposited on the surface of the semiconductor silicon substrate using electron beam lithography, using the resist pattern as a mask , The tungsten layer,
Etching the polysilicon layer and the boron implanted layer to transfer the pattern. Preferably, the high-energy ion implantation has an energy of 1 MeV or more and a dose of 1 × 10 ¹⁹ cm ⁻² or more, and the film thickness of tungsten deposited on the front and back surfaces of the semiconductor silicon substrate is equal, and μ
m is provided.

That is, since the atomic masses of gold and tungsten are close to each other and the range of electrons in tungsten is almost the same as that of gold as shown in FIG. Tungsten is deposited on the surface. This tungsten has a thermal expansion coefficient and a thermal conductivity of 4.5 × 10 ⁻⁶ deg ⁻¹ and 1.7 cm · deg, respectively, which are very close to those of silicon. In addition, it has a high electronic conductivity, excellent mechanical strength, and can be used in a silicon semiconductor process. Furthermore, by depositing tungsten on both the front and back surfaces of silicon,
Thermal distortion can be completely prevented.

According to the present invention, it is possible to easily form a stencil mask for electron beam reduction transfer lithography, which has a small thickness and does not cause beam distortion due to charge-up, by the above-described mask forming process. In particular, by using a silicon material and tungsten having a value close to both the coefficient of thermal expansion and the coefficient of thermal conductivity, there is no occurrence of thermal strain and there is no need to deposit gold. it can. That is, by using tungsten-silicon, it is possible to form a stencil mask having excellent mechanical strength, and good dimensional stability and thermal stability due to temperature change. Therefore, by using the present invention, a thin, accurate and thermally stable
Effectively works for stencil mask formation.

Embodiment First, an outline of the present invention will be described. According to the present invention, a thin and practical stencil mask having no thermal strain can be formed by depositing tungsten on both the front and back surfaces of silicon. Since the atomic masses of silicon, tungsten, and gold are 28, 184, and 197, respectively, the range of electrons is the longest for silicon and almost the same for tungsten and gold. In addition, since silicon and tungsten have similar values of both the thermal conductivity and the coefficient of thermal expansion, they are not distorted by the influence of heat due to the electron beam. Further, tungsten can be used in a semiconductor silicon process, and a pattern can be transferred by dry etching, so that a pattern can be easily and accurately formed as a stencil mask for electron beam reduction transfer lithography.

Embodiment 1 FIG. 1 shows a first embodiment of the present invention. Acceleration energy 2 MeV, dose 1 × 10 ¹⁹ cm on semiconductor silicon substrate 11
^-2 boron ions 13 were implanted. The formed ion-implanted layer 12 had a thickness of about 10 μm (FIG. 1A). A tungsten layer 14 was deposited thereon to a thickness of about 3 μm, and a resist was formed on the tungsten layer by using an electron beam lithography technique. A pattern 13 was formed (FIG. 1 (b)). Using this resist pattern as a mask, the tungsten layer is dry-etched using CBrF ₃ gas, and the ion-implanted layer is subjected to pattern transfer by dry etching using CCl ₄ gas. Was obtained (FIG. 1 (c)). This substrate was immersed in an ethylene glycol pyrocatechol solution to dissolve and remove only the silicon region 11 (FIG. 1 (d)). Then, a stencil mask having excellent mechanical strength and high thermal stability without heat distortion was formed by depositing a tungsten layer 16 to a thickness of about 3 μm from the back surface of the substrate (FIG. 1). (E)).

As described above, according to the present embodiment, by depositing tungsten on the front and back surfaces of the semiconductor silicon substrate, a practical electron beam capable of shielding electrons even when the acceleration voltage of the electron beam is 50 keV. A stencil mask for reduction transfer lithography can be formed.

(Embodiment 2) FIG. 2 shows a second embodiment of the present invention. Acceleration energy 2 MeV, dose 1 × 10 ¹⁹ cm on semiconductor silicon substrate 11
^{At -2} , boron ions 22 were implanted. The formed ion implantation layer 21 was about 10 μm (FIG. 2A). A polysilicon layer 23 was deposited thereon to a thickness of 1 μm, and a tungsten layer 24 was deposited to a thickness of 2 μm (FIG. 2B). Thereafter, the substrate was immersed in an ethylene glycol pyrocatechol solution to dissolve and remove only the silicon region 11. On the back surface of this substrate, a tungsten layer 25 was deposited to a thickness of 2 μm. (FIG. 2 (c)). A resist pattern 26 was formed on the tungsten layer 24 by using an electron beam lithography technique.
Figure (d). Using this resist pattern as a mask, the tungsten layer is dry-etched with CBrF ₃ gas, and the polysilicon layer and ion-implanted layer are further etched with CCl ₄ gas to provide accurate, excellent mechanical strength and heat stability. A stencil mask having high properties was able to be formed (FIG. 2 (e)).

As described above, according to the present embodiment, by depositing tungsten on the front surface and the back surface of the semiconductor silicon substrate, electrons can be sufficiently shielded even if thin without distortion due to heat, and beam due to charge-up can be obtained. It is possible to form an accurate and practical stencil mask for electron beam reduction transfer lithography, which does not cause displacement.

Effects of the Invention As described above, according to the present invention, high-energy ion implantation of a semiconductor silicon substrate is performed, and tungsten is deposited on the front surface and the back surface of the semiconductor silicon substrate. An accurate, thin, and highly practical stencil mask that is high, has no distortion due to heat, does not cause a beam shift due to electron charge-up, and can be easily formed. In addition, tungsten has a heavy atomic mass and an electron range of 10 μm or less.Thus, a thin film with a mask thickness of 10 μm or less can sufficiently shield electrons, and acts as a stencil mask for electron beam reduction transfer lithography. Can greatly contribute to the manufacture of ultra-high density integrated circuits.

[Brief description of the drawings]

1 is a process sectional view of one embodiment of the present invention, FIG. 2 is a process sectional view of another embodiment, FIG. 3 is a diagram showing an electron range with respect to an acceleration voltage of an electron beam, and FIG. FIG. 2 is a process sectional view of a conventional stencil mask forming process. 11 ... semiconductor silicon substrate, 12 ... boron injection layer, 13 ...
... boron ions, 14, 16 ... tungsten layer, 15 ... resist pattern.

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-2-276235 (JP, A) JP-A-2-170411 (JP, A) JP-A-2-307210 (JP, A) JP-A-59-1979 184526 (JP, A) (58) Fields studied (Int. Cl. ⁶ , DB name) H01L 21/66 H01L 21/30 G03F 7/20

Claims (6)

(57) [Claims] A step of implanting boron into the surface of a semiconductor silicon substrate by a high-energy ion implantation technique and depositing tungsten on the entire surface of the boron implanted layer; and forming a resist on the tungsten layer by using an electron beam lithography technique. Forming a pattern, using the resist pattern as a mask, etching the tungsten layer and the boron-implanted layer to transfer the pattern, removing a silicon portion of the semiconductor silicon substrate from the back surface, and forming tungsten on the back surface of the boron-implanted layer. And a step of depositing a stencil mask. 2. The high energy ion implantation has an energy of 1M.
2. The stencil mask forming method according to claim 1, wherein the dose is not less than eV and the dose is not less than 1 × 10 ¹⁹ cm ⁻² . 3. The stencil mask forming method according to claim 1, wherein the thickness of tungsten deposited on the front surface and the back surface of the semiconductor silicon substrate is equal to each other and is 0.5 μm or more. 4. A step of implanting boron into the surface of the semiconductor silicon substrate by a high energy ion implantation technique, depositing polysilicon and tungsten over the entire surface of the boron implanted layer, and removing a silicon portion of the semiconductor silicon substrate from the back surface. Depositing tungsten on the back surface of the boron implanted layer, and forming a resist pattern on the tungsten layer deposited on the surface of the semiconductor silicon substrate using an electron beam lithography technique, using the resist pattern as a mask, Etching a tungsten layer, a polysilicon layer and a boron implanted layer to transfer a pattern. 5. The method according to claim 1, wherein the high-energy ion implantation has an energy of 1M.
5. The stencil mask forming method according to claim 4, wherein the dose is not less than eV and the dose is not less than 1 × 10 ¹⁹ cm ⁻² . 6. The stencil mask forming method according to claim 4, wherein the film thickness of tungsten deposited on the front surface and the back surface of the semiconductor silicon substrate is equal and is 0.5 μm or more.