JP2958597B2 - IC package manufacturing method and plating frame - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing an IC package and a plating frame, and more particularly, to plating of pins and conductor patterns in an IC package such as a PGA substrate having a large number of pins attached to the bottom surface. The present invention relates to a method of manufacturing an IC package capable of improving the yield in a process and a plating frame used in the method.

[0002]

2. Description of the Related Art In an IC package, the surface of a pin or a conductive pattern is oxidized on the surface of a pin or a conductive pattern on the surface of the package in order to improve electrical continuity with an external circuit. To prevent corrosion,
A conductive metal such as gold or nickel is plated.

[0003] Conventionally, the following method has been employed for plating the surfaces of the pins and the conductor patterns. That is, 1) the ends of the pins of the package are brought into contact with the elastically deformable wire mesh electrode, the package and the wire mesh electrode are clamped with clips, immersed in a plating solution, and the wire mesh is placed on a plating rack. A configuration in which a conductive pattern is applied to the pins and the package by energizing the metal (see Japanese Utility Model Laid-Open No. 1-119058); 2) a holding plate having holes instead of the wire mesh electrodes; ,
A configuration using an elastic thin metal plate provided with a pin contact portion made of a spiral notch or a spiral spring formed by cutting out at a position corresponding to the hole of the holding plate (see Japanese Patent Application No. 4-48688); 3) An implanted arrangement pin having a number of pins implanted on a conductive metal plate made of a Ni-containing Fe alloy plate was obtained, and the pins of the implanted arrangement pins were brazed to the metallized layer of the package with a brazing material. Thereafter, the pins and the conductor pattern are plated through the planted arrangement pins, and then the leg portions of the pins are cut at required positions (Japanese Patent Laid-Open No. 1-111).
Nos. 5153 and 1-168049).

[0004]

However, the above configuration has the following problems. That is, 1) above 1)
In the case of 2), when a thin plate electrode such as a wire mesh or a metal plate is pressed against the pins of the package and plating is performed, poor electrical contact occurs between the pins and the thin plate electrodes. 2) In the case of 3) above, it is necessary to create planting arrangement pins in advance, and it is necessary to make sure that there is no misalignment with the pinning position of the IC package when creating them. It costs. Further, when the above-mentioned implanted arrangement pins are implanted on a conductive metal plate by a laser or the like, it is necessary to perform a later-performed joining process using a high-melting-point brazing material having a higher temperature than the temperature for joining the pins to the package side. . Also, it takes time and effort to form the pins after the plating process. And other issues.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to provide a process of plating pins and conductor patterns in an IC package having a large number of pins mounted on a bottom surface. It is an object of the present invention to provide a method of manufacturing an IC package which can improve the yield and workability of the IC package and a plating frame used in the method.

[0006]

According to another aspect of the present invention, there is provided an IC package having a conductor pattern and a plurality of pins electrically connected to the conductor pattern. In the manufacturing method of (1), at a position corresponding to the pin of the IC package, a hole having a diameter smaller than the tip diameter of the pin is provided, and a plurality of slits or notches are provided around the hole. Using a plating frame made of a conductive material having a pin holding portion, inserting the tip of the pin into the hole of the plating frame, pushing and deforming the pin holding portion, and separating the plating frame and the pin. After joining and plating the pin and the conductor pattern via the plating frame,
The plating frame is removed, and a position closer to the IC package body side than a contact portion between the pin and the pin holding portion is cut.

Further, the plating frame of the present invention is made of a conductive material, has a hole having a diameter smaller than the tip diameter of the pin at a position corresponding to the pin of the IC package, and has a plurality of holes around the hole. A pin holding portion is formed by the slit or the notch, a pin of the IC package is inserted into the small-diameter hole, the pin holding portion is expanded and deformed, and the pin is joined. The pin and the conductor pattern of the IC package can be plated, and the pin insertion side of the pin holding portion is formed to be thin by half etching.

[0008]

According to the method of manufacturing an IC package of the present invention, the bonding between the pin of the pinned IC package and the plating frame as an electrode is performed by connecting the pin with a smaller diameter than the tip diameter of the pin formed on the plating frame. Insert into the hole,
Since this is performed by pushing and deforming the pin holding portion formed around the small-diameter hole, the joining can be easily performed, and the electrical contact between the pin and the electrode is ensured. Can be easily separated from the plating frame. Also, work such as welding the pin to the plating frame is not required.

Further, the plating frame of the present invention is an IC frame.
Since a hole having a diameter smaller than the tip diameter of the pin is provided at a position corresponding to the pin of the package, insertion and positioning of the pin can be easily performed, and a plurality of slits or notches are provided around the hole. Since the pin holding portion is formed by the slit or the notch, the pin can be easily joined by pushing and deforming the pin holding portion. In addition, since the pin holding portion is formed to be thin with respect to other portions by half-etching, insertion positioning is further facilitated, and insertion and joining of the pin can be facilitated.

[0010]

Embodiments of the present invention will be described below with reference to the drawings. Here, FIG. 1 to FIG.
FIG. 1 is a plan view of a plating frame, FIG. 2 is a partially enlarged view of FIG. 1, FIG. 3 is a sectional view taken along line AA of FIG. 2, and FIG. FIG. 5 is a process diagram for explaining a manufacturing process, and FIG.
FIG. 7 is a vertical sectional view illustrating the concept of the C package, and FIG. 7 is a partially enlarged plan view of another embodiment of the plating frame.

The method of manufacturing an IC package according to this embodiment is as follows.
Briefly, there are five steps: 1) preparation step, 2) pin-plating frame joining step, 3) plating step, 4) plating frame removing step, and 5) pin cutting step. Next, each step will be described.

-Preparation Step- This step is a preparation step for plating.
C package 1 and IC package 1 pins 2, 2, ...
This is a step of preparing a plating frame 3 that matches the arrangement of the plating. Here, the IC package 1 is a PGA ceramic package having a conductor pattern 4 to be joined to a semiconductor element, and pins 2, 2,... Made of metal such as Kovar, 42 alloy, or copper are brazed on the back surface. And the conductor pattern 4 and the pins 2, 2,.
(See FIG. 5a). Here, the ends of the pins 2, 2,... Are formed in a curved surface or an acute angle, and if necessary, the pins 2, 2,.

The plating frame 3 is provided with lattice-shaped openings 6, 6,... By punching or etching a thin plate (etching plate or the like) such as Kovar, 42 alloy plate, stainless steel plate, steel plate, or copper plate. In the frame, preferably,
The pins 2, 2,... Are made of the same material as the metal. In the plating frame 3, holes 7, 7,... Smaller in diameter than the pins 2, 2,.
Are formed around the hole, and a pin holding portion 10 having four holding pieces 9, 9,... Formed by notches 8, 8,. Further, the pin insertion side (the front side in the drawing) of the pin holding portion 10 is formed to be thin with respect to other portions of the frame 3 by half etching. In the present embodiment, the diameter a of the pins 2, 2,.
The diameter b of the holes 7, 7,.
The pin holding portion 10 has an outer diameter c of 0.8 mm.

-Pin-Plating Frame Bonding Step- This step is performed in the following manner.
This is a step of joining the plating frame 3 to 2. In this step, the pins 2, 2,... Are placed on the die 11 using a frame setting device (see FIG. 5B) including the die 11, the guide pin 12, the frame holding member 13, and the upper punch 14.
The IC package 1 is placed with its face upward, and the pins 2, 2,... Are positioned at predetermined positions of the frame holding member 13 (in advance, at the positions of the holes 7, 7,... Of the plating frame 3). After the plating frame 3 prepared in the preparatory step is placed at the set position), the upper punch 14 is pressed along the guide pin 12 so that the pins 2, 2
Are inserted into the holes 7, 7,... Of the plating frame 3 and are joined by deforming the holding pieces 9, 9,. Here, pins 2, 2
Since the tip is formed in the shape of a curved surface or an acute angle, it fits into the holes 7, 7,... And acts so as not to cause displacement.

-Plating Step- This step is a step of subjecting the pins 2, 2,..., And the conductor pattern 4 of the IC package 1 to electrolytic plating. In this step, first, the IC package 1 to which the plating frame 3 is bonded is mounted on the plating rack 15 and then connected to the cathode side, and a Ni plate or Au plate for plating is connected to the anode side, and plating is performed. Immerse in the liquid (see FIG. 5c). And
When energized, the pins 2, 2... To be plated and the conductor pattern 4 are electrically connected by the plating frame 3 forming electrodes. And the conductor pattern 4 can be plated. The plating may be Ni plating or A plating.
u plating is used.

-Plating Frame Removal Step- This step is a step of removing the plating frame 3 to which the pins 2, 2,...
Since the plating frame 3 is formed by joining the pins 2, 2,..., And the conductor pattern 4 for plating, it is necessary to remove them. In the present embodiment, a frame removing device including an IC package holding table 16, a fork 17, and a fork lifting member 18 (see FIG. 5D).
The fork 17 is inserted between the pins 2, 2,... In the joined state, and the fork lifting member 18 is operated to separate the pins 2, 2,.

-Pin cutting step- This step is performed by separating the pins 2, 2,.
This is a step of cutting into a predetermined length and molding. Since the pins 2, 2,... In contact with the pin holding portions 10 of the plating frame 3 are not plated, the pins 2, 2,... Shape the cutting tip accordingly. The cutting is performed with a cutting blade while keeping the pins 2, 2,... In a stable state with respect to the IC package 1 (see FIG. 5e).

Through the above steps, the pins 2, 2,... And the conductor pattern 4 of the IC package 1 can be accurately and easily subjected to electrolytic plating, and the length of the pins 2, 2,. IC package 1 with adjusted length
Can be obtained. The pins 2, 2,... And the plating frame 3 are joined together by connecting the pins 2, 2,... To the holes 7, 7,.
, And the pin holding portions 10, 10,... Formed around the small diameter holes 7, 7,... Are expanded and deformed, so that the joining can be easily performed. Also, holding pieces 9, 9,.
Are formed thinner than other portions of the plating frame 3 by half-etching, so that the deformation due to the pushing of the pins 2, 2,... Can be made in a better state, so that the pins 2, 2,. A good bonding state can be obtained. Then, the semiconductor element 19 is mounted on the semiconductor element mounting portion of the IC package 1, bonded, and sealed with the cap 20, thereby obtaining a semiconductor product (see FIG. 6).

It should be noted that the present invention is not limited to the above-described embodiment, but includes a configuration that can be modified and implemented without changing the gist of the present invention. By the way, in the above-described embodiment, the description has been made of the configuration in which the pin holding portion is formed of the four notches formed by the four notches, but as shown in FIG.
The holding piece may be configured to include five holding pieces or five or more pieces, or the holding piece may be formed by slits. Further, the plating frame may have a strip shape or another configuration in addition to the configuration having the lattice-shaped openings.

[0020]

As is apparent from the above description, according to the method for manufacturing an IC package of the present invention, the bonding between the pin of the pinned IC package and the plating frame as an electrode is performed by using the pin for plating. Insertion into a hole smaller in diameter than the tip diameter of the pin formed in the frame and pushing and expanding and deforming the pin holding portion formed around the small diameter hole facilitates the joining. In addition, the electrical contact between the pin and the electrode is ensured, the pin and the plating frame after the plating process can be easily separated, and the work of welding the pin and the plating frame can be eliminated. Having. Therefore, the plating of the pins and the conductor patterns of the IC package can be simplified.

Further, according to the plating frame of the present invention, since a hole having a diameter smaller than the tip diameter of the pin is provided at a position corresponding to the pin of the IC package, the pin can be easily inserted and positioned. In addition, since the plurality of slits or notches are provided around the hole, and the pin holding portions are formed by the slits or notches, the pins are expanded and deformed to join the pins. In addition, the pin holding portion is formed thin with respect to other portions by half-etching, so that the insertion positioning is further facilitated, and the insertion and joining of the pin is facilitated. It has the effect of being able to.

[Brief description of the drawings]

FIG. 1 is a plan view of a plating frame according to an embodiment of the present invention.

FIG. 2 is a partially enlarged view of FIG.

FIG. 3 is a sectional view taken along line AA of FIG. 2;

FIG. 4 is a cross-sectional view showing a state where pins of an IC package are joined.

FIG. 5 is a process chart for explaining a manufacturing process.

FIG. 6 is a longitudinal sectional view illustrating the concept of an IC package.

FIG. 7 is a partially enlarged plan view of another embodiment of the plating frame.

[Explanation of symbols]

1 ... IC package (PGA ceramic package), 2 ... Pin, 3 ... Plating frame, 4 ...
..Conductor pattern, 5: Through hole, 6: Opening of plating frame, 7: Hole, 8: Notch (slit), 9: Holding piece, 10: Pin Holder, 11: die, 12: guide pin, 13 ...
・ Frame holding member, 14 ... Upper punch, 15 ...
Plating rack, 16 ... IC package holder, 1
7 ... fork, 18 ... fork lifting member,
19: semiconductor element, 20: cap

──────────────────────────────────────────────────続 き Continuation of the front page (72) Inventor Hiroyuki Shinya 2701-1, Iwakura, Omine-cho, Omine-cho, Mine-shi, Yamaguchi Pref. Sumitomo Metal Ceramics Co., Ltd. JP-A-6-302742 (JP, A) JP-A-6-302743 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H01L 23/50 C25D 7/00 C25D 17/08

Claims (2)

(57) [Claims] 1. A method of manufacturing an IC package having a conductor pattern and a number of pins electrically connected to the conductor pattern, wherein a hole having a diameter smaller than the tip diameter of the pin is formed at a position corresponding to the pin of the IC package. And having a plurality of slits or notches around the hole, using a plating frame made of a conductive material having a pin holding portion formed by the slit or notch, and inserting a pin into the hole of the plating frame. Inserting the tip, pushing and deforming the pin holding portion, joining the plating frame and the pin, plating the pin and the conductor pattern through the plating frame, and then removing the plating frame A method for manufacturing an IC package, comprising: removing a pin and cutting a position closer to the IC package body from a contact portion between the pin and the pin holding portion. 2. A pin made of a conductive material and having a diameter smaller than the tip diameter of the pin at a position corresponding to the pin of the IC package, and having a plurality of slits or notches around the hole. A pin holding portion is formed by the slit or notch, a pin of the IC package is inserted into the small-diameter hole, the pin holding portion is expanded and deformed, and the pin is joined to join the pin and the conductor pattern of the IC package. A plating frame, wherein a plating process is enabled, and a pin insertion side of the pin holding portion is formed thin by half etching.