JP2952603B2 - Video coding control method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] A moving picture coding control system that records moving pictures with high efficiency coding and also enables easy reverse playback is provided. For the purpose of performing inner coding and enabling high efficiency coding by motion compensation, one screen of an input moving image signal is divided into a plurality of blocks,
A first encoding unit that performs inter-frame encoding by performing transform encoding for each block, and a second encoding unit that performs intra-frame encoding by performing transform encoding corresponding to the block,
A motion compensator for performing motion compensation processing corresponding to blocks between frames, a controller for controlling switching between the first and second encoders, and an image recorder for recording and reproducing encoded video signals And a control unit configured to control the coding unit of the motion 2 with respect to a block having a fixed period in a plurality of blocks configuring the one screen and a block in a motion compensation search range by the motion compensation unit. Is performed, and when a motion vector is not detected by the motion compensating unit, the block in the motion compensation search range is regarded as the block of the fixed cycle, and the block of the fixed cycle in the next frame is It was configured to set a block.

[Industrial applications]

The present invention relates to a moving picture coding control system which records a moving picture with high efficiency coding, and also enables easy reverse reproduction.

In a system that records a moving image on a recording medium such as a magnetic tape, a magnetic disk, or an optical disk, and reproduces the moving image when necessary, a moving image is displayed on a screen. The amount of recorded information is reduced by performing high-efficiency coding by transform coding and inter-frame coding.

In such a moving image recording / reproducing method, there is a demand to further compress and encode the moving image by motion compensation and to facilitate reverse reproduction or cueing from an arbitrary position.

[Conventional technology]

For example, the following method is known as a conventional coding method for performing magnetic recording or optical recording by encoding a moving image with high efficiency.

(1). A method in which the first frame of a moving image sequence is intra-frame encoded, and the second and subsequent frames are inter-frame encoded.

(2). A method in which the first frame of a moving image sequence is intra-frame encoded, the second and subsequent frames are inter-frame encoded, and intra-frame encoding is performed on a frame-by-frame basis at a certain fixed frame period.

(3). A method in which the first frame of a moving image sequence is intra-frame encoded, the second and subsequent frames are inter-frame encoded, one screen is divided into a plurality of blocks, and intra-frame encoding is performed in block units at a fixed block cycle. .

FIG. 14 is a block diagram of a conventional example according to the method (3), wherein 41 is an adder, and 42 and 52 are discrete cosine converters (DC
T), 43 is a quantizer (Q), 44 is an inverse quantizer (), 45
Is an inverse discrete cosine transformer (IDCT), 46 is an adder, 47 is a frame memory (FM), 48 is a control unit, 49 is a counter, 50 is a memory, and 51 is an interframe coding or an intraframe coding. A determination circuit for determining whether to perform, 53 is a variable length encoder,
54 and 55 are changeover switches, and 56 is a recording device.

The input video signal is added to an adder 41 and a discrete cosine converter.
52 and a judgment circuit 51. Selector switch 54, 55
Is controlled by the control unit 48, the changeover switch 54 is off,
When the changeover switch 55 is turned on, inter-frame encoding is performed,
Conversely, when the changeover switch 54 is on and the changeover switch 55 is off, intra-frame encoding is performed.

In the case of inter-frame coding, the difference from the moving image signal of the previous frame from the frame memory 47 is obtained in the adder 41, and the discrete cosine transform is performed by the discrete cosine transformer 42, and the DCT coefficient obtained thereby is obtained. Are quantized by the quantizer 43, are variable-length coded by the variable-length encoder 53, and are added to the recording device 56. The output signal of the quantizer 43 is inversely quantized by an inverse quantizer 44, and is output by an inverse discrete cosine transformer.
An inverse discrete cosine transform is performed by 45, the moving image signal of the previous frame from the frame memory 47 is added by the adder 46, and the result is added to the frame memory 47 as a moving image signal of the current frame.

In the case of intra-frame encoding, the discrete cosine transformer 52
DCT, and the resulting DCT
The coefficients are quantized by the quantizer 43, and the variable length encoder 53
, And is added to the recording device 56.

The recording device 56 also records auxiliary information indicating whether the encoding is inter-frame encoding or intra-frame encoding, together with the encoded moving image signal.

Further, the control unit 48 includes a counter 49 and a memory 50, divides one screen into a plurality of blocks, and displays, by the memory 50, a block position where intra-frame encoding is performed on a block basis at a constant block cycle. The block position is shifted to
4, 55, and switches between inter-frame coding and intra-frame coding for each block as described above.

Further, the determination circuit 51 determines whether the amount of information is smaller in intra-frame encoding than in inter-frame encoding, and by adding the determination signal to the control unit 48, even if the block is not a block with a fixed block cycle, Intra-frame coding is forcibly performed.

FIG. 15 is a flowchart of a conventional example, and shows the operation of the control unit 48 in FIG. First, the memory 50
Is M (M1, M2), the cycle is S, the value of the counter 59 is a, and the initial values of the memory 50 are set by the following steps. That is, a = 0, M (I, J) (the block position of one screen is indicated by I, J of X and Y coordinates), and I = 1
, J = 1, the value a of the count content is added by modulo S, and the result is used as the content M (I, J) of the memory 50. Then, J = J + 1, it is determined whether or not J> M2. If J> M2, the process proceeds to a step. If J> M2, I = I + I, and it is determined whether I> M1.
When it is not M1, the process proceeds to the step, and when I> M1, the process proceeds to the step. At this time, the contents of the memory 50 are initialized.

Then, the block No. U, V for the input video signal
(The block number indicated by the X and Y coordinates of one screen) is performed, and it is determined by the determination circuit 51 whether or not to perform the intra-frame coding. M (U, V) for the corresponding block number
= 1 and intra-frame encoding is performed on the block of "1", and if the prediction result is not intra-frame encoding, inter-frame encoding is performed and the processing of block Nos. U and V ends. Then, it is determined whether or not one frame is completed.
At the end of the frame, 1 is added to the contents of the memory 50 by modulo S. Thus, intra-frame encoding is performed for each block in each frame of the period S.

[Problems to be solved by the invention]

In the above-mentioned conventional example, in the method (1), since the first frame is intra-frame coded, it is necessary to perform the reproduction process after returning to the first frame. And reverse playback is difficult.

In the method (2), intra-frame encoding is performed periodically on a frame basis, so that forward reproduction and reverse reproduction can be performed with the frame subjected to intra-frame encoding as a start point. . However, in order to facilitate the reproduction start or the reverse reproduction start from such a midway,
The number of frames to be subjected to intra-frame encoding must be increased, and high-efficiency encoding of a moving image signal cannot be performed.

In the method (3), intra-frame coding is performed by dispersing the blocks into blocks. Therefore, when the number of frames of the period S is reproduced, one screen can be constituted by the intra-frame coded blocks. Therefore, reproduction from the middle and reproduction in the reverse direction become easy.

However, there is a disadvantage that it is impossible to introduce motion compensation prediction. That is, in FIG. 16, if the hatched block A is an intra-frame coded block and the white block C is an inter-frame coded block or a block having no image information at the time of reproduction, n frames to n + 4 When there is no motion vector for a frame, by reproducing four frames from frame n to frame n + 3, intra-frame coded video signals are read out for all blocks of one frame, and one frame is formed by intra-frame coding. Will be. Also in the reverse reproduction, the intra-frame coded video signal is read for all the blocks of one screen by reproducing four frames, so that the reproduction processing in the reverse direction can be performed from that point.

However, when there is a motion vector, for example, when a motion vector indicated by an arrow is detected during reproduction of the (n + 1) -th frame, assuming that the block B has already been processed, as described above, all the blocks in the (n + 3) -th frame are processed. This means that the intra-frame decoding has been performed, and at that time, the decoded image information is written to the already processed block corresponding to the motion vector. That is, a normal reproduced moving image cannot be obtained.

SUMMARY OF THE INVENTION It is an object of the present invention to perform intra-frame encoding of a plurality of blocks of one screen at a fixed period and enable highly efficient encoding by copper compensation.

[Means for solving the problem]

The moving image coding control method of the present invention performs switching between inter-frame coding and intra-frame coding for each block and performs motion compensation processing, and will be described with reference to FIG.

One screen of the input video signal is divided into a plurality of blocks,
A first encoding unit 1 that performs interframe coding by performing transform coding such as discrete cosine transform for each block, and performs intraframe coding by performing transform coding such as discrete cosine transform for each block. A second encoding unit 2 for performing the motion compensation and a motion compensation unit 3 for performing a motion compensation process corresponding to a block between frames
And an image recording unit 5 for recording and reproducing encoded moving image signals
The control unit 4 controls the second encoding unit 2 for a block having a fixed period in a plurality of blocks constituting one screen and a block in a motion compensation search range by the motion compensation unit 3. , And when a motion vector is not detected by the motion compensating unit 3, the block in the motion compensation search range is regarded as a block having a fixed period in the next frame, and This is to omit setting of a block having a constant cycle.

Further, a decoding unit 6 for decoding the encoded moving image signal reproduced from the image recording unit 5 is provided so that the blocks for performing intra-frame encoding at a constant period are linearly formed in the vertical or horizontal direction of one screen. When the information is added to the block sequence and added to the information located at the end of one screen, the information is recorded in the image recording unit 5, and when the image data is reproduced from the image recording unit 5 and decoded by the decoding unit 6,
The decoding starts from a frame in which the block sequence of the intra-frame coding is located at the end of one screen.

[Action]

One screen of the input moving image signal is divided into a plurality of blocks as shown in the image recording unit 5, and the control block 4 switches the first and second encoding units 1 and 2 to correspond to the block. The intra-frame coding and the intra-frame coding are performed on the block, and the intra-frame coding is performed on the block having a fixed period and the blocks in the motion compensation search range by the motion compensation unit 3. For example, assuming that the motion compensation search range is one block, if a hatched block shown in the image recording unit 5 is a block having a constant period, the block and the blocks shown by solid lines on both sides thereof are intra-coded blocks. And the block indicated by the dotted line is the inter-frame coded block.

When a motion vector is not detected by the motion compensating unit 4, there is no effect on adjacent blocks at the time of reproduction. Therefore, blocks in the motion compensation search range (blocks indicated by solid lines) are regarded as blocks having a fixed period. , A block having a fixed period in the next frame is set.

When blocks with a fixed period are arranged in the vertical direction as shown in the figure, this block row is recorded in the image recording unit 5 with auxiliary information positioned at the left end or the right end. It is possible to start decoding from a frame in which the intra-frame coded block sequence is located at the left end or the right end, and to prevent image disturbance when displayed by a moving image signal output from the decoding unit 6. The same applies to the case where the block rows are arranged in the horizontal direction.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 2 is a block diagram of an embodiment of the present invention.
Is an adder, 12, 13 is a discrete cosine transformer (DCT), 14 is a quantizer (Q), 15, 31 is an inverse quantizer (), 16, 32 is an inverse discrete cosine transformer (IDCT), 18 , 33 is the frame memory (F
M), 19 is a variable delay circuit (VDLY), 20 is a motion compensator, 21
Is a control unit, 22 is a counter, 23 is a memory having areas M, MX, MV, and VX, 24 and 25 are changeover switches, 26 is a direction information processing unit, 2
7 is a variable length coder (VLC) that performs Huffman coding, etc., 28
Denotes a recording device for performing magnetic or optical recording, 29 denotes a variable length decoder, 30 denotes a decoding unit, and 34 denotes a display device.

The adder 11, the discrete cosine transformer 12, the quantizer 14, the inverse quantizer 15, the inverse discrete cosine transformer 16, the adder 17, the frame memory 18, and the variable length encoder 27 perform inter-frame encoding. A first encoder 1 for performing intra-frame encoding is configured by the discrete cosine transformer 13, the quantizer 14, and the variable-length encoder 27, and a motion compensation is performed. The motion compensator 3 is composed of the device 20 and the variable delay circuit 19. The control unit 21 includes a counter 22 and a memory 23. In the memory 23, intra-frame encoding is controlled according to the contents of each area M, MX, MV, VX corresponding to a block obtained by dividing one screen into a plurality of blocks. The content is updated by the counter 22 and the motion compensator 20.

The decoding unit 30 includes an inverse quantizer 31, an inverse discrete cosine transformer 32, and a frame memory 33.
Switching between inter-frame decoding and intra-frame decoding is performed in accordance with the auxiliary information read from 28, and the decoded video signal is added to the display device 34 and displayed.

The input video signal is added to an adder 11, a discrete cosine converter 13,
In addition to the motion compensator 20 and the direction information processing unit 21, when the changeover switch 24 is off and the changeover switch 25 is on, inter-frame encoding is performed. Is controlled, the moving image signal of the previous frame read from the frame memory 18 is delayed in the direction of the motion vector, the difference from the input moving image signal is obtained by the adder 11, and the discrete cosine transform is performed by the discrete cosine transformer 12. And the resulting DCT coefficients are quantized by the quantizer 1.
4, quantized by a variable-length encoder 27, and recorded in a recording device 28.

Further, the direction information processing unit 26 causes the recording device 28 to record the information indicating the direction of the motion vector by the motion compensator 20 as auxiliary information via the variable length encoder 27.

The output signal of the quantizer 14 is inversely quantized by the inverse quantizer 15 to become a DCT coefficient, becomes the original inter-frame difference signal by the inverse discrete cosine transformer 16, and is added to the moving image signal of the previous frame by the adder 17. The sum is added to the frame memory 18 as a moving image signal of the current frame.

When the changeover switch 24 is on and the changeover switch 25 is off, intra-frame encoding is performed, and the input video signal is subjected to discrete cosine transform by the discrete cosine transformer 13,
The resulting DCT coefficient is quantized by the quantizer 14, is variable-length coded by the variable-length encoder 27, and is added to the recording device 28.

FIG. 3 and FIG. 4 are explanatory diagrams of the operation of the embodiment of the present invention, and show a case where intra-frame coded blocks having a constant period S are arranged in the vertical direction. FIG. 3 (a) shows that in the case of a 10 × 8 block, the period S = 10, the block numbers 10 to 1 are initialized as shown in the first frame F1, and the block with the number 1 is subjected to intra-frame coding. In the next frame F2, the number of each block is incremented by 1 with modulo S = 10, and as a result, the block with the number 1 is set as an intra-frame coded block. The intra-frame coded block sequence in the vertical direction is sequentially shifted rightward, and when the intra-frame coded block sequence is at the left end in the first frame F1, the right-end position is determined in the S-th frame FS. Will shift. In this case, motion compensation cannot be applied as described above.

(B) is a block for performing intra-frame encoding on the blocks on both sides of the intra-frame coded block sequence so that motion compensation can be applied. Intra-frame coding is performed with the block number being set to 1 for both blocks on both sides.

(C) shows the operation of the embodiment of the present invention. When a motion vector is detected, as shown in (b), the blocks on both sides of the original intra-frame coded block sequence are also converted to the intra-frame code. When the motion block is not detected, the intra-frame coded blocks on both sides of the original intra-frame coded block sequence are regarded as the original intra-frame coded block sequence in the next frame.

For example, since the first column of the first frame F1 is the original intra-frame coded block sequence and the second column is also intra-frame coded, when no motion vector is detected, the second column of the second frame F2 The intra-frame coded block sequence is assumed to be already processed and the intra-frame coding is omitted, and all blocks are inter-frame coded. Thereby, coding efficiency can be improved.

FIG. 4E corresponds to FIG. 3A and FIG.
Shows the operation of another embodiment of the present invention. When no motion vector is detected in the first frame F1, the second frame
The intra-frame coded block sequence of the second column in F2 is regarded as already processed, and the third column is regarded as the original intra-frame coded block sequence. Is performed. Therefore, the first
After returning to the state of the frame F1 after the frame S '(<S), one screen by the intra-frame coded block when the motion vector is not detected is reduced by a short frame number (FS> F).
S ′).

Further, with respect to the intra-frame coded block sequence in the first frame F1, auxiliary information indicating that it is located at the end of one screen is added to facilitate identification of decoding start at the time of reproduction.

5 and 6 are flowcharts of one embodiment of the present invention, in which M3, M2 in each area M, MX, VX, MV of the memory 23.
(M3 is the number of blocks constituting one screen in the horizontal direction, M2 is the number of blocks in the vertical direction), the cycle is S, and the value of the counter 22 is a (1). Next, the value of the counter 22 is set to a = 0 (2), and the horizontal block position I of each area of the memory 23 is set to I
= 1 (3), MX (I) = a, M (I) = a, MV (I) =
(4), and the value a of the counter 22 is +
Do one (5).

Next, I = I + 1 (6), it is determined whether I> M3 or not (7). If I is not larger than M3, the process proceeds to step (4). If I is larger than I, the process is completed for one screen. , "1" is written to the area MX for each block having a constant period. Next, I = 1 (8), and it is determined whether MX (I) = 1 (9). That is, it is determined whether or not the number of the block in the area MX is “1” indicating that intra-frame encoding is performed. If not "1", the process proceeds to step (11). If "1", M (I-1) = 1, M (I + 1)
= 1 (10). That is, the number is set to "1" in order to make the blocks on both sides of the block for performing the original intra-frame coding also the blocks for performing the intra-frame coding.

Then, I = I + 1 is set (11), and it is determined whether I> M3 (12). If I is not larger than M3, the process goes to step (9). If I is larger than M3, the process for one frame is ended. (13).

With the above processing, "1" is set in the area M for the inner coded block in the original frame and the blocks in the motion compensation search range on both sides of the inner coded block.

Then, a motion compensation process with the next frame is performed, and the value of the motion vector is stored in the area VX of the memory 23 (14). In this case, the value of the rightward vector is 1 and the value of the leftward vector is −
1 and a motion vector that does not span the horizontal block,
That is, the value of the 0 vector is set to 0. And
I = 1 (15), it is determined whether MX (I) = 1 (16),
If not 1, proceed to step (22). If 1, J =
As 1 (17), it is determined whether or not VX (I−1, J) = 1 (1
8) It is determined whether VX (I + 1, J) =-1 (20).
That is, it is determined whether the block is a rightward vector or a leftward block.
Steps (18) and (20) are partially omitted, and are performed in the range of J = 1 to M2. When VX (I-1, J) = 1, that is, when the vector is rightward, MV (I-1) = 1 (19), and VX (I + 1, L)
= −1, that is, not a leftward vector, MV
(I + 1) = 1 is set (21), and the process proceeds to step (22).

Then, a block for performing intra-frame encoding is set by “1” of the content of the area MV of the memory 23,
The changeover switches 24 and 25 are controlled in accordance with the contents of this area MV, so that inter-frame coding and intra-frame coding are switched corresponding to blocks.

Next, I = I + 1 (22), it is determined whether I> M3 or not (23). If I is not larger than M3, the process proceeds to step (16). MX (*) = MV (*) and MX (*) = MX (*) +
1 is performed by modulo S (24), and the process goes to step (6) to set the intra-frame coded block for the next frame. Therefore, the contents of MV (*) are changed to steps (19), ( In the next frame, the block in the motion compensation search range for the original fixed cycle block is regarded as a fixed cycle block, and a block to be subjected to intra-frame encoding is set in the next frame. become.

FIGS. 7, 8, 9 and 10 are flowcharts of another embodiment of the present invention, in which the operation shown in FIG. 4 (d) is performed. Similar to step (1) in FIG. 5, M3, M2 (M3, M2) in each area M, MX, VX, MV of the memory 23
Is the number of blocks forming one screen in the horizontal direction, M2 is the number in the vertical direction), the cycle is S, the value of the counter 22 is a (31), and then the step (2) in FIG. ) To (5), the value of the counter 22 is set to a = 0 (31), the horizontal block position I of each area of the memory 23 is set to I = 1 (32), MX
(I) = a, M (I) = a, MV (I) = a (33), and the value a of the counter 22 is incremented by 1 by modulo S (35).

Next, I = I + 1 is set (36), and it is determined whether I> M3 (3
7) When the horizontal block position I is not larger than the number M3 of blocks in the horizontal direction, the process proceeds to step (34). When the block position I is larger, the counter value a of the area M, MX, MV of the memory 23 by the modulo S is changed. This means that the block has been set. Then, I = 1 (38), and it is determined whether MX (I) = 1 (39).

If MX (I) = 1, go to step (46)
(I) In the case of ≠ 1, I = I to shift to the next block
It is set to +1 (40), it is determined whether I> M3 or not (41). If not I> M3, steps (39) to (41) are repeated. That is, it is determined in step (39) whether or not “1” indicating frame encoding exists in the area MX. And I> M3
If there is no “1” even if “1” does not exist, there is no “1” block indicating intra-frame coding, for example, as in the second and fourth frames in FIG. 3 (C).
I = 1 (42), MX (I) = MX (I) +1 is calculated by modulo S (43), I = I + 1 (44), and until I> M3 by the determination in step (45). Steps (43) and (44) are repeated. Therefore, there is a block of “1” indicating the intra-frame encoding.

Then, I = 1 (46), it is determined whether MX (I) = 1 or not (47). If MX (I) ≠ 1, the process proceeds to step (49), and if MX (I) = 1, Is M (I-1) = 1, M (I +
1) = 1 is set (48). That is, it is set to “1” indicating that the intra-frame encoding is also performed on the blocks on both sides of the block on which the intra-frame encoding is performed.

Then, I = I + 1 is set (49), it is determined whether I> M3 or not (50). If not I> M3, the process proceeds to step (47),
When I> M3, processing for one frame is completed (51).

Then, motion compensation with the next frame is performed, and the value of the motion vector is stored. VX (M3, M2) sets the value of the rightward vector to 1, the value of the leftward vector to -1, and the value of the 0 vector to 0. (52). Next, I = 1 (53), and MX (I) = 1
Is determined (54), and if MX (I) ス テ ッ プ 1, step (6)
5) When MX (I) = 1, J = 1 is set to check blocks in the vertical direction (55), and MX (I−1, J) = 1.
It is determined whether or not (56). If it is not 1, the process proceeds to step (58). If it is 1, MV (I-1) = 1 is set (57).

Next, J = J + 1 is set (58), and it is determined whether J> M2 (5).
9) If not J> M2, go to step (56) and J> M
In the case of 2, J is set to 1 again, and it is determined whether or not VX (I + 1, J) =-1 (61). If not, the flow proceeds to step (63).
When it is -1, MV (I + 1) = 1 is set (62). And J
= J + 1 (63), it is determined whether J> M2 (64), and J>
If it is not M2, the flow goes to step (61) to check the direction of the motion vector corresponding to the block in the vertical direction, and to set a block to be subjected to intra-frame encoding. When J> M2, I = I +
1 (65), it is determined whether I> M3 or not (66). If not I> M3, the process proceeds to step (54). If I> M3, I = 1 (67) and MX (I) = MV (I) (68), MX (I) =
MX (I) +1 is calculated by modulo S (69), and I = I
+1 is set (70), it is determined whether I> M3 or not (71). If not I> M3, the process proceeds to step (68), and if I> M3, the process returns to step (38) again.

In this embodiment, step (4) in FIG.
According to 2) to (45), when a motion vector does not enter, a block around a block to be originally subjected to intra-frame encoding is regarded as a block to be originally subjected to intra-frame encoding, and the processing can be shifted to the next processing. It was made. Steps (52) to (71) in FIGS. 9 and 10 show the steps (14) to (23) in FIG. 6 in detail.

When a moving image is displayed on the display device 34 after being reproduced from the recording device 28, the variable-length decoder 29 decodes a variable-length code from the encoded image signal read from the recording device 28.
At this time, the auxiliary information is also variable-length encoded and recorded, so that the auxiliary information is also variable-length decoded.

The decoding unit 30 includes an inverse quantizer 31 and an inverse discrete cosine transformer 32
And a frame memory 33 and the like, and decodes a quantized moving image signal that has been subjected to variable-length decoding based on auxiliary information. In this case, it is possible to adopt a configuration in which the inverse quantizer 15, the inverse discrete cosine transformer 16, and the frame memory 18 for encoding are shared. Then, the decoded moving image signal is added to the display device 34 and displayed.

By dividing one screen into a plurality of blocks and performing intra-frame encoding at a fixed period S, it is possible to reproduce from an arbitrary frame position. However, from the viewpoint of performing motion compensation, for example, FIG. In FIG. 4, decoding is started from the frame located at the left end, such as the first frame F1, in which the block sequence to be originally subjected to intra-frame encoding is performed. That is, since there is no block example on the left side of the block sequence at the left end of the first frame F1, the effect of motion compensation from that block sequence is not exerted, so that intra-frame decoding is started from this block sequence. . In this case, as described above, the auxiliary information is added and recorded in the storage device 28. Therefore, at the time of reproduction, it is sufficient to start the intra-frame decoding of the left end block column in the frame from which the auxiliary information has been read. become. At the time of reverse reproduction, decoding is started from the frame where the original intra-frame coded block sequence is located at the right end.

In the above-described embodiment, the blocks having the fixed period S are arranged linearly in the vertical direction as shown in FIGS. 3 and 4. However, when the blocks are arranged in the horizontal direction, the original Decoding starts from the frame at the upper end of the intra-frame coded block sequence, and starts decoding from the frame at the lower end during reverse reproduction.

FIG. 11 and FIG. 12 are explanatory diagrams of intra-frame coding blocks for motion compensation. Assuming that a hatched block BL1 is a block for which intra-frame coding is performed periodically, the motion compensation search range is set to one. When the number of blocks is equal to one, the intra-frame coding block is also subjected to intra-frame coding for the surrounding block BL2. Therefore, even in the case of a motion vector as indicated by an arrow, a correct moving image can be decoded by intra-frame decoding.

The block BL1 for periodically performing intra-frame encoding is the first block.
In the case of arrangement in the vertical direction as shown in FIG. 2, as described above, both side blocks BL2 are used as intra-frame coded blocks, and three columns of intra-frame coded blocks are formed. . For a block that performs such intra-frame encoding, at the start of encoding of the frame, “1” is set to the address corresponding to the block in the area MV of the memory 23, and the intra-frame encoded block is set in accordance with the contents of the area MV. And the inter-frame coded block are controlled.

Looking at the DCT coefficient of an 8 × 8 pixel block,
As shown in FIG. 13, (1,1) of the X and Y coordinates of the adjacent block
The coefficient (indicated by a black circle) indicates a DC component, and a difference between blocks can be obtained and encoded. That is,
This is a kind of DPCM processing, and the coding efficiency can be improved.

The present invention is not limited to the above-described embodiments, and various additions and changes are possible. For example, it is possible to perform transform coding other than discrete cosine transform.

〔The invention's effect〕

As described above, the present invention applies the second encoding unit 2 to a block having a fixed period S in a plurality of blocks constituting one screen and a block in a motion compensation search range by the motion compensation unit 3. , And when no motion vector is detected by the motion compensation unit 3,
Since the blocks in the motion compensation search range are subjected to intra-frame encoding, they are regarded as blocks having a fixed period S, and as shown in FIG. 3 (c) or FIG. In this frame, a block having a fixed period S in the frame is set, high-efficiency encoding is performed by applying motion compensation, and forward reproduction and reverse reproduction can be performed from the middle.

When a moving image is displayed by reproducing from the image recording unit 5,
As in the first frame F1 in FIGS.
By adding and recording auxiliary information to the intra-frame coded block sequence located at the end of the screen, starting intra-frame decoding from the intra-frame coded block sequence having this auxiliary information allows motion Even when compensation is performed, a correct moving image can be reproduced.

[Brief description of the drawings]

1 is a diagram for explaining the principle of the present invention, FIG. 2 is a block diagram of an embodiment of the present invention, FIGS. 3 and 4 are diagrams for explaining the operation of the embodiment of the present invention, and FIGS. FIG. 7, FIG. 8, FIG. 9, and FIG. 10 are flow charts of another embodiment of the present invention, and FIG. 11 and FIG. Explanatory diagram of an encoding block,
FIG. 13 is an explanatory diagram of a difference between DC components, FIG. 14 is a block diagram of a conventional example, FIG. 15 is a flowchart of a conventional example, and FIG. 16 is an explanatory diagram when motion compensation is applied. Reference numerals 1 and 2 denote first and second encoding units, 3 denotes a motion compensation unit, 4 denotes a control unit, 5 denotes an image recording unit, and 6 denotes a decoding unit.

Continuation of the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H04N 1 / 41,5 / 92 H04N 7 / 24,11 / 04

Claims (2)

(57) [Claims] 1. A first encoding unit (1) for dividing one screen of an input moving image signal into a plurality of blocks, performing transform coding for each block, and performing inter-frame coding, A second encoding unit (2) for performing intra-frame encoding by performing transform encoding of: a motion compensation unit (3) for performing motion compensation processing corresponding to blocks between frames; A control unit (4) that controls switching of the decoding units (1, 2); and an image recording unit (5) that records and reproduces encoded moving image signals. Accordingly, a frame by the second encoding unit (2) is used for a block having a fixed period in a plurality of blocks constituting one screen and a block in a motion compensation search range by the motion compensation unit (3). Inner coding is performed, and the motion compensator (3) detects the motion vector. When the block is not output, the block of the motion compensation search range is regarded as the block of the fixed cycle in the next frame, and the setting of the block of the fixed cycle in the next frame is omitted. Video coding control method. 2. A first encoding unit (1) for dividing one screen of an input image signal into a plurality of blocks, performing transform coding for each block and performing inter-frame coding, A second encoding unit (2) that performs transformation encoding to perform intra-frame encoding; a motion compensation unit (3) that performs motion compensation processing corresponding to blocks between frames; and the first and second codes. Control unit (4) for controlling the switching of the encoding unit (1, 2); an image recording unit (5) for recording and reproducing the encoded moving image signal; and reproduction from the image recording unit (5). A decoding unit (6) for decoding an encoded moving image signal, wherein the control unit (4) controls the motion compensation unit (3); And the block in the motion compensation search range by the second encoding unit (2). Intra-frame encoding is performed, and a block sequence by the intra-frame encoding is set to be linear in the vertical or horizontal direction of one screen, and information that the block sequence is located at an end of one screen is added. Then, the image data is recorded in the image recording unit (5), reproduced from the image recording unit (5), and decoded by the decoding unit (6). A moving picture coding control method characterized by starting from a positioned frame.