JP2950811B1 - Super lattice semiconductor light emitting device - Google Patents

Abstract

A superlattice semiconductor light emitting device which can be manufactured using an inexpensive silicon substrate without toxicity and which can operate stably at room temperature is provided. SOLUTION: Intrinsic semiconductor i-layer 15 having a superlattice structure
And the intrinsic semiconductor i-layer 15 includes a first barrier layer 21, a first quantum well layer 22a, a second barrier layer 21, a second quantum well layer 22b, and a third barrier layer. A plurality of layers of one cycle in which the layer 21 and the active layer 23 are sequentially formed are stacked in plural cycles, and the quantum well layers 22a and 22b and the active layer 23 are made of silicon or amorphous silicon. Further, each thickness is set such that # 1 of the quantum well layers 22a and 22b and # 2 of the active layer 23 have the same energy level. Electrons existing in # 1 of the quantum well layer 22a are converted into # 1 of the second quantum well layer and # 2 of the active layer 23.
To # 1 of the active layer through to emit light.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a superlattice semiconductor light emitting device having a superlattice structure.

[0002]

2. Description of the Related Art In recent years, light-emitting elements that can be used in light sources for optical communication and measurement, optical integrated circuits, and the like have been actively studied. Recently, for example, in the prior art document "Notomi et al.," Quantum well layer intersubband transition laser ", Applied Physics, Vol. 64, No. 7, pp. 672-677, 199.
As described in "5 Years", a semiconductor laser having a structure different from a semiconductor laser widely used at present is proposed. The semiconductor laser disclosed in the above-mentioned prior art document is called a quantum cascade laser, and realizes laser oscillation using transition between subbands of a quantum well of a superlattice semiconductor.

In a quantum well layer of a superlattice semiconductor having such a superlattice structure, electrons of a second quantization level (second levelΓ2 points) are converted to a first quantization level (first level). Level Γ1
In order to emit light by relaxing to (point), it is necessary to realize a so-called population inversion in which the number of electrons at the second quantization level is larger than the number of electrons at the first quantization level. . In this conventional quantum cascade laser, electrons at the second quantization level of the quantum well layer are transited to the first quantization level of a quantum well layer spatially separated from the quantum well layer. As described above, by using a special structure in which the period of the superlattice is not constant, the population inversion is realized, and the electrons at the second quantization level of the quantum well layer are separated from the quantum well layer spatially separated from the quantum well layer. Light is emitted by transitioning to the first quantization level of the well layer.

[0004]

However, in the above-described quantum cascade laser using the intersubband transition of the related art, it is attempted to manufacture the substrate using an expensive gallium arsenide material that contains toxic arsenic as a substrate. Attempted. Furthermore, due to the low thermal conductivity of the material,
There is a problem that cooling to an extremely low temperature is required for continuous oscillation.

An object of the present invention is to solve the above-mentioned problems and to provide a superlattice semiconductor light emitting device which can be manufactured using an inexpensive silicon substrate without toxicity and which can operate stably at room temperature. It is in.

[0006]

According to a first aspect of the present invention, there is provided a superlattice semiconductor light emitting device comprising an intrinsic semiconductor layer having a superlattice structure between two electrodes, and having a bias voltage applied thereto. In the lattice semiconductor device, the intrinsic semiconductor layer includes a first barrier layer, a first quantum well layer, a second barrier layer, a second quantum well layer, a third barrier layer, and an active layer which are sequentially formed. The first and second quantum well layers and the active layer are made of silicon or amorphous silicon.
A first quantization level of the first quantum well layer and a second quantization level of the second quantum well layer;
The first quantization level of the quantum well layer and the second quantization level of the active layer.
The thicknesses of the first and second quantum well layers and the active layer are set so that the quantization levels of the first and second quantum well layers are substantially the same. After the electrons present at the first quantization level are transited to the second quantization level of the active layer via the first quantization level of the second quantum well layer, the active layer The light emission is obtained by making a transition from the second quantization level to the first quantization level.

A superlattice semiconductor light emitting device according to a second aspect is the superlattice semiconductor light emitting device according to the first aspect.
The barrier layer has substantially the same lattice constant as the first and second quantum well layers and the active layer, and has a higher lattice constant than the material of the first and second quantum well layers and the active layer. It is characterized by being made of a material having a large band gap.

Further, the superlattice semiconductor light emitting device according to claim 3 is the superlattice semiconductor light emitting device according to claim 1 or 2, wherein the intrinsic semiconductor layer is an intrinsic semiconductor i layer,
The superlattice semiconductor light-emitting device is provided between the two electrodes,
The superlattice semiconductor light emitting device further includes a p-type semiconductor layer and an n-type semiconductor layer sandwiching the intrinsic semiconductor i-layer.
Wherein the bias voltage is a reverse bias voltage.

Further, the superlattice semiconductor light emitting device according to claim 4 is the superlattice semiconductor light emitting device according to claim 1 or 2, wherein the intrinsic semiconductor layer is an intrinsic semiconductor i layer,
The superlattice semiconductor light-emitting device is provided between the two electrodes,
The superlattice semiconductor light emitting device further includes an n-type semiconductor layer and an n-type semiconductor layer sandwiching the intrinsic semiconductor i layer.
A semiconductor device.

Further, the superlattice semiconductor light emitting device according to the fifth aspect is the superlattice semiconductor light emitting device according to any one of the first to fourth aspects, wherein the superlattice semiconductor light emitting device is the intrinsic semiconductor layer. , Laser oscillation is provided by providing two reflecting surfaces provided opposite to each other so as to reflect at least a part of the light emitted from the intrinsic semiconductor layer.

[0011]

Embodiments of the present invention will be described below with reference to the drawings.

<Embodiment> FIG. 1 is a sectional view showing a superlattice semiconductor light emitting device 10 according to an embodiment of the present invention. As shown in FIG. 1, the superlattice semiconductor light emitting device of the present embodiment is a heterojunction pin type diode semiconductor device including an intrinsic semiconductor i-layer 15 having a superlattice structure.
Are the first barrier layer 21, the first quantum well layer 22a, and the second
A layer for one period formed by sequentially forming a barrier layer 21, a second quantum well layer 22 b, a third barrier layer 21 (hereinafter, three barrier layers are referred to as barrier layers 21), and an active layer 23. The first and second quantum well layers 22a and 22b and the active layer 23 are made of silicon or amorphous silicon. Further, the first quantization level Γ1 of the first quantum well layer 22a and the second quantum well layer 2
The first and second quantum well layers 22a and 22b are so arranged that the first quantization level # 1 of the second quantum well 2b and the second quantization level # 2 of the active layer 23 have substantially the same energy level. In addition, each thickness of the active layer 23 is set. Then, in the superlattice semiconductor light emitting device 10 of the present embodiment, electrons present at the first quantization level Γ1 of the first quantum well layer 22a are replaced with the first quantization level of the second quantum well layer 22b. After the transition to the second quantization level # 2 of the active layer 23 via the level # 1, the transition from the second quantization level # 2 of the active layer 23 to the first quantization level # 1 is performed. Is characterized by obtaining light emission. In the superlattice semiconductor light emitting device 10 of the present embodiment, the barrier layer 21 preferably has substantially the same lattice constant as the first and second quantum well layers 22a and 22b and the active layer 23. In addition, a material having a larger band gap than the materials of the first and second quantum well layers 22a and 22b and the active layer 23, specifically, gallium phosphide (GaP), aluminum phosphide (AlP), calcium fluoride (CaF ₂₎ ) Or cadmium fluoride (CdF ₂ ).

In general, gallium arsenide-based materials and indium phosphide-based materials are widely used for light emitting elements. The reason is that since the free electrons and holes in these materials have the same momentum, they are of a so-called direct transition type having a high emission coupling probability. On the other hand, silicon used in the quantum well layers 22a and 22b and the active layer 23 in the present embodiment is of a so-called indirect transition type because free electrons and holes have different momentums, and the energy at the time of coupling becomes lattice vibration. It is well known that the material is extremely difficult to take out as light. However, in a quantum cascade laser that extracts transitions between subbands as light, it is only necessary to focus on electron levels or hole levels only. Transition can be performed, so that a light-emitting element can be manufactured.

FIGS. 3 to 8 are cross-sectional views showing the steps of manufacturing the superlattice semiconductor light emitting device 10 of FIG. 1. For the steps of manufacturing the superlattice semiconductor light emitting device 10 of the present embodiment, see FIGS. This will be described below.

(1) As shown in FIG. 3, an n-type impurity ion composed of Sb (antimony) is composed of, for example, n-type GaAs doped with a doping amount of 10 ¹⁸ / cm ^3, and the upper and lower plane orientations ( The n-type semiconductor substrate having a thickness of (1, 0, 0) having a thickness of 300 μm was subjected to ultrasonic cleaning in an acetone solution to remove the organic impurity layer 20a attached to the surface. (2) After the above cleaning, as shown in FIG. 4, after the surface is completely dried, the surface of the semiconductor substrate 20 is cleaned with a sulfuric acid-based etching solution (sulfuric acid: hydrogen peroxide solution: water = 5 ° C.) at 25 ° C. :
1: 1 (mass ratio)) for 1 minute,
The surface layer having a thickness of 1 to 2 μm is removed, and the layer having the stress and dislocation generated during the substrate surface treatment (mirror treatment) can be removed, and good crystal growth can be achieved.

(3) After performing a heat treatment at 650 ° C. in a vacuum to completely remove the surface oxide layer, as shown in FIGS. 1 and 5, each of the following layers was formed by sequentially growing crystals. (A) n doped with n-type impurity ions of Sb (antimony), for example, at a doping amount of 5 × 10 ¹⁷ / cm ³
1 μm thick n-type buffer layer 17 made of type Si. (B) An i-type cladding layer 16 made of i-type Si and having a thickness of 500 °. (C) 1 μm thick intrinsic semiconductor i-layer 15 having a superlattice structure. Here, the intrinsic semiconductor i-layer 15 is formed of the first barrier layer 2
1, the first quantum well layer 22a, the second barrier layer 21 and the second
Is formed by sequentially forming the quantum well layer 22b, the third barrier layer 21, and the active layer 23 in the order of 15 to 1
The first and second quantum well layers 22a and 22b and the active layer 23 are formed by stacking a plurality of cycles such as 00 cycles. The barrier layer 21 is made of gallium phosphide (GaP), aluminum phosphide (AlP), calcium fluoride (CaF ₂ ), or cadmium fluoride (Cd).
F ₂ ) or an electrically insulating layer (or dielectric layer). In addition, the first quantization level Γ1 of the first quantum well layer 22a and the first quantization level Γ of the second quantum well layer 22b are set.
1 and the second quantization level Γ2 of the active layer 23, as shown in FIG. 2, such that the first and second quantum well layers 22a, 22b and 22b have substantially the same energy level. Each thickness of the active layer 23 is set. In the present embodiment, the thickness d1 of the barrier layer 21 = 5 nm, the thickness d2 of the first quantum well layer 22a = 4 nm, and the thickness d3 of the second quantum well layer 22b =
4 nm, and the thickness d4 of the active layer 23 is set to 7 to 8 nm. In a preferred embodiment, only 15 to 100 periods are formed, in a more preferred embodiment 5
Only 0 cycles are formed. (D) An i-type cladding layer 14 of i-type Si having a thickness of 500 °. (E) A p-type impurity ion of Be (beryllium) doped with a doping amount of 1 × 10 ¹⁸ / cm ^3, for example.
A p-type cap layer 13 having a thickness of 2000 ° made of Si.

(4) As shown in FIG. 6, Mn / Au (1000/150) is formed on the upper surface of the uppermost p-type cap layer 13.
0 °) was formed. Here, the electrode 11
Forms an electrode material 11a by a lift-off method using a photosensitive organic thin film (resist pattern) 18;
A light output hole 11b penetrating in the thickness direction is formed at the center thereof to form the electrode 11 in a ring shape.
Next, as shown in FIG.
a was covered with a resist, and mesa etching was performed to cut off the connection between the electrodes of a plurality of devices, thereby performing device isolation. (5) Further, as shown in FIG.
AuGe / Ni / Au (= 1000Å / 300)
({1500}). (6) Finally, with respect to the element on which the electrode 12 is formed, 4
Heat treatment was performed at 00 ° C. for 1.5 minutes.
In step 2, an ohmic connection was obtained. Through the above manufacturing steps, the superlattice semiconductor light emitting device 10 is obtained.

As shown in FIG. 1, the positive electrode of the variable voltage DC power supply 30 is connected to the electrode 12 while the DC power supply 3
By connecting the negative electrode of 0 to the electrode 11, a reverse bias voltage is applied to the superlattice semiconductor light emitting device 10.

In the superlattice semiconductor light emitting device 10 configured as described above, a reverse bias voltage is applied to the electrodes 11 and 12.
When applied between the first quantum well layer 22a and the second quantum well layer 22b, the first quantization level Γ1 of the first quantum well layer 22a and the second quantization level The first level is set so that the quantization level Γ2 has substantially the same energy level.
And the thicknesses of the second quantum well layers 22a and 22b and the active layer 23 are set. Therefore, when a reverse bias voltage is applied between the electrodes 11 and 12, the first quantum well layer 22
The electrons existing at the first quantization level Γ1 of a are transited to the second quantization level Γ2 of the active layer 23 via the first quantization level Γ1 of the second quantum well layer 22b. After that, light emission can be obtained by making a transition from the second quantization level # 2 of the active layer 23 to the first quantization level # 1. Further, since the intrinsic semiconductor i-layer 15 is stacked in a plurality of cycles, light emission occurs over a period, and light emission having a large light emission intensity can be obtained. Here, the emitted light is light having a wavelength corresponding to the energy of the difference when the transition from the second quantization level # 2 of the active layer 23 to the first quantization level # 1.

In this embodiment, the light emitted from the intrinsic semiconductor i-layer 15 is, as shown in FIG. 1, from the side surface parallel to the thickness direction of the intrinsic semiconductor i-layer 15 in the thickness direction. It is configured to output in a direction perpendicular to the direction. However, the present invention is not limited to this, and the light emitted from the intrinsic semiconductor i-layer 15 is transmitted through the light output hole 11h provided in the electrode 11 through the i-type cladding layer 14 and the p-type cap layer 13. The signal may be output, or the signal may be output from the n-type semiconductor substrate 20 via the i-type cladding layer 16, the n-type buffer layer 17, and the n-type semiconductor substrate 20. In the case of outputting from the n-type semiconductor substrate 20 side, the i-type cladding layer 1
6, the n-type buffer layer 27 and the n-type semiconductor substrate 20 are formed thinly so as to transmit light, and the electrode 12
A light output hole (not shown) is formed in the same manner as the electrode 11, and the generated light is output from the hole.

<Modification> Next, a modification of the laser diode using the superlattice semiconductor light emitting device 10 will be described below. In the modification, first and second mirror layers (not shown) are formed on two sides of the intrinsic semiconductor i-layer 15 parallel to the thickness direction, respectively, as compared with the above embodiment. It is characterized by. Here, the first
The second mirror surface layer and the second mirror surface layer are formed to face each other with the intrinsic semiconductor i-layer 15 interposed therebetween, and each constitute a known Fabry-Perot mirror surface.

Here, the Fabry-Perot mirror surface is, for example, three times with respect to light generated in the intrinsic semiconductor i-layer 15.
In this modification, the orientation of the crystal of the n-type semiconductor substrate 20 is set to a predetermined direction, and the two side surfaces of the intrinsic semiconductor i-layer 15 are each a predetermined surface. After forming the intrinsic semiconductor i-layer 15 so as to have a cleavage surface, the side surface itself was used as a Fabry-Perot mirror surface by cleavage. In this case, Fabry
The reflectivity of the two side surfaces of the intrinsic semiconductor i-layer 15 used as the low mirror surface is not limited to 30%, and may be configured to reflect at least a part of light generated in the intrinsic semiconductor i-layer 15. In the modification, the interval between the two side surfaces of the intrinsic semiconductor i-layer 15 was set to 300 μm. However, the present invention is not limited to this, and the intrinsic semiconductor i
The distance between the two sides of the layer may be 100 μm or 50 μm.
It may be 0 μm, ie the spacing can be set arbitrarily so as to form a Fabry-Perot resonator.

With the above configuration, a Fabry-Perot resonator having two side surfaces can be formed on the intrinsic semiconductor i-layer 15 in the superlattice semiconductor light-emitting device 10. Is repetitively reflected by the Fabry-Perot resonator inside it and resonates, causing the superlattice semiconductor light emitting device 10 to oscillate in the laser mode, that is, to oscillate the laser at a large intensity.

<Another Modification> In the above embodiment, the first and second quantum well layers 22a and 22b and the active layer 23 are made of silicon. However, the present invention is not limited to this. , That is, aluminum silicon. In this case, it is possible to manufacture the semiconductor substrate 20 on a glass substrate that is more inexpensive and more rigid than the silicon single crystal substrate.

In the above embodiments and modifications, the layers at the upper and lower ends of the intrinsic semiconductor i-layer 15 are the first and second layers.
May be the quantum well layers 22a and 22b or the active layer 23, or the barrier layer 21.

In the above embodiments and modifications, the superlattice semiconductor light-emitting device 10 is a pin-type diode device. However, the present invention is not limited to this, and the p-type cap layer 13 may be replaced with an n-type cap layer. 13 may be provided as a nin-type semiconductor device. At this time, for example, the material of the n-type cap layer 13 is 1 with antimony as an n-type dopant.
X10 ¹⁸ / cm ³ doped silicon;
The material of the intrinsic semiconductor i-layer 15, the material of the i-type cladding layer 16, and the material of the n-type buffer layer 17 are the same as described above.

<Effects of Embodiments and Modifications> As described above, according to the superlattice semiconductor light emitting devices of the embodiments and the modifications, two types of quantum well layers 22a and 22b having different effective masses of electrons. And an intrinsic semiconductor i-layer 15 in which the active layer 23 and the barrier layer 21 are laminated, and when a predetermined reverse bias voltage is applied, the active layer 23 has a gap between the second and first quantization levels. Light having a wavelength corresponding to the difference energy can be generated and output. In addition, the superlattice semiconductor light emitting devices of the embodiments and the modified examples are configured by using a silicon semiconductor, and can use an already established high-level silicon process and apparatus, and therefore, use a known process. An element can be formed with high accuracy. In addition, since it is composed of an intrinsic semiconductor having a simple periodic structure in which the period of the superlattice is constant, and silicon is cheaper than In or P, the conventional quantum cascade using the intersubband transition is used. It can be manufactured at lower cost than a laser. Further, in the GaAs process, treatment of waste liquid, wastewater, exhaust gas, and the like containing arsenic, which is a poison coming out of the process, is not a problem in the silicon process. The same can be said for the disposal of the used device. Furthermore, in terms of device characteristics, the thermal conductivity of silicon as a substrate is higher than that of gallium arsenide, and heat can be easily dissipated, so that heat generation during current injection can be minimized. Continuous oscillation at room temperature is also possible.

[0028]

As described above in detail, according to the superlattice semiconductor light emitting device of the present invention, a superlattice having an intrinsic semiconductor layer having a superlattice structure between two electrodes and being applied with a bias voltage is provided. In the semiconductor device, the intrinsic semiconductor layer is formed by forming a first barrier layer, a first quantum well layer, a second barrier layer, a second quantum well layer, a third barrier layer, and an active layer in this order. The first and second quantum well layers and the active layer are made of silicon or amorphous silicon. The first quantization level, the first quantization level of the second quantum well layer, and the second quantization level of the active layer have substantially the same energy level. The thicknesses of the first and second quantum well layers and the active layer are set; The electrons present in the first quantization level of the serial first quantum well layer, the second of said second quantum well layer 1
After the transition to the second quantization level of the active layer via the quantization level of the above, the transition from the second quantization level of the active layer to the first quantization level Obtain luminescence.

Accordingly, there are provided two kinds of first and second quantum well layers having different effective masses of electrons and an intrinsic semiconductor layer in which an active layer and a barrier layer are laminated, and a predetermined reverse bias voltage is applied. Sometimes, light having a wavelength corresponding to the energy of the difference between the second and first quantization levels of the active layer can be generated and output. Also, according to the present invention, it is possible to use a silicon semiconductor or an Almosphas silicon semiconductor, and to use an already established high-level silicon process and apparatus, and therefore to use a known process for high precision. Can form an element. Also,
It is composed of an intrinsic semiconductor having a simple periodic structure with a constant superlattice period, and silicon is cheaper than In and P. Therefore, the conventional quantum cascade laser using intersubband transition is used. In comparison, it can be manufactured at low cost. Further, in the GaAs process, treatment of waste liquid, wastewater, exhaust gas, and the like containing arsenic, which is a poison coming out of the process, is not a problem in the silicon process. The same can be said for the disposal of the used device. Furthermore, in terms of device characteristics, the thermal conductivity of silicon as a substrate is higher than that of gallium arsenide, and heat can be easily dissipated, so that heat generation during current injection can be minimized. Continuous oscillation at room temperature is also possible.

In the above-described superlattice semiconductor light emitting device, the intrinsic semiconductor layer is interposed therebetween and provided to face each other so as to reflect at least a part of the light emitted from the intrinsic semiconductor layer. Since the laser is oscillated by providing two reflecting surfaces, the light generated in the intrinsic semiconductor layer is repetitively reflected inside and resonates, causing the superlattice semiconductor light emitting device to oscillate in a laser mode, That is, laser oscillation can be performed with a large intensity.

[Brief description of the drawings]

FIG. 1 is a longitudinal sectional view showing a superlattice semiconductor light emitting device 10 according to one embodiment of the present invention.

FIG. 2 is an energy band diagram showing a level energy with respect to a position in a thickness direction of an intrinsic semiconductor i-layer of the superlattice semiconductor light emitting device 10 of FIG.

FIG. 3 is a cross-sectional view showing a first step of the manufacturing steps of the superlattice semiconductor light emitting device 10 of FIG.

FIG. 4 is a cross-sectional view showing a second step in the manufacturing process of the superlattice semiconductor light emitting device 10 of FIG.

FIG. 5 is a cross-sectional view showing a third step in the process of manufacturing the superlattice semiconductor light emitting device 10 of FIG.

FIG. 6 is a sectional view showing a fourth step in the process of manufacturing the superlattice semiconductor light emitting device 10 of FIG.

FIG. 7 is a cross-sectional view showing a fifth step in the process of manufacturing the superlattice semiconductor light emitting device 10 of FIG.

8 is a cross-sectional view showing a sixth step in the process of manufacturing the superlattice semiconductor light emitting device 10 of FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 ... Super lattice semiconductor light emitting element, 11 and 12 ... Electrode, 11h ... Light output hole, 13 ... Cap layer, 14 ... Cladding layer, 15 ... Intrinsic semiconductor i layer, 16 ... Cladding layer, 17 ... Buffer layer, 20 ... Semiconductor Substrate, 21: barrier layer, 22a: first quantum well layer, 22b: second quantum well layer, 23: active layer, 30: variable voltage DC power supply.

────────────────────────────────────────────────── ─── Continued on the front page (72) Norifumi Egami, Inventor No. 5, Sanraya, Inaya, Seika-cho, Soraku-gun, Kyoto 5 -236854 (JP, A) JP-A-9-102653 (JP, A) JP-A-10-275956 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H01L 33/00 H01S 3/18 JICST file (JOIS)

Claims (5)

(57) [Claims] 1. A superlattice semiconductor device comprising a intrinsic semiconductor layer having a superlattice structure between two electrodes, wherein a bias voltage is applied, wherein the intrinsic semiconductor layer comprises a first barrier layer and a first barrier layer. The quantum well layer, the second barrier layer, the second quantum well layer, the third barrier layer, and the active layer are formed by sequentially stacking a plurality of layers each corresponding to one cycle. The first and second quantum well layers and the active layer are made of silicon or amorphous silicon. The first quantization level of the first quantum well layer and the second
The first quantization level of the quantum well layer and the second quantization level of the active layer.
The thicknesses of the first and second quantum well layers and the active layer are set such that the quantization levels of the first and second quantum well layers are substantially the same. After the electrons present at the first quantization level are transited to the second quantization level of the active layer via the first quantization level of the second quantum well layer, the active layer A superlattice semiconductor light emitting device characterized in that light emission is obtained by making a transition from the second quantization level to the first quantization level. 2. The barrier layer has substantially the same lattice constant as the first and second quantum well layers and the active layer.
2. The superlattice semiconductor light emitting device according to claim 1, wherein said superlattice semiconductor light emitting device is made of a material having a band gap larger than that of said first and second quantum well layers and said active layer. 3. The intrinsic semiconductor layer is an intrinsic semiconductor i-layer, and the superlattice semiconductor light emitting device is provided between the two electrodes.
The semiconductor device further includes a p-type semiconductor layer and an n-type semiconductor layer sandwiching the intrinsic semiconductor i-layer, wherein the superlattice semiconductor light emitting device is a pin diode device, and the bias voltage is a reverse bias voltage. The superlattice semiconductor light emitting device according to claim 1. 4. The intrinsic semiconductor layer is an intrinsic semiconductor i-layer, and the superlattice semiconductor light emitting device is provided between the two electrodes.
3. The superlattice semiconductor according to claim 1, further comprising an n-type semiconductor layer and an n-type semiconductor layer sandwiching the intrinsic semiconductor i-layer, wherein the superlattice semiconductor light-emitting element is a nin-type semiconductor element. Light emitting element. 5. The superlattice semiconductor light emitting device is provided so as to sandwich the intrinsic semiconductor layer and to oppose each other so as to reflect at least a part of light emitted from the intrinsic semiconductor layer. The superlattice semiconductor light emitting device according to claim 1, wherein the superlattice semiconductor light emitting device emits laser light by having two reflecting surfaces.