JP2944185B2 - Contact etching method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention is directed to opening a contact hole for connecting a multilayer wiring in a semiconductor device without deteriorating the uniformity and the cross-sectional shape of the contact hole. And a contact etching method.

(Prior art) The progress of semiconductor devices has been remarkable, especially for DRAMs.
(Dynamic Random Access Memory)
VLSIs have been increasing their integration at a rate of four times / three years, and the cell area is becoming very small.

With such a fine cell area, the conventional planar cell structure has insufficient cell capacity. In recent years, a three-dimensional cell structure such as a stack type or a trench type has been used. I have.

With such a three-dimensional cell structure, various thicknesses of an insulating film (silicon oxide film) that is opened when a contact hole for connecting an aluminum wiring to a source portion, a drain portion, a gate portion and the like are opened. There is a portion, and in some cases, a difference in depth of 4 to 5 times occurs between the deepest contact hole and the shallowest contact hole.

If the contact holes of various depths are to be simultaneously opened, the contact in the shallowest part has already been over-etched by 400 to 500% when the contact etching of the deepest contact part is completed. Become.

To do this stably requires a very high etch selectivity.

Conventionally, in order to obtain a high selectivity in contact etching, the selectivity has been improved by changing the mixed composition of gas species or devising pressure and power.

Further, a process means for separately opening a shallow contact portion and a deep contact portion is employed.

(Problems to be Solved by the Invention) However, in the above-described conventional method, when an attempt is made to change the process conditions in order to obtain a high selectivity,
Generally, in the etching of an oxide film, the rate of the deposition reaction occurring simultaneously with the etching is increased.However, it is difficult to improve the selectivity while maintaining good etching characteristics. Usually, phenomena such as a decrease in the oxide film etching rate, a decrease in the uniformity, and an inferior deterioration of the etched cross-sectional shape occur, and there is a limit in improving the selectivity.

In the process of separately opening the shallow contact portion and the deep contact portion, the photolitho etching step is performed twice, and the process becomes redundant.

This invention is one of the problems of the prior art.
Etching with a high selectivity to open contact holes with different depths results in the deterioration of uniformity and inferior deterioration of the etched cross-sectional shape. It is an object of the present invention to provide a highly selective contact etching method which solves a problem that a contact hole having different lengths is separately formed, resulting in a redundant process.

(Means for Solving the Problems) In order to solve the above problems, the present invention introduces a step of dividing an etching step to form contact holes having different depths in a contact etching method. Etching the insulating film on the first layer under the first etching condition to form an opening reaching the first layer and simultaneously etching the insulating film on the second layer; Etching the insulating film on the second layer and simultaneously depositing a polymer on the first layer exposed by the opening formed on the first layer.

(Operation) According to the present invention, since the above-described steps are introduced in the contact etching method, the oxide film is etched under the first etching condition until the shallow contact portion is opened, and the polysilicon or substrate is etched. On the silicon or tungsten-silicon surface, processing is performed under the second etching condition such that a devotion reaction occurs, and a reaction having a low etching rate occurs in an oxide film. The process is performed under the conditions, and a deep contact portion is opened, so that the above problem can be eliminated.

(Example) Hereinafter, an example of a contact etching method of the present invention will be described with reference to the drawings. 1 (a) to 1 (d) are process sectional views for explaining one embodiment.

First, FIG. 1A shows a state before a contact hole is formed. In a state where an impurity diffusion region 2 and a field oxide film 3 are formed on a Si substrate 1 as a semiconductor substrate, a gate oxide is formed on the semiconductor substrate. After the gate polysilicon 4 as the second layer is formed through the film, several layers of the insulating film 6 and the wiring polysilicon 5 as the first layer are formed between the insulating films 6, and further, Then, a photoresist is applied on the insulating film 6 and patterned to form a photoresist pattern 7 using the photoresist as an etching mask.

Here, it is necessary to open a contact hole in the impurity diffusion region 3, the gate polysilicon 4, and the wiring polysilicon 5.

The insulating film 6 includes several types of insulating films between the respective layers. However, in the present invention, the insulating films are simply shown collectively.

The wiring polysilicon 5 is formed to a thickness of about 1200 mm, and the insulating film 6 formed on the wiring polysilicon 5 is formed.
Is about 1/2 to 1/3 of the insulating film on the impurity diffusion region 2, and in some cases, about 1/4.

For example, the thickness of the insulating film 6 on the wiring polysilicon 5 is
If the thickness is 5000 °, the thickness of the insulating film 6 on the impurity diffusion region 2 may be 15000 ° to 21000 °.

In addition, the thickness of the insulating film 6 on the gate polysilicon 4 is about 10,000-15,000.

Next, FIG. 1 (b) shows a state in which the first step etching process has been completed. When etching the insulating film 6 using the resist pattern 7 as a mask, the processing conditions of this first step etching are shown. (first etching condition), for example, in the anodic bonding method RIE (reactive ion etching) apparatus, CF ₄ gas 70 SCCM, CHF ₃
Gas 50 SCCM and carrier gas Ar of 1000 SCCM are introduced into the decompression vessel, and the pressure is set to 1 torr and the high frequency power is set to 250 W.

At this time, the etching rate of the PSG (phosphosilicate glass) film as the insulating film 6 is ~ 3200Å / m, and
The etching rate of the thermal oxide film as the insulating film 6 is ~ 2300 °
/ min, the etching rate of the Si substrate is ~ 2100Å / min.

FIG. 1B shows a state in which the insulating film 6 is etched by about 7000 ° under these etching conditions. In this case, the contact hole 8 on the wiring polysilicon 5 has already been opened, but the contact hole 9 on the gate polysilicon 4 has not been opened, and the insulating film 6 still has a thickness of 3000 to 80.
A thickness of about 00 mm remains.

Further, the contact hole 10 on the impurity diffusion region 2 is also unopened, and the insulating film 6 remains about 8000-13000 degrees.

Next, a second step etching is performed. The processing conditions of the second step etching (second etching conditions)
In this case, the CF ₄ gas is 40 SCCM, the CF ₃ gas is 80 SCCM, and the carrier gas is 1000 SCCM, and the other conditions are the same as the processing conditions of the first step etching.

In this case, the etching rate of the PSG film as the insulating film 6 is 22500 Å / min, the etching rate of the thermal oxide film as the insulating film 6 is Å200 、 / min, and the Si substrate 1 is not etched. It becomes the position speed.

When processing is performed for about 30 seconds under these conditions, the state shown in FIG.
A deposition film 11 of about 150 ° is formed at the opening (bottom) of the substrate.

During this time, the insulating film 6 is etched by about 1200 °. Analysis has shown that the deposition film 11 at this time is a polymer containing CF ₂ as a unit.

Finally, a third step etching process is performed again under the same conditions as the first step etching process (third etching condition) until the contact holes 9 and 10 are completely opened.

At this time, it is known that the etching rate of the deposition film 11 is very low (100 ° / min or less). Therefore, assuming that the third step etching process is performed for 5 minutes, the film thickness of the deposition film 11 in the contact hole 8 of the polysilicon for wiring 5 is about 500 °.

In this case, if etching is performed at once by the conventional method,
While a film reduction of about 1200 ° was recognized, in the present invention, the selectivity was greatly improved.

By performing the third step etching process, the contact holes 8, 9, and 10 having different depths are formed as shown in FIG. 1 (d).

(Effects of the Invention) As described in detail above, according to the present invention, in order to form contact holes having different depths, an etching process is performed in a plurality of steps, and particularly in an intermediate step etching process. , Polysilicon or Si
Since processing is performed under conditions where etching does not occur on the substrate and conversely deposition occurs, the final selectivity can be greatly improved, and the processing time in the intermediate step etching processing is short. However, there is no effect on the slight deterioration of the uniformity of the processing, and the decrease in the throughput is slight.

[Brief description of the drawings]

1 (a) to 1 (d) are process sectional views for explaining an embodiment of the contact etching method of the present invention. DESCRIPTION OF SYMBOLS 1 ... Si board | substrate, 2 ... Diffusion area | region, 3 ... Field oxide film, 4 ... Gate polysilicon, 5 ... Polysilicon for wiring, 6 ... Insulating film, 7 ... Photoresist pattern, 8-10 ... contact holes, 11 ... deposition films.

Claims (3)

(57) [Claims] An insulating film formed on a first layer and a second layer, wherein an opening reaching the first layer and an opening reaching the first layer are deeper than the second film; In a contact etching method for forming an opening reaching a layer, the insulating film on the first layer is etched under a first etching condition to form an opening reaching the first layer and simultaneously form the second etching. Etching the insulating film on the second layer, and etching the insulating film on the second layer under a second etching condition, and simultaneously exposing the insulating film on the second layer by an opening formed on the first layer. Depositing a polymer on one of the layers. 2. A contact etching method according to claim 1, further comprising the step of removing said polymer and forming an opening reaching said second layer under a third etching condition. 3. The contact etching method according to claim 2, wherein said first and third etching conditions are the same.