JP2940726B2 - Optical semiconductor device - Google Patents
Optical semiconductor deviceInfo
- Publication number
- JP2940726B2 JP2940726B2 JP16178491A JP16178491A JP2940726B2 JP 2940726 B2 JP2940726 B2 JP 2940726B2 JP 16178491 A JP16178491 A JP 16178491A JP 16178491 A JP16178491 A JP 16178491A JP 2940726 B2 JP2940726 B2 JP 2940726B2
- Authority
- JP
- Japan
- Prior art keywords
- optical semiconductor
- semiconductor device
- circuit
- integrated circuit
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
- Led Devices (AREA)
- Light Receiving Elements (AREA)
- Photometry And Measurement Of Optical Pulse Characteristics (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本考案は光リモコンなどに好適な
光半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical semiconductor device suitable for an optical remote controller or the like.
【０００２】[0002]
【従来の技術】近年、オーディオ装置、空調機器、テレ
ビジョン受信器など多くの室内機器においては、赤外光
が雑音に強くまた比較的多くの情報量を短時間に伝達出
来、さらには短い伝達距離で制御可能なので、受光素子
又は発光ダイオードを有する光半導体素子を利用した光
リモコンが利用されるようになってきた。その光リモコ
ンに用いる光半導体装置は、例えば実開平１−１０２８
３４号公報に示されるように、受光素子又は発光ダイオ
ードを有する光半導体素子と集積回路とを同一プリント
基板の上に載置し配線していた。2. Description of the Related Art In recent years, in many indoor devices such as audio equipment, air conditioners, and television receivers, infrared light is strong against noise and can transmit a relatively large amount of information in a short time. Since the distance can be controlled, an optical remote controller using an optical semiconductor element having a light receiving element or a light emitting diode has been used. An optical semiconductor device used for the optical remote controller is disclosed in, for example, Japanese Utility Model Laid-Open No. 1-128.
As disclosed in Japanese Patent No. 34, an optical semiconductor element having a light receiving element or a light emitting diode and an integrated circuit are mounted on the same printed circuit board and wired.
【０００３】[0003]
【考案が解決しようとする課題】然し乍ら上述の技術で
は、光半導体素子と集積回路内の回路素子をプリント基
板内の回路を介して結線している。故にこの光半導体素
子と回路素子の間で雑音を拾い易く、受信又は送信制御
不能となる。またこの様な光リモコンを搭載する対象機
器に於ては、光半導体装置の占有体積が小さいことが望
まれる。故に本考案は上述の欠点を鑑みてなされたもの
であり、すなわち光半導体素子と集積回路間の雑音の影
響を少なくし、かつ占有体積の小さい光半導体装置を提
供するものである。However, in the above technique, the optical semiconductor element and the circuit element in the integrated circuit are connected via a circuit in a printed circuit board. Therefore, noise is easily picked up between the optical semiconductor element and the circuit element, and reception or transmission cannot be controlled. Further, in a target device on which such an optical remote controller is mounted, it is desired that the volume occupied by the optical semiconductor device is small. Therefore, the present invention has been made in view of the above-mentioned drawbacks, that is, to provide an optical semiconductor device which reduces the influence of noise between an optical semiconductor element and an integrated circuit and occupies a small volume.
【０００４】[0004]
【課題を解決するための手段】本考案は上述の課題を解
決するために、光半導体素子が集積回路の上に位置する
様に、光半導体素子内の第１、第２のフレームを集積回
路の第１、第２の電極に形成された切欠部又は透孔に接
続するものである。SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a first and a second frame in an optical semiconductor device such that the optical semiconductor device is located on the integrated circuit. Are connected to the cutouts or through holes formed in the first and second electrodes.
【０００５】[0005]
【作用】上述の様に、光半導体素子のフレームを集積回
路の電極に接続するので、微弱信号を扱う部分が十分近
接するから雑音の影響が受けにくくなる。また、集積回
路内の外部端子の数が従来より減るので集積回路のパタ
ーン密度が粗になる。更に光半導体素子を集積回路の上
に設けるので占有体積が小さくなる。また光半導体素子
のフレームをそのままのピッチで集積回路に接続するの
で、光半導体素子の方向性が維持し易く、受光特性又は
出力特性が安定する。As described above, since the frame of the optical semiconductor element is connected to the electrode of the integrated circuit, the portion for handling a weak signal is sufficiently close to the frame, so that it is less affected by noise. Further, since the number of external terminals in the integrated circuit is smaller than in the conventional case, the pattern density of the integrated circuit becomes coarse. Further, since the optical semiconductor element is provided on the integrated circuit, the occupied volume is reduced. Further, since the frame of the optical semiconductor element is connected to the integrated circuit at the same pitch, the directionality of the optical semiconductor element is easily maintained, and the light receiving characteristics or output characteristics are stabilized.
【０００６】[0006]
【実施例】以下に本考案の第１実施例を図に従って説明
する。図１は本実施例に係る光半導体装置の断面図であ
り、図２は図１のＡＡ断面図である。これらの図に於
て、１は鉄等から成る第１のフレームであり、先端はヘ
ッダ加工により皿状の反射器を有してもよい。２は鉄等
から成り、第１のフレーム１と平行に配置された第２の
フレームである。３は第１のフレーム１の上に載置され
た受光素子であり、例えばＰ型基板に燐を拡散するなど
して形成したＰＩＮホトダイオード等が利用される。４
はエポキシ樹脂等の透光性樹脂であり、配線処理された
第１、第２のフレーム１と２の先端及び受光素子３の周
辺を覆っている。これらにより光半導体素子５は構成さ
れる。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view of the optical semiconductor device according to the present embodiment, and FIG. 2 is a sectional view taken along the line AA of FIG. In these figures, reference numeral 1 denotes a first frame made of iron or the like, and the tip may have a dish-shaped reflector by header processing. Reference numeral 2 denotes a second frame made of iron or the like and arranged in parallel with the first frame 1. Reference numeral 3 denotes a light receiving element mounted on the first frame 1, for example, a PIN photodiode formed by diffusing phosphorus into a P-type substrate or the like is used. 4
Is a translucent resin such as an epoxy resin, and covers the ends of the first and second frames 1 and 2 subjected to wiring processing and the periphery of the light receiving element 3. These constitute the optical semiconductor element 5.
【０００７】６は回路素子であり、集積回路チップと称
されるものである。７は鉄又は銅等から成り、回路素子
６への電源線に接続された第１の電極であり、半月状の
切欠部８を有する。９は鉄又は銅等から成り、回路素子
６に接続される第２の電極であり、半月状の切欠き部１
０を有する。１１と１２はそれぞれ鉄又は銅等から成
り、回路素子６にワイヤボンドされた第３、第４の電極
である。１３は遮光性を有する黒色の樹脂から成るパッ
ケージであり、第１、第２の電極７と９の切欠部８と１
０より少し大きい切欠部１４、１４を有する。そして、
パッケージ１３は回路素子６と第１、２、３、４の電極
７、９、１１、１２を覆う様にトランスファーモールド
される。これらにより集積回路１５は構成される。光半
導体素子５の第１、第２のフレーム１と２がそれぞれ集
積回路１５の第１、第２の電極７と９の切欠部８と１０
に略当接する様に配置されて、その当接部が半田１６に
て接続される。Reference numeral 6 denotes a circuit element, which is called an integrated circuit chip. Reference numeral 7 denotes a first electrode made of iron, copper, or the like and connected to a power supply line to the circuit element 6, and has a semilunar notch 8. Reference numeral 9 denotes a second electrode made of iron, copper, or the like, and connected to the circuit element 6.
Has zero. Reference numerals 11 and 12 denote third and fourth electrodes made of iron or copper, for example, and wire-bonded to the circuit element 6. Reference numeral 13 denotes a package made of a black resin having a light-shielding property, and the cutouts 8 and 1 of the first and second electrodes 7 and 9 are provided.
It has notches 14, 14 slightly larger than zero. And
The package 13 is transfer-molded so as to cover the circuit element 6 and the first, second, third, and fourth electrodes 7, 9, 11, and 12. These constitute the integrated circuit 15. The first and second frames 1 and 2 of the optical semiconductor device 5 are respectively provided with cutouts 8 and 10 of the first and second electrodes 7 and 9 of the integrated circuit 15.
And the contact portion is connected by solder 16.
【０００８】さらに、図３は本実施例に係る光半導体装
置のブロック図である。この図に於て、６は集積回路１
５内の回路素子であり、例えば増幅器１７とフィルタ１
８と復調回路１９と波形整形回路２０とトランジスター
２１の各回路から成る。受光素子３のアノード側は第１
のフレーム１を介して、接地電位を有する電源線２２に
連なる第１の電極７に接続され、カソード側は第２のフ
レーム２を介して第２の電極９に接続される。第４の電
極１２に印加される電位Ｖ1 は回路素子６内の各回路に
電圧を与える。この様にして電気信号を変調された赤外
光を受けとった受光素子３からの信号は、回路素子６を
経て、第３の電極１１に電気信号Ｓ1 を与える。FIG. 3 is a block diagram of the optical semiconductor device according to this embodiment. In this figure, 6 is an integrated circuit 1
5, the amplifier 17 and the filter 1
8, a demodulation circuit 19, a waveform shaping circuit 20, and a transistor 21. The anode side of the light receiving element 3 is the first
Is connected to a first electrode 7 connected to a power supply line 22 having a ground potential, and the cathode side is connected to a second electrode 9 via a second frame 2. The potential V 1 applied to the fourth electrode 12 gives a voltage to each circuit in the circuit element 6. The signal from the light receiving element 3 that has received the infrared light whose electric signal has been modulated in this way gives an electric signal S 1 to the third electrode 11 via the circuit element 6.
【０００９】次に本考案の第２実施例を図に従って説明
する。図４は本実施例に係る光半導体装置の断面図であ
り、図５は図４のＢＢ断面図である。これらの図に於
て、２３と２４はそれぞれ鉄等から成る第１、第２のフ
レームであり、第１のフレーム２３の先端は皿状の反射
器を有してもよい。２５はその上に載置されたＧａＡｌ
Ａｓ８３０ｎｍの発光ダイオードである。２６は透光性
樹脂であり、これらの部品の周辺を覆っている。これら
により光半導体素子２７は構成される。Next, a second embodiment of the present invention will be described with reference to the drawings. FIG. 4 is a sectional view of the optical semiconductor device according to the present embodiment, and FIG. 5 is a sectional view taken along the line BB of FIG. In these figures, reference numerals 23 and 24 denote first and second frames respectively made of iron or the like, and the tip of the first frame 23 may have a dish-shaped reflector. 25 is the GaAl placed on it
As 830 nm light emitting diode. Reference numeral 26 denotes a light-transmitting resin, which covers the periphery of these components. These constitute the optical semiconductor element 27.
【００１０】２８は回路素子である。２９は鉄又は銅等
から成り、回路素子２８への電源線に接続され、透孔３
０を有する第１の電極である。３１は鉄又は銅等から成
り、回路素子２８内の出力に接続され、透孔３２を有す
る第２の電極である。３３と３４はそれぞれ鉄又は銅等
から成り、回路素子２８にワイヤボンドされた第３、第
４の電極である。３５は遮光性を有する黒色の樹脂から
成るパッケージであり第１、第２の電極２９と３１の透
孔３０と３２と同じ位置に、透孔３６、３６を有する。
そして、これらの部品により、集積回路３７が構成され
る。光半導体素子２７の第１、第２のフレーム２３と２
４がそれぞれ集積回路３７の第１、第２の電極２９と３
１の透孔３０と３２に挿入する様に配置されて、その透
孔３０と３２の周辺が半田３８にて接続、固定される。Reference numeral 28 denotes a circuit element. 29 is made of iron or copper or the like, and is connected to a power supply line to the circuit element 28;
0 is the first electrode. Reference numeral 31 denotes a second electrode which is made of iron, copper, or the like, is connected to an output in the circuit element 28, and has a through hole 32. 33 and 34 are third and fourth electrodes made of iron, copper, or the like, respectively, and wire-bonded to the circuit element 28. Reference numeral 35 denotes a package made of a black resin having a light-shielding property.
These components constitute an integrated circuit 37. First and second frames 23 and 2 of optical semiconductor element 27
4 is the first and second electrodes 29 and 3 of the integrated circuit 37, respectively.
It is arranged to be inserted into one of the through holes 30 and 32, and the periphery of the through holes 30 and 32 is connected and fixed by solder 38.
【００１１】さらに、図６は本実施例に係る光半導体装
置のブロック図である。この図に於て、回路素子２８は
例えば波形整形回路３９と変調回路４０とトランジスタ
ー４１の各回路から成る。発光ダイオード２５のアノー
ド側は第１のフレーム２３を介して、電位Ｖ2 を有する
電源線４２に連なる第１の電極２９に接続され、カソー
ド側は第２フレーム２４を介して第２の電極３１に接続
される。この様にして第３の電極３３から入った電気信
号Ｓ2 は、回路素子２８を経て、発光ダイオード２５か
ら電気信号を変調された赤外光として発光される。FIG. 6 is a block diagram of the optical semiconductor device according to the present embodiment. In this figure, the circuit element 28 is composed of, for example, a waveform shaping circuit 39, a modulation circuit 40, and a transistor 41. The anode side of the light emitting diode 25 is connected to the first electrode 29 connected to the power supply line 42 having the potential V 2 via the first frame 23, and the cathode side is connected to the second electrode 31 via the second frame 24. Connected to. The electric signal S 2 input from the third electrode 33 in this way passes through the circuit element 28 and is emitted from the light emitting diode 25 as infrared light whose electric signal has been modulated.
【００１２】上述した様に、第１実施例は回路素子６が
小さいものに適しており、第１、第２のフレーム１と２
が回路素子６をまたぐ構成である。１方、第２実施例は
回路素子２８が大きいものに適しており、第１、第２の
フレーム２３と２４が回路素子２８と異なる場所に配置
されている。この様に、第１、第２実施例は受光用又は
発光用の関係に拘束されなく、回路素子６、２８の大き
さに関係する。また、両実施例に於て、集積回路１５又
は３７は樹脂のトランスファーモールド型を開示した
が、その他のモールド型として、金属パッケージ又はセ
ラミックパッケージ型も適用可能である。更に両実施例
に於て、集積回路１５又は３７は音響に応用される型を
開示したが、その他、テレビジョン受信機のリモコン用
として、色度とか輝度を信号として扱う集積回路にも適
用可能である。更に第１実施例では受光素子３のアノー
ド接地型を開示したが、カソード接地型でも構わない。As described above, the first embodiment is suitable for a small circuit element 6 and includes first and second frames 1 and 2.
Is a configuration straddling the circuit element 6. On the other hand, the second embodiment is suitable for a circuit element having a large circuit element 28, and the first and second frames 23 and 24 are arranged at positions different from the circuit element 28. As described above, the first and second embodiments are not restricted by the relationship for light reception or light emission, but are related to the size of the circuit elements 6 and 28. Also, in both embodiments, the integrated circuit 15 or 37 has been disclosed as a resin transfer mold type, but a metal package or a ceramic package type can be applied as another mold type. Further, in both embodiments, the integrated circuit 15 or 37 is disclosed as a type applied to sound. However, it is also applicable to an integrated circuit which handles chromaticity or luminance as a signal for a remote control of a television receiver. It is. Further, in the first embodiment, the grounded anode type of the light receiving element 3 is disclosed, but the grounded cathode type may be used.
【００１３】[0013]
【考案の効果】本考案は上述した様に、光半導体素子の
第１、第２のフレームを集積回路の第１、第２の電極に
接続する。故に光半導体素子と電極間の距離が従来より
極めて短かくなり、この距離に於て受けていた雑音が減
るので、受信又は送信の制御が確実となる。また、光半
導体素子を直接、集積回路の上に設けるので、占有体積
は従来より極めて小さくなる。また集積回路内の外部端
子数が従来より減るので集積回路のパターン密度が粗に
なり、製造し易く、コストダウンとなる。更に光半導体
素子内のフレームをそのままのピッチで集積回路に接続
出来るので、光半導体素子の方向性が維持し易く、受光
特性又は発光特性が安定する。According to the present invention, as described above, the first and second frames of the optical semiconductor device are connected to the first and second electrodes of the integrated circuit. Therefore, the distance between the optical semiconductor element and the electrode is much shorter than before, and the noise received at this distance is reduced, so that the control of reception or transmission is assured. Further, since the optical semiconductor element is provided directly on the integrated circuit, the occupied volume becomes extremely smaller than before. Further, since the number of external terminals in the integrated circuit is reduced as compared with the conventional case, the pattern density of the integrated circuit becomes coarse, which makes it easy to manufacture and reduces the cost. Further, since the frames in the optical semiconductor element can be connected to the integrated circuit at the same pitch, the directionality of the optical semiconductor element is easily maintained, and the light receiving characteristic or the light emitting characteristic is stabilized.
【図１】本考案の第１実施例に係る光半導体装置の断面
図である。FIG. 1 is a sectional view of an optical semiconductor device according to a first embodiment of the present invention.
【図２】図１のＡＡ断面図である。FIG. 2 is a sectional view taken along the line AA of FIG.
【図３】本考案の第１実施例に係る光半導体装置のブロ
ック図である。FIG. 3 is a block diagram of the optical semiconductor device according to the first embodiment of the present invention;
【図４】本考案の第２実施例に係る光半導体装置の断面
図である。FIG. 4 is a sectional view of an optical semiconductor device according to a second embodiment of the present invention.
【図５】図４のＢＢ断面図である。FIG. 5 is a sectional view taken along the line BB of FIG. 4;
【図６】本考案の第２実施例に係る光半導体装置のブロ
ック図である。FIG. 6 is a block diagram of an optical semiconductor device according to a second embodiment of the present invention.
１、２３ 第１のフレーム ２、２４ 第２のフレーム ３ 受光素子 ５、２７ 光半導体素子 ６、２８ 回路素子 ７、２９ 第１の電極 ８、１０、１４ 切欠部 ９、３１ 第２の電極 １３、３５ パッケージ １５、３７ 集積回路 ２２、４２ 電源線 ２５ 受光ダイオード ３０、３２、３６ 透孔 Reference numerals 1, 23 First frame 2, 24 Second frame 3 Light receiving element 5, 27 Optical semiconductor element 6, 28 Circuit element 7, 29 First electrode 8, 10, 14 Notch 9, 31, Second electrode 13 , 35 package 15, 37 integrated circuit 22, 42 power supply line 25 light receiving diode 30, 32, 36 through hole
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平３−60080（ＪＰ，Ａ) 特開 昭63−236371（ＪＰ，Ａ) 特開 昭59−172266（ＪＰ，Ａ) 特開 昭55−62777（ＪＰ，Ａ) 特開 昭63−211687（ＪＰ，Ａ) 実開 昭61−100155（ＪＰ，Ｕ) 実開 平１−100175（ＪＰ，Ｕ) (58)調査した分野(Int.Cl.6，ＤＢ名) H01L 31/02 H01L 33/00 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-3-60080 (JP, A) JP-A-63-236371 (JP, A) JP-A-59-172266 (JP, A) JP-A-55-172266 62777 (JP, A) JP-A-63-211687 (JP, A) JP-A-61-100155 (JP, U) JP-A-1-100175 (JP, U) (58) Fields investigated (Int. 6 , DB name) H01L 31/02 H01L 33/00
Claims (1)
ームに載置された受光素子又は発光ダイオードを有する
光半導体素子と、電源線に接続された第１の電極と回路
素子とその回路素子に接続された第２の電極とそれらを
覆う様に形成されたパッケージを有する集積回路とを具
備する光半導体装置において、前記光半導体素子が前記
集積回路の上に位置する様に、前記第１、第２のフレー
ムが前記パッケージに形成された切欠部又は透孔を介し
て、前記第１、第２の電極に形成された切欠部又は透孔
にそれぞれ接続された事を特徴とする光半導体装置。An optical semiconductor device having a light receiving element or a light emitting diode mounted on the first and second frames and the first frame, a first electrode connected to a power supply line, a circuit element, and the like. In an optical semiconductor device comprising a second electrode connected to a circuit element and an integrated circuit having a package formed so as to cover the second electrode, the optical semiconductor element is located on the integrated circuit. The first and second frames are connected to the notches or through holes formed in the first and second electrodes via the notches or through holes formed in the package, respectively. Optical semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16178491A JP2940726B2 (en) | 1991-07-02 | 1991-07-02 | Optical semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16178491A JP2940726B2 (en) | 1991-07-02 | 1991-07-02 | Optical semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0513786A JPH0513786A (en) | 1993-01-22 |
| JP2940726B2 true JP2940726B2 (en) | 1999-08-25 |
Family
ID=15741847
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16178491A Expired - Lifetime JP2940726B2 (en) | 1991-07-02 | 1991-07-02 | Optical semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2940726B2 (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4012743B2 (en) | 2002-02-12 | 2007-11-21 | 浜松ホトニクス株式会社 | Photodetector |
| JP2006261302A (en) * | 2005-03-16 | 2006-09-28 | Rohm Co Ltd | Optical communication module |
| JP6943928B2 (en) * | 2018-10-05 | 2021-10-06 | 旭化成エレクトロニクス株式会社 | Optical device |
| US10943894B2 (en) | 2018-10-05 | 2021-03-09 | Asahi Kasei Microdevices Corporation | Optical device having lens block having recessed portion covering photoelectric conversion block |
-
1991
- 1991-07-02 JP JP16178491A patent/JP2940726B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0513786A (en) | 1993-01-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2006074030A (en) | Compact optical transceiver module | |
| US7589338B2 (en) | Semiconductor die packages suitable for optoelectronic applications having clip attach structures for angled mounting of dice | |
| US5591966A (en) | Photosensor package with defined locations for lens supporting lead | |
| US5770973A (en) | Semiconductor device for amplifying audio signals | |
| JP2940726B2 (en) | Optical semiconductor device | |
| JP3680303B2 (en) | Photoelectric conversion module | |
| JP2966591B2 (en) | Optical semiconductor device | |
| US5291054A (en) | Light receiving module for converting light signal to electric signal | |
| US6417946B1 (en) | Data transmitter/receiver | |
| US20060076673A1 (en) | Power amplifier module | |
| JP2901356B2 (en) | Hybrid integrated circuit | |
| JP3393013B2 (en) | Structure of infrared transceiver module | |
| US20060071289A1 (en) | Lead frame and light receiving module comprising it | |
| JP3038772B2 (en) | Infrared sensor | |
| JP3242476B2 (en) | Optical semiconductor device | |
| JPH0595212A (en) | High frequency semiconductor hybrid integrated circuit device | |
| JPH0984162A (en) | Remote control light receiving unit | |
| JPH0779058A (en) | Device for mounting optical communication component on board | |
| JP2002250657A (en) | Illuminance sensor module | |
| US6787890B2 (en) | Optical package structure | |
| JPS58204573A (en) | Optically linked transmitting/receiving circuit | |
| JPS58206177A (en) | Optically linked receiving circuit | |
| JPH0563309A (en) | Semiconductor laser device | |
| JPH07245420A (en) | Semiconductor and remote-controlled light-reception device | |
| JP3343896B2 (en) | Optical module |