JP2932305B2 - Method for manufacturing semiconductor device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device in which contact characteristics of metal-semiconductor contacts are suppressed from variation due to heat treatment and variation over time. .

Characteristics of Schottky barrier formed between the prior art and problems to be solved semiconductor region and the barrier electrode of the present invention (Schottky barrier) is determined primarily by its height barrier (barrier height) phi _B,
Barrier height phi _B shot barrier is a problem that the change by the heat treatment process. That is, the semiconductor device manufactured in the state in which the barrier height phi _B varies greatly by the heat treatment, the Schottky characteristic of the barrier varies with long-term use, lower reliability. Therefore, in addition to heat treatment is intentionally vary the barrier height phi _B, it is necessary to manufacture the semiconductor device in the state where the variation of barrier height phi _B is decreased. However, in this case, it is impossible to produce a semiconductor device that requires a value of barrier height phi _B before heat treatment to obtain the desired properties. On the other hand, like the barrier height phi _B shots barrier, ohmic contact is formed between the metal electrode of the semiconductor region (metal - semiconductor contact)
Also, the variation in characteristics due to the heat treatment poses a problem.

Accordingly, an object of the present application is to provide a method of manufacturing a semiconductor device that suppresses a change in contact characteristics of a metal-semiconductor contact when subjected to a heat treatment or the like.

Means for Solving the Problems A method of manufacturing a semiconductor device according to the present invention includes a step of forming a titanium layer adjacent to one main surface of a semiconductor region and a step of oxidizing the titanium layer to convert it to a titanium oxide layer. Forming an electrode layer made of a metal and having a thickness larger than that of the titanium oxide layer on one main surface of the titanium oxide layer, and forming a metal-semiconductor contact between the semiconductor region and the system consisting of the titanium oxide layer and the electrode layer. And forming a. The titanium oxide layer has a thickness of 10 to 10
0 ° and the sheet resistance is 1 to 500 MΩ / □.

Action Oxidizes the titanium layer and converts it to a sheet resistance of 1 to 500 MΩ / □, that is, a titanium oxide layer having a higher sheet resistance than the titanium layer. It can be formed with high precision and can achieve quantum mechanical tunnel effect. Further, the contact characteristics of the metal-semiconductor contact formed between the system of the electrode layer, the titanium oxide layer, and the semiconductor region are as follows:
Depending on the heat treatment applied during the manufacture of the semiconductor device, the presence of the titanium oxide layer having a sheet resistance of 1 to 500 MΩ / □ effectively prevents the reaction in the system between the electrode layer, the titanium oxide layer and the semiconductor region, -Variations in the contact characteristics of the semiconductor contact can be suppressed. Furthermore, since the titanium oxide layer adheres better to both the electrode layer and the semiconductor region than an insulating film such as a silicon oxide film or a silicon nitride film, it has smaller energy and damages which are problematic in characteristics. The titanium layer can be satisfactorily deposited on the surface of the semiconductor region without giving it to the region.

Embodiment Hereinafter, as an embodiment of a method of manufacturing a semiconductor device according to the present invention, a method of manufacturing a power Schottky barrier diode will be described with reference to FIGS. 1A to 1F.

First, as shown in FIG. 1A, a semiconductor substrate (1) made of GaAs (gallium arsenide) is prepared. The semiconductor substrate (1) has a thickness of about 300 μm and an impurity concentration of 0.05 to 2 × 10 ¹⁸ c
An n-type region (3) having a thickness of 10 to 20 μm and an impurity concentration of 1 to 2 × 10 ¹⁵ cm ⁻³ is formed on the n − ^-type region (2) of m ⁻³ by epitaxial growth.

Next, as shown in FIG. 1B, Ti (titanium) which is a metal capable of forming a Schottky barrier between the n-type GaAs and the n-type GaAs is formed on the entire upper surface of the n-type region (3) made of n-type GaAs. , That is, a Ti layer (4) is formed by vacuum evaporation.
The thickness of the Ti layer (4) is as thin as about 30 °. Further, an ohmic contact electrode (5) made of an Au (gold) -Ge (germanium) alloy is formed on the lower surface of the n ^{+ -type} region (2) by vacuum evaporation.

Subsequently, as shown in FIG.
Heat treatment is performed for up to 30 minutes to oxidize the Ti layer (4) and convert it to a Ti oxide layer (titanium oxide layer) (6). The Ti oxide layer (6) is about 50 ° thicker than the Ti layer (4) having a thickness of about 30 °, and the sheet resistance of the Ti oxide layer (6) is 1 to 500 MΩ / □.
And high resistance. That is, the Ti oxide layer (6) is not TiO ₂ (titanium dioxide) which can be regarded as a perfect insulator, but a so-called oxygen-poor titanium oxide TiO _X having less oxygen than TiO _2.
(X is a numerical value smaller than 2).

Next, as shown in FIG. 1 (D), a layer made of Al (aluminum) which is a metal capable of forming a Schottky barrier with n-type GaAs on the entire upper surface of the Ti oxide layer (6), that is, an Al layer. Is formed by vacuum evaporation. The thickness of the Al layer (7) is about 2 μm
Thus, the thickness is sufficiently larger than the Ti layer (4) (thickness: about 30 °) and the Ti oxide layer (6) (thickness: about 50 °) obtained by converting the Ti layer (4) by oxidation.

Subsequently, as shown in FIG. 1E, a part of the Al layer (7) is etched away by photoetching, and the Al layer (7) is opposed to a region where a Schottky barrier to be a main forward current path is to be formed. (7a) is left. Further, the Ti oxide layer (6) is removed from the peripheral region of the element by photoetching, and the Ti oxide layer (6a) below the Al layer (7a) and the Ti oxide layer (6) surrounding the Ti oxide layer (6) are surrounded by the Ti oxide layer (6). 6b) is left.
Al and Ti are both metals that form a Schottky barrier with GaAs, and a Ti oxide layer (6b) as described later.
Alone forms a Schottky barrier at the interface with the n-type region (3), so that the Al layer (7a) and the Ti oxide layer (6a) are collectively called a barrier electrode (8). However, the Ti oxide layer (6a) is an extremely thin film, and the Ti layer (4), which has hardly oxidized, may remain extremely thin under the Ti oxide layer (6a). . Therefore, it is not always clear how the Ti oxide layer (6a) participates in the formation of the Schottky barrier together with the Al layer (7a). In the present specification, when an extremely thin Ti layer (4) remains under the Ti oxide layer (6a), the Ti oxide layer (6a) including the Ti layer (4) is included.
Called.

Next, as shown in FIG. 1 (F), the top of the titanium oxide layer (6b) is covered with an insulating film (9). The insulating film (9) is made of a silicon oxide film formed by a plasma CVD (Chemical Vapor Deposition) method. During plasma CVD,
The semiconductor substrate (1) is heated to about 350 ° C. Furthermore, Al
A connection electrode (10) made of Al is formed on the layer (7a) and the insulating film (9) by vacuum deposition. During vacuum deposition, the semiconductor substrate (1) is heated to about 150 ° C. Thus, a semiconductor chip having a Schottky barrier, that is, a power Schottky barrier diode chip is completed.

In the above-mentioned Schottky barrier diode chip, a first Schottky barrier is formed between the barrier electrode (8) and the n-type region (3), and the first Schottky barrier is formed between the Ti oxide layer (6b) and the n-type region (3). Then, a second Schottky barrier is formed.
As viewed in plan, the second Schottky barrier is formed in an annular shape that surrounds the first Schottky barrier adjacently. The Ti oxide layer (6b) functions as a resistive Schottky barrier field plate and improves the peripheral breakdown voltage of the first Schottky barrier. Regarding the resistive Schottky barrier field plate, the applicant has previously filed Japanese Patent Application No. 63-285049.
No. and others.

Figure 2 diagrammatically shows the change in the barrier height phi _B by heat treatment. The solid line in the figure indicates the variation of barrier height phi _B of the first Schottky barrier when subjected to heat treatment the fabricated Schottky barrier diode chip in the present embodiment, the broken lines in the figure, the conventional Schottky barrier diode chip,
That shows the variation of barrier height phi _B when the underlying Al layer (7a) is heat-treated in Schottky barrier diode chip is Ti oxide layer (6a) instead of Ti layer (4). As shown, compared with the conventional Schottky barrier diode chip, significantly less fluctuations in barrier height phi _B by the heat treatment in the Schottky barrier diode chip fabricated in this embodiment. In this embodiment, the Ti oxide layer (6a)
Since the reaction accompanying the heat treatment in the system of the layer (7a), the Ti oxide layer (6a) and the n-type region (3) is effectively prevented, the barrier height φ _B in the Shokki barrier diode chip is reduced.
Is suppressed. Further, since the Ti oxide layer (6a) is a film formed by oxidizing the Ti layer (4), a very thin film having a uniform thickness and capable of quantum mechanical tunneling can be formed to a high thickness. Can be formed with precision. Moreover, both the Ti layer (4) and the Ti oxide layer (6a) obtained by oxidizing the Ti layer (4) generate a Schottky barrier for the n-type region (3).
As a result, a Schottky barrier exhibiting good characteristics in both the forward and reverse directions can be generated between the barrier electrode (8) and the n-type region (3). Silicon oxide film instead of the Ti oxide layer (6a), although the variation of barrier height phi _B be a silicon nitride film other to some extent can be suppressed, these films Ga
It is not easy to form an ultrathin film with a uniform thickness and high film thickness accuracy on the upper surface of an As semiconductor. Also, the n value, which is an ideal coefficient as a Schottky barrier, is larger than 1.05,
The device has a high interface state density, which is not desirable in terms of characteristics.

The first Schottky initial value of the barrier height phi _B of the barrier (before the heat treatment barrier height formed between the barrier electrode of Schottky barrier diode chip fabricated in this Example (8) and the n-type region (3) phi _B )
Al layer (7a) to approximate the initial value of the barrier height phi _B of the Schottky barrier which is generated in the case of forming directly adjacent to the n-type region (3).

As described above, according to the Schottky barrier diode chip prepared in this example, variations in barrier height phi _B of the first Schottky barrier even when subjected to heat treatment can be prevented. For this reason, the present invention is particularly effective for manufacturing a high breakdown voltage Schottky barrier diode which needs to suppress the reverse leakage current as compared with the conventional Shokki barrier diode of FIG.

Modifications The present invention can be modified as follows.

(1) Instead of GaAs, III- such as InP (indium phosphide)
The present invention can be applied to a Schottky barrier semiconductor device using a group V compound or silicon.

(2) The present invention is effective when a resistive contact is formed between the electrode layer and the semiconductor region. For example, an emitter electrode of a transistor may be formed according to the present invention to form a two-layer electrode including a titanium oxide layer and an electrode layer. In this case, the formation of the alloy layer between the electrode layer and the semiconductor region forming the emitter region is suppressed by the interposition of the titanium oxide layer. Therefore, no problem occurs even if the diffusion depth of the emitter region is sufficiently reduced. At the same time, a change in the characteristic of the resistive contact between the electrode layer and the emitter region is prevented by the heat treatment.

(3) In the above embodiment, the thickness of the titanium oxide layer is set to 10Å
Although the thickness is set to 100 °, the thickness of the titanium oxide layer is desirably set to 20 ° to 80 ° in order to effectively suppress the reaction between the electrode layer and the semiconductor region and to form a good shock barrier or resistive contact. When a layer that can be regarded as a titanium layer remains under the titanium oxide layer, the thickness thereof is preferably set to 100 ° or less so as to enable a quantum mechanical tunnel effect.

(4) In a compound semiconductor such as GaAs, a technique of stabilizing the surface by adsorbing atoms such as S (sulfur) and Se (selenium) on the surface is known. However, these atoms are adsorbed and adsorbed on the surface. The present invention can also be applied to a semiconductor substrate having a single atomic layer or several atomic layers.

(5) The titanium oxide layer may be formed as a multilayer by repeating the step of forming the titanium layer and the step of oxidizing the same a plurality of times.

Effects As described above, according to the present invention, it is possible to provide a method of manufacturing a semiconductor device in which a change in contact characteristics of a metal-semiconductor contact is suppressed.

[Brief description of the drawings]

FIG. 1 is a process chart showing a method of manufacturing a semiconductor device according to one embodiment of the present invention, and FIG. 2 is a graph schematically showing a change in barrier height due to heat treatment. (1) ... semiconductor substrate, (2) ... n ^{+ type} region, (3) ...
... n-type region (semiconductor region), (4) ... Ti layer (titanium layer), (5) ... electrode, (6) ... Ti oxide layer (titanium oxide layer), (7) ... Al Layer (electrode layer), (8) barrier electrode, (9) insulating film, (10) connection electrode,

Claims (1)

(57) [Claims] A step of forming a titanium layer adjacent to one main surface of a semiconductor region; a step of oxidizing the titanium layer to convert it to a titanium oxide layer; Forming an electrode layer made of metal on the surface and thicker than the titanium oxide layer, and forming a metal-semiconductor contact between the semiconductor region and the system consisting of the titanium oxide layer and the electrode layer. In the method for manufacturing a semiconductor device, the titanium oxide layer has a thickness of 10 to 100 ° and a sheet resistance of 1 to 500 MΩ / □.