JP2931451B2 - Solar cell element - Google Patents

Solar cell element

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JP2931451B2
JP2931451B2 JP3239139A JP23913991A JP2931451B2 JP 2931451 B2 JP2931451 B2 JP 2931451B2 JP 3239139 A JP3239139 A JP 3239139A JP 23913991 A JP23913991 A JP 23913991A JP 2931451 B2 JP2931451 B2 JP 2931451B2
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silicon substrate
hole
layer
solar cell
region
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JPH0582811A (en
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勝彦 白沢
健次 福井
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京セラ株式会社
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L31/00Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus peculiar to the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022408Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/022441Electrode arrangements specially adapted for back-contact solar cells
    • H01L31/022458Electrode arrangements specially adapted for back-contact solar cells for emitter wrap-through [EWT] type solar cells, e.g. interdigitated emitter-base back-contacts
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L31/00Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus peculiar to the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus peculiar to the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus peculiar to the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/068Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus peculiar to the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H01L31/0682Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus peculiar to the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells back-junction, i.e. rearside emitter, solar cells, e.g. interdigitated base-emitter regions back-junction cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/54Material technologies
    • Y02E10/547Monocrystalline silicon PV cells

Description

【発明の詳細な説明】 DETAILED DESCRIPTION OF THE INVENTION

【0001】 [0001]

【産業上の利用分野】本発明は太陽電池素子に関する。 The present invention relates to a solar cell element.

【0002】 [0002]

【発明の背景】第一次石油ショック時に代替エネルギーの必要性がクローズアップされ、無尽蔵でクリーンな太陽エネルギーを源とする太陽電池が注目を浴び実用化のための低コストな太陽電池の開発がスタートした。 BACKGROUND OF THE INVENTION The need for alternative energy during the first oil shock is closed up, the development of low-cost solar cells for practical bathed solar cells sourced inexhaustible and clean solar energy attention It was launched. 開発は着実に成果をあげ、ここ10年間でコストは100分の1まで低減した。 Development is steady progress, cost was reduced to 1 of 100 minutes in the past 10 years. しかし、電力用として見た場合一般の商用電力と対比されるとコスト的には高く、実用化にはまだ遠いという感があった。 However, high in when contrasted with the general commercial power cost when viewed as a power, in practical use there is feeling that still far. ところが、最近、地球環境問題で脚光を浴び、開発は促進され実用化も間近なところまでせまってきている。 However, recently, the limelight in the global environmental issues, development has been forthcoming to the point where a close put to practical use is promoted. このような中で、低コストな太陽電池の実用化研究に加え、超高効率化を目的とした研究開発も新たに必要になってきた。 In this, in addition to the practical application research of low-cost solar cells, it has become the research and development necessary to newly intended for ultra high efficiency. すなわち、高効率化は、低コスト化に非常に重要な因子となる。 That is, the high efficiency is a very important factor in cost reduction. 単結晶シリコン太陽電池では、理論的には28%以上が達成可能であることが予測されている。 The single crystal silicon solar cell, it is predicted theoretically more than 28% is achievable.

【0003】超高効率太陽電池の研究開発には、高品質単結晶シリコン基板の持つ特性を最大限に引き出すことが重要である。 [0003] Research and development of ultra high-efficiency solar cell, it is important to maximize the characteristics of high-quality single-crystal silicon substrate. そのためには、キャリアや光の有効利用およびキャリアのライフタイムが維持できるようなセル構造および製造プロセスを開発する必要がある。 For this purpose, it is necessary to develop a cell structure and a manufacturing process, such as efficient use and lifetime of carriers in the carrier and the light can be maintained. そこで、本発明者等は、特願平2−226944号で、低反射構造でかつキャリアの再結合を防ぐことができるスルーホールバックコンタクト型太陽電池素子を提案した。 The present inventors have, in Japanese Patent Application No. 2-226944 proposed a through hole back contact solar cell which can prevent recombination of the low reflecting structure at and carrier.
この構造を図1に示す。 This structure is shown FIG. 図1において、1はp型単結晶シリコン基板、2は単結晶シリコン基板1に形成されたスルーホール、3はシリコン基板1の裏面側のスルーホール近傍に形成されたn +領域、4はn +領域の近傍に形成されたp +領域、5はp +領域部に形成された正電極、6はn +領域に形成された負電極、7、8、9はシリコン基板1の表面側とスルーホール2部分にそれぞれ形成されたパシベーッション層、正電荷を有する電子引付層、および反射防止層である。 In Figure 1, 1 denotes a p-type single crystal silicon substrate, 2 is a through hole formed in the single crystal silicon substrate 1, n + region formed in the vicinity through hole on the back surface side of the silicon substrate 1 is 3, is 4 n + region p + region formed in the vicinity of, 5 positive electrodes formed on the p + region portion, the negative electrode is formed on the n + region 6, 7, 8, 9 and the surface of the silicon substrate 1 Pashibesshon layers formed in the through hole 2 parts, electron attracting layer having a positive charge, and a reflection preventing layer.

【0004】シリコン基板1の表面側に正電荷を有する電子引付層8を形成すると、この正電荷の影響でシリコン基板1と電子引付層8の界面近くでは多数キャリアである正孔が基板1の内部へ押しやられ、少数キャリアである電子が基板1の表面に引きつけられる。 [0004] forming an electron attracting layer 8 having a positive charge on the surface of the silicon substrate 1, holes substrate having a number near the interface of the silicon substrate 1 and the electron attracting layer 8 carrier under the influence of this positive charge He pushed one into the interior, electrons which are minority carriers are attracted to the surface of the substrate 1. この結果、 As a result,
基板1の表面にごく薄いn型反転層10が生じる。 Very thin n-type inversion layer 10 is generated on the surface of the substrate 1. この表面付近のキャリアはスルーホール4部分のn型反転層10を経由して、シリコン基板1の裏面側のn +領域3 Carrier near this surface through the n-type inversion layer 10 of the through-hole 4 portion, the back surface side of the silicon substrate 1 n + region 3
へ導かれ、負電極5から取り出される。 Led to, it is taken out from the negative electrode 5. このように負電極5がシリコン基板の裏面側に形成されることから、シリコン基板の表面には入射光を遮る電極は存在せず。 Thus since the negative electrode 5 is formed on the back surface side of the silicon substrate not present electrode for shielding incident light on the surface of the silicon substrate. 変換効率を著しく高めることが可能になる。 It is possible to significantly increase the conversion efficiency.

【0005】ところが、上述のような反転層10を形成して電子を裏面側から取り出す場合、反転層10の直列抵抗が太陽電池素子の変換効率に大きく影響するので、 [0005] However, when forming an inversion layer 10 as described above taking out electrons from the back side, since the series resistance of the inversion layer 10 greatly affects the conversion efficiency of the solar cell element,
この反転層10は直列抵抗を下げるようなものでなければならない。 The inversion layer 10 must be such as to lower the series resistance. また、スルーホールの径が大きいと受光面積が減少するので、径はできるだけ小さい方が望ましいが、製造技術上からの制約がある。 Further, since the light receiving area diameter of the through hole is large is reduced, but the diameter is as small as possible is desired, there are constraints from the manufacturing technique.

【0006】 [0006]

【発明の目的】本発明は、このような背景のもとに成されたものであり、直列抵抗の増大化を解消した超高効率の太陽電池素子を提供することを目的とするものである。 SUMMARY OF THE INVENTION The present invention has been made based on such a background, it is an object to provide an ultra-high efficiency of the solar cell element which solves the increase in the series resistance .

【0007】 [0007]

【発明の構成】本発明によれば、p型単結晶シリコン基板に複数のスルーホールを設け、このシリコン基板裏面側のスルーホール近傍にn +領域を設け、このn +領域の近傍にp +領域を設け、このp +領域部に正電極を設け、前記n +領域部に負電極を設け、前記シリコン基板の表面側とスルーホール部の表面にパシベーション層、 According to the present invention DETAILED DESCRIPTION OF THE INVENTION, a plurality of through-holes in the p-type single crystal silicon substrate, an n + region disposed near the through holes of the silicon substrate backside, p in the vicinity of the n + region + the area is provided, a positive electrode provided on the p + region portion, a negative electrode provided on the n + region portion, a passivation layer on the surface side and the surface of the through hole of the silicon substrate,
電子引付層、および反射防止層を順次設けた太陽電池素子において、前記電子引付層の電荷密度が3×10 11 Electron attracting layer, and in turn provided a solar cell element antireflection layer, the electron attracting layer charge density is 3 × 10 11 ~
2×10 13 cm -2であり、且つ前記スルーホールの孔径が5〜50μmで孔間ピッチが10〜200μmであることを特徴とする太陽電池素子が提供される。 A 2 × 10 13 cm -2, and the hole diameter of the through hole hole pitch in 5~50μm is provided a solar cell element which is a 10 to 200 [mu] m.

【0008】 [0008]

【作用】上記のように、電荷密度が3×10 11以上の電子引付層を形成することによって、シリコン基板表面の表面ポテンシャルが向上してシリコン基板の表面部分に形成される反転層の直列抵抗を下げることができるとともに、電荷密度が2×10 13 cm -2以下の電荷引付層を形成することによって、反転層が深くなりすぎることによって生じる変換効率の低下を防止でき、さらに孔径が5〜50μmで孔間ピッチが10〜200μmのスルーホールを形成することによって、集光面積の低下に伴う変換効率の低下が防止でき、高効率の太陽電池素子が得られる。 [Action] As described above, by the charge density to form a 3 × 10 11 or more electron attracting layer, the series of inversion layer surface potential of the silicon substrate surface is formed on the surface portion of the silicon substrate is improved the resistance can be reduced by the charge density to form a 2 × 10 13 cm -2 or less of the charge attracting layer, can prevent a decrease in conversion efficiency caused by the inversion layer is too deep, more pore diameter by hole pitch to form a through-hole of 10~200μm in 5 to 50 [mu] m, can prevent reduction in conversion efficiency due to the decrease of the light collecting area, high efficiency solar cell element can be obtained.

【0009】 [0009]

【実施例】以下、本発明の実施例を添付図面に基づき詳細に説明する。 EXAMPLES Hereinafter, a description will be given of an embodiment attached in detail with reference to the accompanying drawings of the present invention. 本発明に係る太陽電池素子の構造自体は、図1に示す太陽電池素子の構造と同一である。 Structure itself of the solar cell element according to the present invention is the same as the structure of the solar cell element shown in FIG. シリコン基板1としては、CZ法などによって形成された比抵抗1〜100Ωcm程度のp型単結晶シリコン基板などが好適に用いられる。 The silicon substrate 1, such as p-type single crystal silicon substrate of about resistivity 1~100Ωcm which is formed by a CZ method is suitably used. +領域3とp +領域4は熱拡散法やイオン注入法によって形成され、正電極5と負電極6はアルミニウム、クロム、ニッケル、金、銀などを用いた蒸着法やスパッタリング法によって形成される。 n + region 3 and the p + region 4 is formed by a thermal diffusion method or an ion implantation method, the negative electrode 6 and the positive electrode 5 is formed of aluminum, chromium, nickel, gold, by vapor deposition or sputtering method using a silver that.
この電極、特に正電極5は、シリコン基板1の裏面側に達した光を反射してもう一度シリコン基板1内に戻すことができるようにできるだけ広い領域に亘って形成することが望ましい。 This electrode, the positive electrode 5 in particular, it is desirable to form over the widest possible area can be returned to by reflecting the light reaching the back surface side of the silicon substrate 1 the silicon substrate 1 again. また、シリコン基板1の表面とスルーホール2部分には、キャリアの再結合を防ぐための厚み100Å程度の酸化シリコン(SiO 2 )膜などから成るパシベーション層7が熱酸化法やプラズマCVD法などによって形成される。 Further, by the surface and the through hole 2 of the silicon substrate 1, silicon oxide having a thickness of about 100Å to prevent recombination of carriers (SiO 2) passivation layer 7 made of a film such as a thermal oxidation method or a plasma CVD method It is formed.

【0010】図2に電子引付層8の電荷密度とシリコン基板1の表面ポテンシャルとの関係を示す。 [0010] shows the relationship between the charge density and the surface potential of the silicon substrate 1 of the electron attracting layer 8 in FIG. なお、図2 It should be noted that FIG. 2
のシリコン基板は、アクセプタとしてボロンを1.5× Silicon substrate, 1.5 × boron as acceptor
10 16個含有するものである。 10 is 16 which contains. 図2で明らかなように、 As seen in Figure 2,
電子引付層8の電荷密度が1×10 11 cm -2からシリコン基板1の表面ポテンシャルは急上昇し、電子引付層8 Surface potential of the silicon substrate 1 charge density from 1 × 10 11 cm -2 of electron attracting layer 8 spikes, electron attracting layer 8
の電荷密度が3×10 11 cm -2以上になると表面ポテンシャルは0.75Vになり、それ以上電荷密度が増加しても表面ポテンシャルの増加率は鈍化する。 The surface potential when the charge density is 3 × 10 11 cm -2 or more becomes 0.75 V, the charge density is higher rate of increase of the surface potential also increases to slow down. すなわち、 That is,
電子引付層8の電荷密度は、3×10 11 cm -2以上あれば、シリコン基板1表面のシート抵抗を充分下げることができ、この基板1の表面近傍に反転層10を形成することができ、且つ反転層10の直列抵抗が下がることが分かる。 Charge density of the electron attracting layer 8 may or 3 × 10 11 cm -2 or higher, can be lowered sufficiently the sheet resistance of the silicon substrate 1, to form an inversion layer 10 in the vicinity of the surface of the substrate 1 can, and it can be seen that the series resistance of the inversion layer 10 is lowered. したがって、電子引付層8の電荷密度は、少なくとも3×10 11 cm -2必要である。 Thus, the charge density of the electron attracting layer 8 is -2 must be at least 3 × 10 11 cm.

【0011】図3に、電子引付層8の電荷密度と太陽電池素子1の変換効率との関係を示す。 [0011] FIG. 3 shows the relationship between the conversion efficiency of the charge density of the electron attracting layer 8 and the solar cell element 1. なお、図3中、○ In FIG. 3, ○
線はシリコン基板1の比抵抗が1Ωcmの場合、△線は同じく10Ωcmの場合、□線は同じく100Ωcmの場合であり、スルーホール2部分による入射光損失とシート抵抗による損失は加味されていない。 If the line has a specific resistance of the silicon substrate 1 of 1 .OMEGA.cm, △ lines also if a 10 .OMEGA.cm, □ line is also the case of 100 .OMEGA.cm, losses due to the incident light loss and sheet resistance of the through-hole 2 moiety is consideration. 図3で明らかなように、電子引付層8の電荷密度が2×10 12 cm -2 As is apparent in FIG. 3, the charge density of 2 × 10 electron attracting layer 8 12 cm -2
のときに変換効率は最も高く、それ以後電子引付層8の電荷密度が増加するにつれて反転層10は深く形成され、太陽電池素子の変換効率は徐々に低下し、電子引付層8の電荷密度が2×10 13 cm -2以上になると変換効率は20%を切ってしまう。 Conversion efficiency is the highest when, subsequent inversion layer 10 as the charge density of the electron attracting layer 8 increases is deeply formed, the conversion efficiency of the solar cell element is gradually decreased, the charge of the electron attracting layer 8 density is 2 × 10 13 cm -2 or higher conversion efficiency would cut 20%. したがって、電子引付層8 Therefore, the electronic attracting layer 8
の電荷密度は、多くても2×10 13 cm -2としなければならない。 The density of the charge is to be not 2 × 10 13 cm -2 at most.

【0012】上述のような電子引付層8は、例えばシランガス(SiH 4 )とアンモニアガス(NH 3 )を用いたプラズマCVD法などで形成される。 [0012] electron attracting layer 8 as described above is formed, for example, silane gas (SiH 4) and ammonia gas (NH 3) plasma CVD method using, for example. この場合、基板温度を例えば400℃に設定して、シランガスとアンモニアガスの流量比(SiH 4 /NH 3 )を例えば0.1 In this case, by setting the substrate temperature for example to 400 ° C., the flow rate ratio of silane gas and ammonia gas (SiH 4 / NH 3) for example 0.1
4〜0.59などに設定して厚み800Å程度に形成する。 Set the like 4 to 0.59 to form a thickness of about 800Å to.

【0013】図4に電子引付層8の電荷密度が2×10 [0013] The charge density of the electron attracting layer 8 in FIG. 4 is 2 × 10
13 cm -2のときの、スルーホール2の孔径と変換効率の関係を示す。 When the 13 cm -2, showing the relationship between conversion efficiency and hole diameter of the through-hole 2. なお、図4中、黒丸線は孔間ピッチが20 In FIG. 4, black dots line hole pitch is 20
μm、白丸線は孔間ピッチが50μm、黒三角線は孔間ピッチが100μm、黒四角線は孔間ピッチが150μ [mu] m, white circle line hole pitch is 50 [mu] m, black triangles line hole pitch is 100 [mu] m, the black squares line has holes pitch 150μ
m、白四角線は孔間ピッチが200μm、白六角線は孔間ピッチが300μmである。 m, open square line hole pitch is 200 [mu] m, the white hexagonal wire hole pitch is 300 [mu] m. 図5に、電子引付層8の電荷密度が2×10 12 cm -2のときのスルーホール2の孔径と変換効率の関係を示す。 Figure 5 shows the relationship between pore size and the conversion efficiency of the through holes 2 when the electron attracting layer charge density of 8 2 × 10 12 cm -2. なお、孔間ピッチとは、 It is to be noted that the hole pitch,
スルーホール2の中心から隣接するスルーホール2の中心までの間隔をいう。 It refers to spacing to the center of the through holes 2 adjacent the center of the through-hole 2. 図4および図5で明らかなように、孔径が50μm以下で孔間ピッチが200μm以下であれば、変換効率が20%以上になる。 4 and as Figure 5 clearly, if pore size of 50μm hole pitch is at 200μm or less below the conversion efficiency is 20% or more. 特に、孔径が10μmで孔間ピッチが50μmの場合は最適である。 In particular, hole diameter when the hole pitch at 10μm of 50μm is optimal.
孔径が50μm以上の場合、および孔間ピッチが200 If pore diameter is more than 50 [mu] m, and Anakan pitch 200
μm以上の場合は、変換効率は20%以上にはならない。 For more [mu] m, the conversion efficiency is not more than 20%. なお、孔径が5μm以下で孔間ピッチが10μm以下のスルーホール2を形成することは、実際的な問題として製造技術上の困難が伴う。 Incidentally, pore diameter be between-hole pitch 5μm or less to form a less through-holes 2 10 [mu] m involves difficulties on manufacturing technology as a practical matter. したがって、スルーホール2の孔径は5〜50μmで孔間ピッチは10〜200 Accordingly, the diameter of the through hole 2 hole pitch is 5 to 50 [mu] m 10 to 200
μmに設定しなければならない。 It must be set to μm.

【0014】上述のようなスルーホール2は、YAGレーザーあるいはフッ硝酸溶液を用いたエッチングなどによって形成することができる。 [0014] the through hole 2 as described above can be formed by etching using a YAG laser or hydrofluoric-nitric acid solution.

【0015】 [0015]

【発明の効果】以上のように、本発明に係る太陽電池素子によれば、p型単結晶シリコン基板に複数のスルーホールを設け、このシリコン基板裏面側のスルーホール近傍にn +領域を設け、このn +領域の近傍にp +領域を設け、このp +領域部に正電極を設け、前記n +領域部に負電極を設け、前記シリコン基板の表面側とスルーホール部の表面にパシベーション層、電子引付層、および反射防止層を順次設けた太陽電池素子において、前記電子引付層の電荷密度が3×10 11 〜2×10 13 cm -2であり、且つ前記スルーホールの孔径が5〜50μmで孔間ピッチが10〜200μmであることから、シリコン基板表面の表面ポテンシャルが向上してシリコン基板の表面に形成される反転層の直列抵抗を下げることができるとともに、反転層を As is evident from the foregoing description, according to the solar cell element according to the present invention, a plurality of through-holes in the p-type single crystal silicon substrate, an n + region disposed near the through holes of the silicon substrate backside the p + region disposed in the vicinity of the n + region, a positive electrode provided on the p + region portion, a negative electrode provided on the n + region portion, the passivation on the surface side and the surface of the through hole of the silicon substrate layer, an electron attracting layer, and in turn provided a solar cell element antireflection layer, the charge density of the electron attracting layer is 3 × 10 11 ~2 × 10 13 cm -2, and a pore size of the through hole since There is a hole pitch between 10~200μm in 5 to 50 [mu] m, it is possible to reduce the series resistance of the inversion layer surface potential of the silicon substrate surface is formed on the surface of the silicon substrate is improved, an inversion layer リコン基板の表面近傍に形成して変換効率を高めることができ、さらに集光面積の低下に伴う変換効率の低下も防止でき、高効率の太陽電池素子が得られる。 Formed near the surface of the silicon substrate can be enhanced conversion efficiency, further can be prevented reduction in conversion efficiency due to the decrease of the light collecting area, high efficiency solar cell element can be obtained.

【図面の簡単な説明】 BRIEF DESCRIPTION OF THE DRAWINGS

【図1】太陽電池素子の構造を示す図である。 1 is a diagram showing the structure of a solar cell element.

【図2】電子引付層の電荷密度とシリコン基板の表面ポテンシャルとの関係を示す図である。 2 is a diagram showing the relationship between the charge density and the surface potential of the silicon substrate of the electron attracting layer.

【図3】電子引付層の電荷密度と太陽電池素子の変換効率との関係を示す図である。 3 is a diagram showing the relationship between the conversion efficiency of the charge density and the solar cell element of the electron attracting layer.

【図4】電子引付層の電荷密度が2×10 13 cm -2のときのスルーホールの孔径と変換効率の関係を示す図である。 4 is a diagram showing the pore size and the relationship of the conversion efficiency of the through hole in the case of the electron attracting layer charge density 2 × 10 13 cm -2.

【図5】電子引付層の電荷密度が2×10 12 cm -2のときのスルーホールの孔径と変換効率の関係を示す図である。 5 is a diagram showing the pore size and the relationship of the conversion efficiency of the through hole in the case of the electron attracting layer charge density 2 × 10 12 cm -2.

【符号の説明】 DESCRIPTION OF SYMBOLS

1・・・p型単結晶シリコン基板、2・・・スルーホール、3・・・n +領域、4・・・p +領域、5・・・正電極、6・・・負電極、7・・・パシベーッション層、 1 ... p-type single crystal silicon substrate, 2 ... through hole, 3 ... n + region, 4 ... p + region, 5 ... positive electrode, 6 ... negative electrode, 7- ... Pashibesshon layer,
8・・・電子引付層、9・・・反射防止層。 8 ... electron attracting layer, 9 ... anti-reflection layer.

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl. 6 ,DB名) H01L 31/04 ────────────────────────────────────────────────── ─── of the front page continued (58) investigated the field (Int.Cl. 6, DB name) H01L 31/04

Claims (1)

    (57)【特許請求の範囲】 (57) [the claims]
  1. 【請求項1】 p型単結晶シリコン基板に複数のスルーホールを設け、このシリコン基板裏面側のスルーホール近傍にn +領域を設け、このn +領域の近傍にp +領域を設け、このp +領域部に正電極を設け、前記n +領域部に負電極を設け、前記シリコン基板の表面側とスルーホール部の表面にパシベーション層、電子引付層、および反射防止層を順次設けた太陽電池素子において、前記電子引付層の電荷密度が3×10 11 〜2×10 13 cm -2 1. A provided with a plurality of through-holes in the p-type single crystal silicon substrate, an n + region disposed near the through holes of the silicon substrate backside, a p + region disposed in the vicinity of the n + region, the p a positive electrode provided in the + region portion, the n + region portion provided negative electrode, a passivation layer on the surface side and the surface of the through hole of the silicon substrate, an electron attracting layer, and sequentially provided solar antireflection layer in the battery device, the electronic charge density of the attracting layer is 3 × 10 11 ~2 × 10 13 cm -2
    であり、且つ前記スルーホールの孔径が5〜50μmで孔間ピッチが10〜200μmであることを特徴とする太陽電池素子。 , And the solar cell element and the hole diameter of the through-hole and the hole pitch in 5~50μm characterized in that it is a 10 to 200 [mu] m.
JP3239139A 1991-09-19 1991-09-19 Solar cell element Expired - Fee Related JP2931451B2 (en)

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