JP2930127B2 - Image forming device with shadow - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image forming apparatus for decorating a document image by adding another image to the document image, and is used, for example, in a copying machine or a facsimile machine. .

(B) Conventional technology Conventionally, in this type of image forming apparatus, an image in which a part of a document image is surrounded by a frame line or an image in which a mesh pattern is superimposed on a part of a document image are formed. It has been known.

(C) Problems to be Solved by the Invention However, there is a demand for further diversification of image decoration in such an image forming apparatus.

The present invention has been made in view of such circumstances, and provides an image forming apparatus capable of obtaining an image decorated with a shadow on a document image.

(D) Means for Solving the Problems The present invention relates to a photoelectric conversion unit that horizontally and vertically scans a document image and converts it into an electric signal for each pixel, and an A / D that performs A / D conversion of an output of the photoelectric conversion unit. Conversion means, signal conversion means for converting the output of the A / D conversion means into a binary serial signal representing white pixels and black pixels, and again after the signal output from the signal conversion means changes from black to a white pixel signal. Detecting means for detecting a shadowable area until a change from white to black pixel signal, and shadow signal forming means for outputting a shadow signal obtained by alternately combining a predetermined number of serial white pixel signals and black pixel signals, Setting means for setting a shadow area to be added after the signal output from the signal conversion means changes from black to a white pixel signal; and either a shadowable area or a set shadow area for the signal output by the signal conversion means. The shadow signal in the smaller area Adding means for inverting and adding black and white every number of horizontal scanning lines;
This is a shadowed image forming apparatus including a reproducing unit that reproduces a binary serial signal to which a shadow signal is added into an image.

As the photoelectric conversion unit, a CCD image sensor, a MOS image sensor, or the like is used. Further, a laser printer, a thermal transfer printer, an ink ribbon printer, or the like is used as the reproducing means.

FIG. 1 is a block diagram showing the configuration of the present invention.
Reference numeral 1 denotes a photoelectric conversion unit that horizontally and vertically scans an original image and converts it into an electric signal for each pixel, 102 denotes an A / D conversion unit that performs A / D conversion of an output of the photoelectric conversion unit 101, and 103 denotes an A / D conversion unit. A signal conversion means for converting the output of 102 into a binary serial signal representing a white pixel and a black pixel, 104 is a signal from the signal conversion means 103 which changes from black to a white pixel signal and then again from white to a black pixel signal Detecting means 105 for detecting a shadowable area until the change, a shadow signal forming means 105 for outputting a shadow signal obtained by alternately combining a predetermined number of serial white pixel signals and a predetermined number of serial black pixel signals, 106 Is a setting unit that sets a shadow area to be added after the signal output from the signal conversion unit 103 changes from black to a white pixel signal. 107 is a shadowable area and a set shadow area for the signal output by the signal conversion unit 103. A shadow signal in a smaller area An addition unit 108 for inverting and adding black and white for each horizontal scanning line and a reproduction unit 108 for reproducing a signal output from the signal conversion unit and added with the shadow signal into an image.

(E) Operation In FIG. 1, when the photoelectric conversion means 101 horizontally and vertically scans the original image and converts it into an electric signal for each pixel,
D conversion means 102 A / D converts the electric signal. The signal converter 103 converts the digital output of the A / D converter 102 into a binary serial signal represented by white pixels and black pixels. The detection means 104 detects a shadowable area from when the binary serial signal changes from black to a white pixel signal to when it changes again from white to a black pixel signal. The setting means 106 is a signal conversion means 1
Set the shadow area to be added after the signal output from 03 is converted from black to a white pixel signal. The signal forming means 105 outputs a shadow signal obtained by alternately combining a predetermined number of serial white pixel signals and a predetermined number of serial black pixel signals. Then, with respect to the signal output from the signal conversion unit 103, the shadow signal is inverted in black and white every predetermined number of horizontal scanning lines in the narrower one of the shadowable area and the set shadow area, and the addition unit 107 The added binary serial signal to which the shadow signal is added is reproduced by the image reproducing means 108. In this way, the original image is converted into a binary image signal of white and black, a shadow image signal is added following the black image signal, and then reproduced. Therefore, the shadowing process for the image is performed in real time.

(F) Embodiment Hereinafter, the present invention will be described in detail based on an embodiment shown in the drawings. This does not limit the present invention.

FIG. 2 is a structural explanatory view showing an embodiment in which the present invention is applied to a copying machine, wherein 1 is a document, 2 is a mounting table on which the document 1 is placed, 3 is a document cover, and 4 is moved in the direction of the arrow. The lamps 5, 6 and 7 are mirrors for reflecting image light from the original 1, the mirror 5 moves together with the lamp 4 in the direction of the arrow, and the mirrors 6 and 7 control the speed of the lamp 4. It also moves in the direction of the arrow at half the speed. The image light of the document reflected by the mirror 7 passes through the f · θ lens 8
The light is received by a CCD image sensor (hereinafter referred to as a CCD) 9. CCD9 arranges 1000 to 5000 photosensors in a chip form, accumulates the electric charges photoelectrically converted by the sensors in a built-in capacitor, transfers the charges of all the photosensors to a built-in shift register by a trigger signal, and outputs them sequentially. It has become. Next, the image of the original 1 received by the CCD 9 is converted into a video signal by a signal processing circuit described later. Reference numeral 10 denotes a semiconductor laser that turns on / off laser light in response to the video signal, 11 denotes a polygon mirror that reflects laser light emitted from the semiconductor laser, 12 denotes a motor that drives the polygon mirror, and 13 denotes a polygon mirror. The mirror irradiates the laser beam onto the photosensitive drum 14 rotating in the direction of the arrow. The photoconductor drum 14 has a main charger in advance.
When the laser beam is received, the electrostatic latent image is formed, and the developing device 15 forms a toner image. When the transfer paper 17 is supplied from the transfer paper cassette 16, the toner image is transferred to the transfer charger.
Transferred to transfer paper by 18. The transfer paper on which the toner image has been transferred is separated from the photosensitive drum 14 by a separation charger 19, conveyed to a fixing device 21 by a conveyor belt 20, fixed by the fixing device 21, and carried out to the toner 23. The laser light emitted from the semiconductor laser 10 is horizontally scanned by a polygon mirror and vertically scanned by rotation of the photosensitive drum 14 in the direction of the arrow, so that an electrostatic latent image corresponding to the image of the original 1 is Formed on

FIG. 3 is a block diagram showing an image processing circuit of the embodiment shown in FIG. 2, and an image signal detected by the CCD 9 is
The signal is converted into an 8-bit digital signal by the A / D converter 24. Then, the shading correction circuit 25 and the logarithmic correction circuit 26 correct variations in the light amount distribution of the lamp 4 for illuminating the original and variations in the sensitivity of the photo sensor of the CCD 9.
Further, the image signal is input to the shadowing processing circuit 27 and the dither processing circuit 28. In the shadow processing circuit 27, image data is subjected to shadow processing, and in the dither processing circuit 28, pixel data is binarized by a threshold value that changes for each pixel, that is, a dither matrix. Next, the data selector 29 outputs the output of the shadow processing circuit 27 to the semiconductor laser 10 of the image reproduction circuit 10a in the area specified by the area generation circuit 30, and outputs the dither processing circuit in the other areas. Is output to the semiconductor laser 10 of the image reproducing circuit 10a. In this manner, the image of the original 1 is subjected to the shadowing process on the necessary portions and is copied onto the transfer paper 17.

Hereinafter, the shadowing processing circuit 27 will be described in detail. 4 to 6 are electric circuit diagrams for explaining details of the shadowing processing circuit 27. FIG. First, in the circuit C1 of FIG.
S1 and a preset binarized threshold signal S2 are compared by a comparator 31. If the image signal S1 is larger than the threshold value, it is set to "1", and if it is smaller than the threshold value, it is set to "0".
The value image signal S3 is output. The signal S3, the basic clock signal S4, and the horizontal synchronization signal S5a are input to the D flip-flop 32. Then, the digital image signal S1 is converted into a binary serial signal S3 representing white pixels and black pixels, and
The shadeable area from the conversion of the signal S3 from black to a white pixel signal to the change from white to a black pixel signal again is output as the processing enable signal S0.

The circuit C2 in FIG. 5 is a circuit for generating a shadow width effective area signal, 33 is a counter, 34 is a comparator, 35 is an OR gate,
36 is a D flip-flop, and 37 is an AND gate.

By inputting the processing enable signal S0 and the shadow width setting signal S5 to the circuit C2 shown in FIG. 5, a signal representing the smaller one of the two, that is, the shadow width effective area signal S6
Is output.

FIG. 6 shows a circuit for generating a shadow signal and adding it to the image signal, 38 to 40 are D flip-flops, 41 to 43 are AND gates, 44 and 45 are OR gates, S7 is a horizontal synchronizing signal, S8 Is a vertical synchronization signal.

The operation in such a configuration will be described with reference to a time chart shown in FIG.

First, the horizontal synchronizing signal S8, that is,
Then, the clear state of the D flip-flop 38 is released, and the D flip-flop 38 becomes valid. The positive logic output S9 of the D flip-flop 38 is low in the initial state.
And toggles in synchronization with the horizontal synchronizing signal S7, that is, the rising edge of the triangle.

Further, the negative logic output S10 of the D flip-flop 38 is High in the initial state, and toggles in synchronization with the rising edge of the signal S7.

When the signal S7 becomes High, the clear state of the D flip-flop 39 is released, and the D flip-flop 39 becomes valid.

The positive logic output S11 of the D flip-flop 39 is low in the initial state, and toggles in synchronization with the rising edge of the clock signal S4.

The negative logic output S12 of the D flip-flop 39 is High in the initial state, and toggles in synchronization with the rising edge of the clock signal S4.

Since the binary image signal is synchronized with the clock signal S4,
The output of the D flip-flop 39 is Hi once every two pixels.
gh (Low) signal is output. D flip-flop 3
The negative logic output S12 of 9 is the inverse of the positive logic output S11 of the D flip-flop 39, and is shifted by one pixel with respect to the output S11.
High will be output.

The AND gate 41 outputs the logical product of the positive logic outputs S9 and S11 of the D flip-flops 38 and 39.

The AND gate 42 outputs the logical product of the negative logic outputs S10 and S12 of the D flip-flops 38 and 39.

By taking the logical sum of the outputs S13 and S14 of the AND gate 41 and the AND gate 42, the positive logical output S1 of the D flip-flop 39 is obtained.
1 and the negative logic output S12 can be output alternately for each line.

While the shadow width effective area signal S6 is High, the D flip-flop 40 outputs the logical sum of the outputs S13 and S14 of the AND gates 41 and 42 in synchronization with the clock signal S4. The dot shadow signal S16 is generated in this manner, and the logical sum of the dot shadow signal S16 and the binary image signal S3 is obtained, thereby outputting the shadowed image signal S17.

Thus, a shadowed image as shown in FIG. 8 is formed. That is, in FIG. 8, (A) is the current image portion, (B) is the shadow portion, and in the shadow portion (B), a shadow image obtained by alternately combining white pixels and black pixels is black and white for each horizontal scanning line. It is formed to be inverted.

FIG. 9 shows an example of a shadowed image actually obtained in this embodiment.

(G) Effects of the Invention According to the present invention, it is possible to add a shadow having an arbitrary density and an arbitrary width to an original image in real time when an original is reproduced.

[Brief description of the drawings]

FIG. 1 is a block diagram showing the configuration of the present invention, FIG. 2 is an explanatory diagram of the configuration of one embodiment of the present invention, FIG. 3 is a block diagram showing a control circuit of the embodiment shown in FIG. 2, and FIG. ~ 6th
FIG. 3 is an electric circuit diagram showing details of the main part of FIG. 3, and FIG.
FIG. 8 is a time chart showing the operation of the electric circuit diagrams shown in FIGS. 6 to 6, FIG. 8 is an explanatory diagram schematically showing the relationship between the original image and the shadow, and FIG. It is an image figure showing an example of the formed shadowed image. 31,34 ... Comparator, 32,36,38 ~ 40 ... D flip-flop, 33 ... Counter, 37,41 ~ 43 ... AND gate, 35,44,45 ... OR gate.

Claims (1)

(57) [Claims] 1. A photoelectric conversion means for horizontally and vertically scanning a document image and converting it into an electric signal for each pixel, an A / D conversion means for A / D converting an output of the photoelectric conversion means, and an A / D conversion means. And a signal conversion means for converting the output of the signal into a binary serial signal representing a white pixel and a black pixel, and from when the signal output from the signal conversion means changes from black to a white pixel signal and then again from white to a black pixel signal Detecting means for detecting a shadowable area, a shadow signal forming means for outputting a shadow signal obtained by alternately combining a predetermined number of serial white pixel signals and black pixel signals, and a signal output from the signal converting means being black. Setting means for setting a shadow area to be added after changing from a white pixel signal to a white pixel signal; and a signal output from the signal conversion means, wherein the shadow signal is set in a smaller one of a shadowable area and a set shadow area. Is set to black and white every predetermined number of horizontal scan lines. And adding means for adding by, shaded image forming apparatus comprising a reproducing means for reproducing a binary serial signal shadow signal is added to the image.