JP2913306B2 - Electronics - Google Patents

Description

Description: BACKGROUND OF THE INVENTION The present invention relates to a security device such as a memory mechanism such as a RAM card which is already commonly used, and particularly a RAM card which is repeatedly accessed.

2. Description of the Related Art In general, a memory device of an electronic apparatus repeatedly accesses a memory device, and a mistake must not be made each time. Should a malfunction occur, if newly added data results in a mistake, there is little damage, but in general, if a malfunction occurs, all data stored in the memory is destroyed in an instant. In particular, in the case of a memory device that is accessed instantaneously, such as a RAM card using an integrated IC circuit, measures against a power supply device become a major problem. Generally power supply terminal (Vcc)
When the system is powered on, no voltage is supplied when the system is powered off, and no voltage is supplied when the system is powered off.If the RAM card is removed while the system is powered on or accessing the RAM card, In some cases, circuit destruction or data loss occurred.

In addition, when the system is powered on, the power supply of the RAM card was always supplied with accessible power, so wasteful power was consumed, and a lot of power was consumed to make it compact and portable. Because of this.

Furthermore, when the system was turned off, no voltage was supplied to the power supply Vcc of the RAM card, so the lithium battery built in the RAM card was consumed for holding data in the RAM card, and the life of the lithium battery was short.

FIG. 5 shows an example of a circuit according to the prior art, wherein 501 is a battery, 502 is an AC adapter, 503 is a power supply unit, 504 is a power supply control unit, 505 is a transistor for supplying power to the Vcc terminal, and 506 is a central control unit (CPU ) And peripheral circuits, 507 and 509 are buffers, and 508 is a bidirectional buffer.

[Problem to be Solved by the Invention] Accordingly, an object of the present invention is to provide a device which does not cause the circuit destruction of the RAM card or the loss of data even if the power of the system is turned on or the RAM card is inserted and removed while accessing the RAM card. Another object of the present invention is to provide a device capable of reducing unnecessary current when the RAM card is not accessed and reducing the consumption of a lithium battery built in the RAM card.

[Means for Solving the Problems] In order to achieve the above object, an electronic apparatus according to the present invention is an electronic apparatus that records and / or reproduces information by supplying power to a detachably connected storage device. A lid member provided so as to be openable and closable, wherein the removal of the storage device is prohibited in the closed state and the storage device can be removed in the open state; and a lid open / close detection for detecting the open / closed state of the lid member. Means, a power supply terminal for supplying power to the storage device, first switch means which is turned off when the detection result of the lid opening / closing detection means is opened, and recording and / or reproducing information in the storage device There is provided a second switch means which is turned on inside, and the first and second switch means are connected in parallel between a power supply and a power supply terminal.

Further, it is characterized by further comprising first control means for continuing recording and / or reproduction of a predetermined amount of information after the first switch means is turned off.

A plurality of signal terminals for recording and / or reproducing information in and from a storage device; buffer means capable of switching between a state in which a predetermined signal is output to the signal terminal and a state in which the signal terminal is set to high impedance; A second control unit that sets the buffer unit to a high impedance state after a predetermined amount of access by the first control unit when the first switch unit is turned off.

The second switch means is configured to be turned off when information is not recorded and / or reproduced in the storage device.

[Embodiment] FIG. 1 shows a central control unit (CPU) and a peripheral circuit 105 of a computer that performs processing of the present system. The buffers 106 and 108 and the bidirectional buffer 107 are provided between the CPU and the RAM card so as not to interfere with each other.
Q1 is a transistor that controls the power supply Vcc of the RAM card. Q3 is controlled by the power control unit. SW1 is a switch that operates in conjunction with a lid that covers the RAM card. SW1 is off when the lid that covers the RAM card is open, and SW1 is on when it is closed. The RAM card can be inserted and removed only when the lid is open. CD2 and CD1 are RAM card attachment detection terminals, and CD1 and CD2 are connected inside the RAM card. Q
Reference numeral 2 denotes a transistor for controlling the power supply Vcc of the RAM card similarly to Ql, which is controlled by the CPU. The power supply unit is a circuit for generating a voltage for operating the circuit from the voltage of the battery 101. The AC adapter 102 is for charging a battery.

The RAM card connector connects the system to the RAM card.

VBK is a power supply that is always supplied regardless of whether the power of this system is on or off. Also from CP of Q3
A signal is connected to the interrupt NM1 of U. Also at the same time CP
The status can be read at the input port IN of U.

Explaining the case where the RAM card is inserted and removed while the system is powered off, Q2 is always off while the system is powered off. Before inserting the RAM card into the RAM card connector, Q1 is off because the space between CD2 and CD1 is open. Therefore, no voltage appears at the power supply Vcc of the RAM card. While the power supply of the present system is off, the power supply of the buffer and the bidirectional buffer is off. Therefore, when the RAM card is inserted into the RAM card connector, no voltage appears on any pin of the RAM card connector.

After inserting the RAM card and closing the lid that covers the RAM card, SW1 turns on. At this time, if Q3 is on, Q1 turns on and R
Supply voltage to power supply Vcc of AM card.

When removing the RAM card, first open the lid that covers the RAM card, and SW1 turns off. This makes Q independent of the state of Q3
1 is turned off, and no voltage is supplied to the power supply Vcc of the RAM card. Therefore, no voltage appears on the RAM card connector when the RAM card is removed.

Therefore, when inserting or removing the RAM card, the RAM card is externally affected and does not cause circuit destruction or data loss.

Next, a case will be described in which the RAM card is removed and inserted when the power of the present system is turned on to access the card.

Before inserting the RAM card into the RAM card connector, the CD
Q1 is off because there is an open between 2 and CD1.

When the level of the IN terminal is high, the CPU 105
Is programmed to turn off, so no voltage appears at Vcc. Further, the CPU sets the buffer when the IN terminal is at a high level, sets the / G terminal of the bidirectional buffer to a high level, and sets the bidirectional buffer to a high impedance state. Therefore, when inserting the RAM card into the RAM card connector, no voltage appears on any pin of the RAM card connector.

After inserting the RAM card and closing the lid that covers the RAM card, SW1 turns on. If Q3 is on, Q1 is on and R
Supply power to Vcc of AM card. In Q1, the base current is determined so that a current sufficient to hold the stored contents of the RAM card is passed, and the base current is very small compared to the total current consumption.

Thus, no voltage is applied to the RAM card until the RAM card is plugged into the RAM card connector and the lid is closed. Therefore, the RAM card is not affected by external influences and does not cause circuit destruction or loss of stored data.

When the CPU accesses the RAM card, the CPU sets the / G terminal of the buffer and the bidirectional buffer to low level to enable them. Thereafter, the PORT terminal of the CPU goes low, the base terminal of Q2 goes low, and Q2 is turned on. Q2
The base current is several times the base current of Q1 so that the current required for accessing the RAM card can be supplied to the RAM card.

When the access to the RAM card is completed, the CPU turns off Q2 and disables the buffer and the bidirectional buffer. Unless it is necessary for access, the base current is not supplied to Q2 to eliminate unnecessary current consumption.

When removing the RAM card after the access is completed, Q1 turns off when the lid that covers the RAM card is opened to remove the RAM card.

At this time, since Q2 has already been turned off, the electric charge Vcc of the RAM card is turned off.

Also, since the buffer and bidirectional buffer are disabled, no voltage appears at any pin of the RAM card connector.

Even when the RAM card is removed as described above, there is no circuit destruction or data loss due to the external influence of the RAM card.

If the user tries to remove the RAM card while the CPU is accessing the RAM card, the user first opens the lid covering the RAM card. At this time, since SW1 is turned off, the NMI of the CPU becomes high level, and an interrupt is generated for the CPU.

Q2 during access even if SW1 turns off and Q1 turns off
Is turned on, so that access to the RAM card can be continued. When the CPU accepts the interrupt, it performs the minimum necessary access, stops access to the RAM card, and disables the buffer and bidirectional buffer. Further, the CPU turns off Q2. Since the time from when the lid to cover the RAM card is opened to when the CPU removes the RAM card is much faster than when the CPU turns off Q2, when removing the RAM card, no voltage appears on the RAM card connector. There is no RAM card circuit destruction or data loss.

Q3 controlled by the power control unit is always on when the power of this system is on. When the power of the present system is off, Q3 turns on if the AC adapter 102 is connected, and turns off if the AC adapter is not connected. FIG. 2 shows a RAM used in the present invention.
This is a diagram showing the internal structure of the card. If a voltage is supplied to the power supply Vcc of the RAM card, the backup lithium battery 201 built in the RAM card is not consumed. 202 is Vcc
A power supply switching circuit 203 for supplying power from the power supply and for supplying power from an internal battery is a RAM.

FIG. 3 is a flow chart showing the procedure for accessing the RAM card. If the IN terminal is at the high level (301), if NO, the buffer and the bidirectional buffer are enabled (302) and Q2 is turned on (303). 304), turn off Q2 (30
5) The buffer and the bidirectional buffer are disabled (306).

FIG. 4 hears the lid of the RAM card, interrupts the CPU, suspends access to the RAM card (401), disables the buffer and bidirectional buffer (402), and turns off Q2 (403).

In a system using a general RAM card, when the power switch is turned off, the lithium battery built into the RAM card replaces the RAM.
However, in the system of the present invention, the lithium battery contained in the RAM card is not consumed when the power is on, and the lithium battery is consumed when the AC adapter is connected even when the power is off. Not done.

As described above, in this system, no voltage appears on the RAM card connector and the circuit of the RAM card is not destroyed or the data is not lost when the RAM card is inserted or removed.

Also, Q2 is turned on only when accessing the RAM card to reduce the current consumption of the circuit.Furthermore, even when the system according to the present invention is turned off, the AC adapter is connected and external power is supplied. If so, power is being supplied to the RAM card, and the power consumption of the lithium battery built into the RAM card has been reduced to a very small amount.

[Effects of the Invention] The present invention is particularly effective for portable information devices, but can be widely applied as a safety device for any system, and has a wide application range such as terminal devices, page printers, magnetic hard disk devices, and image scanners. .

[Brief description of the drawings]

FIG. 1 is a diagram showing a circuit configuration of the present invention, FIG. 2 is a diagram showing an internal configuration of a RAM card used in the present invention, FIG. 3 is a diagram showing an access procedure of the RAM card, FIG. Fig. 5 is a diagram showing a processing procedure when a RAM card is removed during access to the RAM card, and Fig. 5 is a diagram showing a conventional technique. 101: Battery 102: AC adapter 103: Power supply unit 104: Power supply control unit

──────────────────────────────────────────────────続 き Continued from the front page (72) Saori Yonekura, Inventor, NTT Data Corporation, 1-26-6 Toranomon, Minato-ku, Tokyo (56) References JP-A-58-118078 (JP, A) JP-A-63-298515 (JP, A) JP-A-62-275375 (JP, A) JP-A-62-121653 (JP, U) JP-A-59-35918 (JP, Y2) (58) Survey Field (Int.Cl. ⁶ , DB name) G06F 12/16 G06K 17/00 G06F 1/26

Claims (4)

(57) [Claims] 1. An electronic apparatus for recording and / or reproducing information by supplying power to a detachably connected storage device, wherein the electronic device is provided so as to be openable and closable, and detaches the storage device in a closed state. A lid member which is capable of removing the storage device in the open state while being prohibited, a lid open / close detecting means for detecting an open / closed state of the lid member, and a power supply for supplying power to the storage device A terminal, a first switch unit that is turned off when a detection result of the lid opening / closing detection unit is opened, and a second switch unit that is turned on while recording and / or reproducing information in the storage device. An electronic device, comprising: the first and second switch means are connected in parallel between the power supply and the power supply terminal. 2. The electronic apparatus according to claim 1, further comprising: a first control means for continuing recording and / or reproduction of a predetermined amount of information after the first switch means is turned off. Electronic equipment characterized by having. 3. The electronic device according to claim 2, wherein a plurality of signal terminals for recording and / or reproducing information in and from said storage device, a state where a predetermined signal is output to said signal terminal, and said signal. Buffer means capable of switching between a state in which the terminal is set to a high impedance state; and
And a second control means for setting the buffer means to a high impedance state after a predetermined amount of access by the control means. 4. An electronic apparatus according to claim 1, wherein said second switch means is turned off when information is not recorded and / or reproduced in said storage device. Electronics.