JP2910745B2 - Storage device and data processing method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a storage device in which a storage area is divided into a plurality of blocks. The present invention also relates to a data processing method for writing data to a storage device in which a storage area is divided into a plurality of blocks.

[0002]

2. Description of the Related Art As a storage device used for a data processing device such as a personal computer or a digital still camera, there is a storage device having a flash memory.

[0003] A storage device provided with a flash memory usually divides a storage area into a plurality of blocks, and manages a data area in block units. Here, each block is a unit of data erasure. That is, when erasing data, an initialization process is performed on the entire block including the data. As a result, the data stored in the block is erased collectively, and writing of new data becomes possible.

In such a storage device, each block is composed of a plurality of pages. Then, writing of data to the block and reading of data from the block are performed for each page.

[0005]

Conventionally, when writing data to a storage device in which a storage area is divided into a plurality of blocks, it is necessary to check whether the data has been normally written to the block. All data had to be read and confirmed. That is, conventionally, it was necessary to read all data in a block in order to confirm whether data was normally written in the block, which was extremely inefficient.

The present invention has been proposed in view of the above-described conventional circumstances, and it is possible to confirm whether data has been normally written in a block without reading all data written in the block. It is an object of the present invention to provide a storage device and a data processing method that can be performed efficiently.

[0007]

SUMMARY OF THE INVENTION A storage device according to the present invention is a storage device in which a storage area is divided into a plurality of blocks and data is written to the blocks for each predetermined page unit. When writing data to a block, even if the data is not large enough to fill all pages of the block, at least a part of the data is written to the last page of the block at the end of writing to the block. And / or writing information other than the above data.

In this storage device, for example, when data to be written to a block does not reach the last page of the block, at the end of writing to the block,
Only the above information is written to the last page of the block, and when data to be written to the block reaches the last page of the block, the data is written to the last page of the block at the end of writing to the block. At least a part and the information are written.

Preferably, the information includes an error correction code for detecting and correcting an error in the information. Further, the information preferably includes an error correction code for detecting and correcting an error in data written to the last page.

In the storage device according to the present invention as described above,
At the end of writing data to the block, at least a part of the data and / or information other than the data is written to the last page of the block. Therefore, after the writing of the data to the block is completed, By checking the content written in the last page, it can be determined whether or not the data has been correctly written to the block.

Further, according to the data processing method of the present invention, a storage area is divided into a plurality of blocks, and data is written to a storage device that writes data to a block for each predetermined page unit. Even if the data is not large enough to fill all the pages of the block, at the end of writing to the block, at least a part of the data and / or information other than the data is stored in the last page of the block. Is written.

In this data processing method, for example, when data to be written to a block does not reach the last page of the block, at the end of writing to the block, only the above information is written to the last page of the block. When data to be written to a block reaches the last page of the block, at least a part of the data and the information are written to the last page of the block at the end of writing to the block.

Preferably, the information includes an error correction code for detecting and correcting an error in the information. Further, the information preferably includes an error correction code for detecting and correcting an error in data written to the last page.

In the data processing method according to the present invention described above, at the end of writing data to a block, at least a part of the data and / or
Alternatively, since information other than the above data is written, after the writing of data to the block is completed, by confirming the content written to the last page of the block, the writing of data to the block can be performed normally. It can be determined whether or not this has been done.

[0015]

Embodiments of the present invention will be described below in detail with reference to the drawings.

[0016] 1. Overall Configuration of System FIG. 1 shows the overall configuration of an example of a system to which the present invention is applied. This system includes a data processing device 1 serving as a host-side system, and a memory card 2 serving as a storage device connected to the data processing device 1 via a serial interface.

Here, a system for exchanging data between the data processing device 1 and the memory card 2 by a serial interface will be described as an example, but the present invention relates to a system for exchanging data by a parallel interface. It is also applicable.

The data processing device 1 includes an arithmetic processing device (CP
U) 3, an internal memory 4, an auxiliary storage device 5, and a serial interface circuit 6, which are interconnected by a bus 7. This data processing device 1
For example, the CPU 3 reads a program stored in the auxiliary storage device 5 and executes the program by using the internal memory 4 as a work area.
At this time, data is exchanged with the memory card 2 via the serial interface circuit 6 as necessary.

The data processing device 1 used in the system to which the present invention is applied is not particularly limited as long as it can exchange data with a storage device. The present invention can be applied to various data processing devices such as a personal computer, a digital still camera, and a digital video camera.

The data processing device 1 and the memory card 2
They are connected by a serial interface. Specifically, at least three data lines SCLK and Sta
te, DIO. That is, the data processing device 1 and the memory card 2 are connected to at least the first data line SCLK for transmitting a clock signal during data transmission.
And a second data line State for transmitting a status signal required for data transmission, and a third data line DIO for serially transmitting data to be written to the memory card 2 or data to be read from the memory card 2, Through these, data is exchanged between the data processing device 1 and the memory card 2.

The exchange of data between the data processing device 1 and the memory card 2 is usually performed on a file basis consisting of a header and actual data. In the header of the file, for example, information for accessing the file, information required by a program executed by the data processing device 1, and the like are stored.

2. 2. Configuration of Memory Card As shown in FIG. 2, the memory card 2 includes a controller 11 composed of a so-called control IC and a flash memory 12 managed by the controller 11.

The controller 11 includes a serial / parallel / parallel / serial interface sequencer 13 (hereinafter referred to as an S / P & P / S interface) for performing a serial / parallel conversion or a parallel / serial conversion.
Called sequencer 13. ) And the flash memory 12
And a page buffer 15 for temporarily storing data exchanged between the S / P & P / S interface sequencer 13 and the flash memory interface sequencer 14. An error correction circuit 16 for performing error correction processing, a command generator 17 for generating a control command for controlling access to the flash memory 12, etc., and version information and various attribute information of the memory card 2 are stored. A configuration ROM 18 and an oscillator 19 for supplying a clock signal necessary for the operation of each circuit.

The S / P & P / S interface sequencer 13 has at least the three data lines SC described above.
Data processing device 1 via LK, State, DIO
, And exchanges data with the data processing device 1 via these data lines SCLK, State, and DIO. That is, the S / P & P / S interface sequencer 13 converts the parallel data sent from the page buffer 15 into serial data, and
To the serial interface circuit 6. Also,
S / P & P / S interface sequencer 13
Converts the serial data sent from the serial interface circuit 6 of the data processing device 1 into parallel data and sends it to the page buffer 15.

This S / P & P / S interface
Transmission of serial data between the sequencer 13 and the data processing device 1 is performed by the third data line DIO while synchronizing with the clock signal sent from the data processing device 1 by the first data line SCLK. Will be At this time, the data type of the serial data exchanged by the third data line DIO is determined by the status signal transmitted by the second data line State. Here, the types of serial data include, for example, data to be written to the flash memory 12, data read from the flash memory 12, control data for controlling the operation of the memory card 2, and the like. Note that the status signal is also used to indicate the state of the memory card 2. The state of the memory card 2 indicated by the status signal includes, for example, a state in which the memory card 2 is not accepting data input from the data processing device 1 during some processing, or a state in which the processing on the memory card 2 is completed. Waiting for data input from the data processing apparatus 1.

When the data sent from the data processing device 1 is control data for controlling the operation of the memory card 2, the S / P & P / S interface sequencer 13 transmits the control data The command is sent to the command generator 17.

The command generator 17 is based on control data sent from the data processing device 1 via the S / P & P / S interface sequencer 13.
A control command for controlling access to the flash memory 12 is generated.
Send it to the interface sequencer 14. The flash memory interface sequencer 14 writes data to the flash memory 12 and reads data from the flash memory 12 based on the control command, as described later.

An erroneous erasure prevention switch 20 is connected to the command generator 17. When the erroneous erasure prevention switch 20 is turned on, control data instructing to erase data written in the flash memory 12 is transmitted to the data processing device 1.
Command generator 17
Does not generate a control command for erasing data written in the flash memory 12. In other words, this memory card 2 is
It is possible to switch between a state in which data stored in the flash memory 12 cannot be erased and a state in which data stored in the flash memory 12 can be erased.

The page buffer 15 arranged between the S / P & P / S interface sequencer 13 and the flash memory interface sequencer 14
This is a so-called buffer memory, which temporarily stores data exchanged between the S / P & P / S interface sequencer 13 and the flash memory interface sequencer 14.

That is, data sent from the S / P & P / S interface sequencer 13 to the flash memory interface sequencer 14 first
The data is sent from the S / P & P / S interface sequencer 13 to the page buffer 15 and is temporarily stored by the page buffer 15. At this time, the data stored in the page buffer 15 is transferred to the error correction circuit 16.
To add an error correction code. The data with the error correction code is sent from the page buffer 15 to the flash memory interface sequencer 14 for each predetermined page unit (for example, one page = 512 bytes).

Alternatively, data sent from the flash memory interface sequencer 14 to the S / P & P / S interface sequencer 13 is first sent from the flash memory interface sequencer 14 to the page buffer 15, 15 temporarily stored. At this time, the data stored in the page buffer 15 is transferred to the error correction circuit 16.
Performs an error correction process. The data subjected to the error correction processing is sent from the page buffer 15 to the S / P & P / S interface sequencer 13 for each predetermined page unit.

The flash memory interface sequencer 14 writes data to the flash memory 12 and reads data from the flash memory 12 based on a control command from the command generator 17. That is, the flash memory interface sequencer 14 reads data from the flash memory 12 based on a control command from the command generator 17, and transfers the data to the S / P & P / S via the page buffer 15 as described above.・ Send to the interface sequencer 13. Or,
Flash memory interface sequencer 14
Transmits the data from the S / P & P / S interface sequencer 13 based on the control command from the command generator 17 to the page buffer 1 as described above.
5 and the data is stored in the flash memory 1
Write to 2.

The configuration ROM 18 stores version information of the memory card 2, various attribute information, and the like. The information stored in the configuration ROM 18 is read and used by the command generator 17 via the S / P & P / S interface sequencer 13 as needed. That is, the command generator 17 reads information stored in the configuration ROM 18 as necessary, and performs various settings relating to the memory card 2 based on the information.

The data to be written to the flash memory 12 is sent to the memory card 2 as serial data from the data processor 1 via the three data lines SCLK, State, and DIO described above. First, S / P & P / S interface
The sequencer 13 converts the serial data into parallel data, and converts the parallel data into a page buffer 15.
Send to The page buffer 15 is S / P & P / S.
The data sent from the interface sequencer 13 is temporarily stored. At this time, page buffer 1
The data stored in 5 is subjected to an error correction code by an error correction circuit 16. Then, the data with the error correction code is sent to the flash memory interface sequencer 14 for each predetermined page unit. Then, the flash memory interface sequencer 14 writes the data sent from the page buffer 15 to the flash memory 12 based on a control command from the command generator 17.
By the above processing, the data sent from the data processing device 1 is written to the flash memory 12.

When reading data from the memory card 2 as described above, first, the command generator 17
, Data is read from the flash memory 12 by the flash memory interface sequencer 14. Then, the flash memory interface sequencer 14 sends the data read from the flash memory 12 to the page buffer 15. The page buffer 15 temporarily stores data sent from the flash memory interface sequencer 14. At this time, the data stored in the page buffer 15 is subjected to error correction processing by the error correction circuit 16. The data subjected to the error correction processing is sent to the S / P & P / S interface sequencer 13 for each predetermined page unit. Then, the S / P & P / S interface sequencer 13 converts the data sent from the page buffer 15 into serial data, and then converts the data through the three data lines SCLK, State, and DIO described above. It is sent to the processing device 1. By the above processing, the data read from the flash memory 12 is
The data is sent to the data processing device 1.

When writing or reading data, not only is data exchanged with the flash memory 12 and data read from the flash memory 12 performed, but also control data for controlling the exchange is performed. Is sent from the data processing device 1 to the S / P & P / S interface sequencer 13 of the memory card 2. This control data is sent from the S / P & P / S interface sequencer 13 to the command generator 17. And the command generator 17
Is the S / P & P / S interface sequencer 1
3 to generate a control command for controlling access to the flash memory 12. Then, the control command is sent to the flash memory interface sequencer 14, and the flash memory interface sequencer 14 accesses the flash memory 12 based on the control command to perform data writing and data reading. .

The memory card 2 has not only the three data lines SCLK, State, and DIO described above, but also a voltage supply wiring and a reserve wiring that is not normally used. Is also good. For example, FIG.
In FIG. 3 described later, the three data lines SC described above are used.
In addition to LK, State, and DIO, the memory card 2 is provided with four power supply wirings VSS1, VSS2, VCC, and INT and three reserve wirings RSV1, RSV2, and RSV3.

[0038] 3. Appearance of the memory card Next, a specific profile of the memory card 2 as described above will be described with reference to FIG.

The memory card 2 is a thin card-shaped case 21 made of synthetic resin or the like and having a rectangular planar shape.
The controller 11 and the flash memory 12
Etc. are built-in. And this memory card 2
The memory card 2 is used by being mounted on the data processing apparatus 1 having a mounting mechanism for mounting the memory card 2.

At the front end of the case 21 of the memory card 2, there is formed a notch 22 which is notched obliquely.
Zero concave portions 23 are formed. When the memory card 2 is mounted on the mounting device of the data processing device 1, the data processing device 1
The external connection terminals connected to the connection terminals are arranged. That is, this memory card 2 has ten terminals 24a, 24b, 24c,
24d, 24e, 24f, 24g, 24h, 24i, 2
4j. The breakdown of these external connection terminals is
Three data line terminals 24b, 24d, 24h, four power supply terminals 24a, 24f, 24i, 24j, and 3
These are the reserve terminals 24c, 24e and 24g of the book.

An erroneous erasure prevention member 25 is attached to the upper surface of the case 21 of the memory card 2.
The erroneous erasure prevention member 25 is engaged with the erroneous erasure prevention switch 20 housed inside the case 21, and by sliding the erroneous erasure prevention member 25, the on / off of the erroneous erasure prevention switch 20 is performed. Can be switched.

The memory card 2 has a case 20 to prevent the memory card 2 from dropping out of the data processing device 1 when the memory card 2 is mounted on the mounting device of the data processing device 1.
An arc-shaped first lock notch 26 is formed on one of the side surfaces of the case 20, and a rectangular second lock notch 27 is formed on the other side of the case 20. When the memory card 2 is mounted on the mounting device of the data processing device 1, the locking notches 26 and 27 are engaged with the mounting device of the data processing device 1 so that the memory card 2 does not fall off. Is done.

The memory card 2 shown in FIG. 3 is merely an example of a storage device to which the present invention is applied. That is, the present invention can be applied to a storage device having any shape without depending on the shape of the storage device.

4. Next, the structure of the storage area of the flash memory 12 mounted on the memory card 2 as described above will be described.

The storage area of the flash memory 12 is
As shown in FIG. 4A, the data is divided into a plurality of blocks which are data erasing units. Note that these blocks include a boot block in which boot data, which is data read first by the data processing device 1 when the memory card 2 is started, is stored, and a data block in which arbitrary data is written. is there. Each block has a unique physical address. These blocks are the unit of data erasure,
It is also the minimum unit for file management. That is, a file is stored in one or more blocks, and one block cannot be used in a plurality of files.

Each block is "1" or "0".
, And in the initial state, all bits are set to “1”, and a change in bit units can be made only from “1” to “0”. I have. That is, when writing data consisting of “1” and “0”, the corresponding bit is held as it is for “1”, and the corresponding bit is changed from “1” to “0” for “0”.

When data once written is erased, initialization processing is performed collectively for each block, and all bits of the block are set to "1". As a result, the data written in the block is collectively erased, and the block becomes ready for data writing again. To change from “0” to “1”, it is necessary to perform initialization processing collectively for each block and set all bits of the block to “1”. The change to "0" is possible without performing the initialization process collectively in block units.

It is to be noted that the present invention is not limited to a flash memory in which each bit can take only two states as described above (a so-called binary flash memory).
The present invention is also applicable to a flash memory that can take one or more states (a so-called multi-level flash memory).

As shown in FIG. 4B, each block of the flash memory 12 is composed of a plurality of pages serving as a unit for writing and reading data. That is, when writing data to the flash memory 12, as described above, the page buffer 1
5 is written to the flash memory 12 by the flash memory interface sequencer 14 in page units. When data is read from the flash memory 12, the data is read for each page by the flash memory interface sequencer 14 and sent to the page buffer 15.

Each page has a data area and a redundant area. The data area is an area where arbitrary data is written. The redundant area is an area in which information necessary for managing data written in the data area is stored.

Specifically, as shown in FIG. 4C, so-called distributed management information is stored in the redundant area of the first page of a block as information necessary for managing the block. In addition, the redundant area of each page after the second page of the block is also provided as spare distributed management information.
The same distributed management information stored in the redundant area of the first page is stored. However, in the redundant area of the last page, not so-called distributed management information, but so-called additional management information is stored as additional information that cannot be managed only by the distributed management information.

As described above, in the flash memory 12, the distribution management information is stored in the redundant area in each block. The distribution management information is information for managing a block in which the distribution management information is stored. From the distributed management information, for example, information as to whether or not the block is the first block of the file, or information indicating the connection of the blocks when the file is composed of a plurality of blocks is obtained. be able to. The distribution management information will be described later in detail.

The memory card 2 collects distributed management information of each block to create so-called collective management information as information for managing the entire flash memory, and flashes the collective management information as a file. It is stored in the memory 12.

Then, usually, according to the set management information,
Get the information needed to access each block. That is, the data processing device 1 and the memory card 2
When exchanging data with the data processing device 1
Reads the group management information from the memory card 2, creates a management table in the internal memory 4, and accesses the memory card 2 based on the management table. This allows
It is not necessary to access the distributed management information stored in each block every time data is accessed, so that higher-speed data access is possible.

[0055] 5. Distributed management information will now be described in detail distributed management information.

The distribution management information is information for managing a block in which the distribution management information is stored, and is written in a 16-byte redundant area. Specifically, FIG.
, A 1-byte enable / disable flag, a 1-byte block flag, a 4-bit final flag, a 4-bit reference flag, a 1-byte management flag, a 2-byte logical address, It consists of a byte concatenated address, a 3-byte reserved area, a 2-byte error management code for distributed management information, and a 3-byte data error correction code.

The enable / disable flag is a flag indicating whether the block is in a usable state or an unusable state, and specifically, indicates two states of "usable" and "unusable".
"Available" indicates that the block is usable,
"Unusable" indicates that the block is unusable. For example, when an unrecoverable error occurs in a block, the enable / disable flag is set to “unavailable”, and the block is disabled.

The block flag is a flag indicating the state of the block, and is specifically "unused", "head used".
The four states of “used” and “not erased” are shown. "unused"
Indicates that the block is unused or has been erased, is in an initial state (a state in which all bits are “1”), and in which data can be written immediately. “Top use” indicates a state in which the block is used at the beginning of the file. In the boot block in which the boot data is stored, the block flag is set to “used at the beginning”. “Use” indicates a state in which the block is used at a position other than the beginning of the file. When the block flag is "use",
This block is connected from another block. “Unerased” indicates a state in which data written in the block has become invalid. For example, when erasing data, first set the block flag to "not erased".
When there is enough processing time, a block whose block flag is set to “unerased” is erased. Thus, the erasing process can be performed more efficiently.

The last flag is a flag indicating whether or not the file has ended, and specifically indicates two states of “block continuation” and “block end”. “Block continuation” indicates that there is a connection to the next block. That is, "block continuation" indicates that the file stored in the block still continues, and the file continues in another block. "Block end"
Indicates the last block. That is, “block end” indicates that the file stored in the block ends with this block.

The reference flag is a flag for designating the reference of the additional management information, and specifically shows two states of “no reference information” and “with reference information”. "No reference information" indicates that there is no valid additional management information in the redundant area of the last page of the block. “With reference information” indicates that valid additional management information exists in the redundant area on the last page of the block.

The management flag is a flag indicating the attribute of the block and the like. For example, the management flag indicates whether the block is a read-only block or a writable block. Further, for example, the management flag indicates whether the block is a boot block or a data block.

The logical address literally indicates the logical address of the block. The value of the logical address is updated as necessary, for example, when rewriting data.
The value of the logical address is set so that a plurality of blocks do not have the same logical address value at the same time as long as the processing is performed normally.

By the way, in the case of a flash memory, in order to rewrite data in the same block, it is necessary to first erase the block as described above. However, the guaranteed number of erasable operations has an upper limit, and it is required that the number of block erase operations be as small as possible. Therefore, when updating data in a block, new data is written in another block instead of using the same block to rewrite new data. At this time, the block flag of the block in which the data is stored first is set to “not erased” so as to indicate that the data stored in the block has become invalid. In the memory card 2, even if the data is updated in this manner, the physical address set in advance for each block is such that the address indicating the block in which the data is stored is the same. Separately, a dynamically changeable logical address is assigned to each block so that the logical address represents a block in which data is stored.

The link address indicates a logical address of a block linked to the block. In other words, if the file stored in the block has a continuation, and the file continues to another block, the link address indicates
The value of the logical address of the next block in which the continuation of the file is stored is set.

The error correction code for distribution management information is an error correction code for data written in the management flag, the logical address, the link address, and the reserved area in the distribution management information.

Note that an enable / disable flag, a block flag,
The final flag and the reference flag are not targeted for error correction or error detection by the error correction code for distributed management information. Therefore, the enable / disable flag, block flag,
The last flag and the reference flag can be rewritten without updating the error correction code for distribution management information.

The data error correction code is an error correction code for data written in the data area of the page in which the data error correction code is stored.

The error correction code for distributed management information and the error correction code for data are used by the error correction circuit 16 disposed inside the memory card 2. Therefore, error correction using these error correction codes is
Without depending on the data processing device 1, the memory card 2
Can be used.

[0069] 6. Additional management information will be described in detail for additional management information.

The additional management information is information stored in the 16-byte redundant area of the last page of the block, and includes additional information that cannot be managed only by the distributed management information.

Specifically, as shown in FIG. 6, the additional management information includes a 1-byte enable / disable flag, a 1-byte block flag, a 4-bit final flag, a 4-bit reference flag, It consists of a 1-byte identification number, a 2-byte effective data size, a 5-byte reserved area, a 2-byte error correction code for additional management information, and a 3-byte data error correction code.

Here, the enable / disable flag, block flag, last flag, reference flag, reserved area, and data error correction code are the same as in the case of the distributed management information. Further, the error correction code for additional management information is equivalent to the error correction code for distributed management information in the distributed management information. Among the additional management information, the identification number, the effective data size, and the data written in the reserved area are targeted. This is the error correction code.

The identification number and the effective data size are included in the additional management information as additional information that cannot be managed only by the distributed management information.

The identification number is information for error processing.
Each time the data of the block is rewritten, the value of this identification number is incremented. This identification number is used to identify the old and new of the data written in those blocks when some error occurs and a plurality of blocks having the same logical address exist. A 1-byte area is used for the identification number, and its value ranges from "0" to "255".
Its initial value is "0". Note that the identification number is "25
When it exceeds "5", it is returned to "0". When there are a plurality of data blocks having the same logical address, the data block having the smaller value of the identification number is valid. However, in the case of a boot block, if there is a spare boot block, the identification numbers of those boot blocks have the same value in a normal state. If the identification numbers are different due to some abnormality, the boot block with the larger value of the identification number is validated.

The valid data size indicates the size of valid data in the block. That is, when there is a free space in the data area of the block, a value indicating the size of the data written in the data area is set in the effective data size. At this time, the reference flag of the distributed management information is set to “with reference information”. If there is no free space in the data area of the block, “0xffff” is set in the effective data size as a value indicating that there is no free space in the data area.

Note that the above-described distributed management information and additional management information are updated so that they are always the latest information every time data in a block is updated.

[0077] 7. Set management information Next, set management information will be described in detail.

As described above, the collective management information is information created by collecting distributed management information of each block, and is stored in the flash memory 12 as a file. That is, as shown in FIG. 7, a file of set management information, which is information for managing all blocks collectively, is created from the distributed management information of each block, and this set management information is stored in the data area of a predetermined block. Is stored.
The set management information may be stored in one block or may be stored over a plurality of blocks. Then, the data processing device 1 normally obtains information necessary for accessing each block by using the set management information.

That is, when the effective collective management information is stored in the memory card 2 as a file, the data processing device 1 reads out the collective control information file and develops it on the internal memory 4 to manage the memory card 2. Create a management table for Note that the physical address of the block in which the head of the file of the set management information is stored is included in the boot data, and the data processing device 1
Accesses the set management information file based on the physical address.

[0080] 8. Writing data to a block next, in the above-described system will be described the processing for writing data into the memory card 2.

In the above system, the data processing device 1
Sent to the memory card 2 from the flash memory 12 is written to a block constituting a storage area of the flash memory 12. Specifically, the memory card 2 writes data in each block in page units. Here, when data is written to pages other than the last page of the block, the distributed management information is written to the redundant portion of those pages.

Then, the memory card 2 to which the present invention is applied
Then, when writing data to a block, writing to the last page of the block is always performed last.
At this time, when data is written to the data area of the last page, the additional management information is written to the redundant portion of the last page at the same time as the data is written to the last page. If data is not written to the data area of the last page, after the data writing to the block is completed, only the additional management information is written to the redundant portion of the last page. That is, in the memory card 2 to which the present invention is applied, when writing data to a block, the additional management information is always written to the redundant portion of the last page.

The distributed management information and the additional management information include
As described above, an error correction code is added. This makes it possible to detect a write failure of the distributed management information or the additional management information.

Even if an empty page exists in the block to which the additional management information has been written as described above, no additional data is written to the empty page. In other words, when writing new data to the block in which the additional management information has been written, the block is erased before it is performed.

9. Confirmation of Data Written to Block Next, a process of writing data to the block as described above and then confirming whether the data has been completely written will be described in detail with reference to the flowchart of FIG. I do.

To check whether data has been completely written to a block, first, as shown in FIG. 8, in step S1, the distribution management information of the block to be checked is read.

Next, in step S2, step S
Based on the distributed management information read in step 1, it is checked whether the block to be checked is in a usable state. Specifically, it refers to the enable / disable flag of the distributed management information and confirms whether or not it is "unusable".

If the block to be checked is unusable, the process proceeds to step S3, in which the block is not used for holding data in the future. At this time, of course, data writing to the block is not performed normally,
This ends the processing.

On the other hand, if the block to be checked is available, the flow advances to step S4 to read additional management information of the block, and then to step S5
Then, it is checked whether the additional management information read in step S4 has an error. Note that the error check here is performed using an error correction code for additional management information. That is, using the error correction code for additional management information, it is checked whether the read additional management information has an error.

If there is an error in the additional management information, the process proceeds to step S6, where it is determined that the writing is incomplete, and the process is terminated. That is, as a result of error correction using the error correction code for the additional management information, if it is determined that the additional management information written in the redundant area is abnormal, a failure occurs during the writing of the additional management information. It is determined that the data writing was incomplete.

On the other hand, if there is no error in the additional management information, the flow advances to step S7 to determine whether data has been written in the data area of the last page including the additional management information.

If data has been written in the data area of the last page, the process proceeds to step S8,
The data written in the data area of the last page is read, and then in step S9, step S8
Check the data read in for errors. In addition,
The error check here is performed using a data error correction code. That is, using the data error correction code, it is checked whether there is an error in the read data.

When there is an error in the data,
Proceeding to step S6, it is determined that the writing was incomplete, and the process ends. That is, as a result of error correction using the data error correction code, if it is determined that the data written in the data area is abnormal, it is considered that a failure has occurred during the writing of the data, and Is determined to be incomplete.

On the other hand, if there is no error in the data, the process proceeds to step S10. At this time, since both the additional management information written in the redundant area and the data written in the data area have been normally written to the block, the data has been completely written to the block. Is determined, and the process ends.

If it is determined in step S7 that there is no data in the data area, step S1 is executed.
Go to 0. At this time, no data is written in the data area, but since additional management information is normally written in the redundant area, it is determined that data has been completely written to the block. Ends the processing.

With the above processing, it is determined whether the writing to the block has been completed normally or the writing has been interrupted in the middle of the block due to a failure during the writing for the memory card 2 having the redundant area for each page. It is possible to do. Moreover, in the above processing, it is possible to confirm whether or not the writing to each block is correct without reading all the data written in the block. Therefore, whether the writing to each block is correct or not can be confirmed very efficiently.

[0097]

As described above in detail, according to the present invention, the correctness of data writing to a block can be obtained by reading data written to the last page without reading all data written to the block. Can be confirmed. Therefore, according to the present invention, it is possible to very efficiently check whether data is written to each block.

[Brief description of the drawings]

FIG. 1 is a diagram showing an overall configuration of a system to which the present invention is applied.

FIG. 2 is a block diagram showing a configuration of a memory card to which the present invention is applied.

FIG. 3 is a perspective view showing the appearance of a memory card to which the present invention is applied.

FIG. 4 is a diagram showing a structure of a storage area of a memory card to which the present invention is applied.

FIG. 5 is a diagram illustrating a configuration of distributed management information.

FIG. 6 is a diagram showing a configuration of additional management information.

FIG. 7 is a diagram showing a state in which set management information is constructed from distributed management information of each block.

FIG. 8 is a flowchart of a process for confirming whether or not data has been completely written to a block.

[Explanation of symbols]

1 data processing device, 2 memory card, 3 arithmetic processing device, 4 internal memory, 5 auxiliary storage device,
6 serial interface circuit, 7 bus, 1
1 controller, 12 flash memory, 13
Serial / Parallel / Parallel / Serial Interface Sequencer, 14 Flash Memory Interface Sequencer, 15 Page Buffer, 16 Error Correction Circuit, 17 Command Generator, 18 Configuration ROM, 19
Oscillator, 20 Erroneous erase prevention switch

──────────────────────────────────────────────────続 き Continued on the front page (58) Fields surveyed (Int. Cl. ⁶ , DB name) G06F 3/06 305 G06F 3/08 G06F 12/00 540 G06F 12/16 320 G11C 17/00

Claims (10)

(57) [Claims] 1. A storage device in which a storage area is divided into a plurality of blocks, and data is written to a block for each predetermined page unit. Even if the size is not large enough to fill all the pages of the block, at least a part of the data and / or information other than the data is written to the last page of the block at the end of writing to the block. Storage device. 2. When data to be written to a block does not reach the last page of the block, at the end of writing to the block, only the information is written to the last page of the block. 2. The storage device according to claim 1, wherein when reaching the last page of the block, at least a part of the data and the information are written to the last page of the block at the end of writing to the block. 3. The storage device according to claim 1, wherein the information includes an error correction code for detecting and correcting an error in the information. 4. The storage device according to claim 1, wherein the information includes an error correction code for detecting and correcting an error in data written to the last page. 5. After the writing of data to the block is completed, at least a part of the data written on the last page of the block and / or the information is read and the contents thereof are confirmed, so that the data is written to the block. 2. The storage device according to claim 1, wherein it is determined whether or not writing has been performed normally. 6. A storage area is divided into a plurality of blocks, and when writing data to a storage device that writes data to a block for each predetermined page unit, the data is stored in all pages of the block. Even if it is not large enough to satisfy, at the end of writing to the block,
A data processing method comprising writing at least a part of the data and / or information other than the data on the last page of the block. 7. When data to be written to a block does not reach the last page of the block, at the end of writing to the block, only the information is written to the last page of the block. 7. The data processing method according to claim 6, wherein when reaching the last page of the block, at least a part of the data and the information are written to the last page of the block at the end of writing to the block. 8. The data processing method according to claim 6, wherein the information includes an error correction code for detecting and correcting an error in the information. 9. The data processing method according to claim 6, wherein the information includes an error correction code for detecting and correcting an error in data written to the last page. 10. After the writing of data to the block is completed, at least a portion of the data written on the last page of the block and / or the information is read to confirm the contents thereof, so that the data is written to the block. 7. The data processing method according to claim 6, wherein it is determined whether or not the writing has been performed normally.