JP2906878B2 - High-definition video signal processor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-definition video signal processing apparatus for restoring a high-definition television signal band-compressed by offset subsampling.

[0002]

2. Description of the Related Art High-definition television signals have a bandwidth of 20 MHz.
z or more, and when transmitting using a satellite or the like, it is necessary to perform band compression by some method. An effective technique for significantly compressing the bandwidth of high-definition television signals is MUSE (Multiple Sub-Nyquist sampling Encoding), which compresses the signal bandwidth by multiple sub-Nyquist sampling.
(Ninomiya et al., "One-Channel Satellite Transmission System for High-Definition Television (MUSE)," Television Society Technical Report TEBS95-2, pp. 37-42).

In the MUSE system, offset sub-sampling is performed between fields and between frames for a still region of an image, a process is performed in which the sampling phase makes a round in four fields, and offset is performed between lines for a moving region. Images are transmitted by performing subsampling. Furthermore, for a motion at a constant speed, such as when the camera is panning, if the processing as a moving area causes blurring of the image, the encoder detects the motion vector of the image and performs decoding. When the signal of the previous frame is used at the time of interpolation, a motion vector correction such as interpolation between frames is performed even if an image is moving, using a signal subjected to position correction by the magnitude of the motion vector.

Further, the MUSE system is not compatible with the NTSC system which is a current standard television signal, and is an expensive dedicated signal processing circuit (MUSE) for restoring a signal transmitted by the MUSE system to an original image. Decoder). Therefore, in order to easily receive a high-definition television signal with the current television receiver, the MUSE signal is demodulated only by processing corresponding to the moving image processing of the MUSE decoder, and the current N
Video signal converter (MUSE-N) for converting to TSC signal
TSC converters have been developed (for example, “MUS
E / NTSC converter "Electronic technology 1989-4).

[0005] In these devices, to simplify the configuration, even for signals transmitted as still images, interpolation processing is performed only with signals in the same field.
In a still image portion, image quality degradation called aliasing caused by offset subsampling between fields or between frames has occurred.

On the other hand, a high-definition video signal processing apparatus has been proposed in which a MUSE-NTSC converter performs processing between frames and between fields to remove aliasing distortion and improve image quality (for example, "MUSE"). −
Development of NTSC Converter "1991 Annual Conference of the Institute of Television Engineers of Japan, ITEC '91 14-9).

FIG. 5 is a block diagram of a conventional high-definition video signal processing apparatus. In FIG. 5, 101 is M
An input terminal for inputting a USE signal, an interpolation process 102 inserts a sampling point of a signal delayed by one frame period into a non-sampling point thinned out by inter-frame offset subsampling with respect to the band-compressed MUSE signal. Interpolating circuit for performing the following, 103 and 104 are field memories,
105 is a line memory, 106 is a field interpolation circuit for interpolating non-sample points from sample points in the same field, 1
07 is a motion detection circuit, 108 and 109 are adders, 110
Denotes a mixer, 111 denotes a scanning line conversion circuit for converting the number of scanning lines of a high-definition television signal into a current standard television signal, and 112 denotes an output terminal for outputting a current standard television signal.

The operation of the conventional high-definition video signal processing apparatus configured as described above will be described below. First, the MUSE signal input to the input terminal 101 is processed by the frame interpolating circuit 102 to determine whether the current signal A sample point of the signal delayed by one frame period is inserted into the sample point. The state of frame interpolation will be described with reference to FIG.

In FIG. 6, thick circles ○ indicate pixels at sample points in each signal. Since the input MUSE signal, that is, the signal supplied to the terminal B of the inter-frame interpolation processing circuit 102, as shown in FIG. 6B, every other pixel is thinned by inter-frame offset sub-sampling. The position indicated by the triangle △ is a non-sample point.

On the other hand, the signal supplied to the terminal A is a signal interpolated one frame before the frame period delayed by the field memories 103 and 104 and the line memory 105. They are arranged. When the signal supplied to the terminal B is a non-sample point, the frame interpolation processing circuit 102 selects the signal supplied to the terminal A and outputs the signal from the terminal C. Therefore, a signal obtained by performing an interpolation process on the current signal and the signal delayed by one frame period is obtained from the terminal C as shown in FIG.

The interpolated signal is added to an adder 10.
In steps 8 and 109, an averaging process is performed between the fields, and a flicker component between the fields due to the offset subsampling between the fields is removed. FIG. 7 shows the state of the averaging process between fields. Assuming that the scanning line position of the output signal of the terminal C in FIG. 5 is the scanning line position C (n line) in FIG. 7, the scanning line positions of the points D and E in FIG. 5 are D (n-562) in FIG. Line) and E (n-563 line). Therefore, adder 1
In steps 08 and 109, an averaging process is performed on the signals at the scanning line positions C, D, and E.

In the MUSE signal input to the input terminal 101, non-sample points are interpolated by pixels in the same field by a field interpolation circuit 106. Mixer 11
In the case of 0, the signal of the still image processing system subjected to frame interpolation and field averaging and the signal of the moving image processing system interpolated in the field are adaptively mixed according to the amount of motion detected by the motion detection circuit 107. You. In the scanning line conversion circuit 111, a high-definition television signal having 1125 scanning lines output from the mixer 110 is converted into a current standard television signal having 525 scanning lines and output from the output terminal 112.

[0013]

However, the frame interpolating circuit for a still region having the above-described configuration assumes that sub-sample phase information is alternated for each frame when motion vector correction is not performed. When the sub-sample phase is not alternated for each frame due to the motion vector correction under the control of the MUSE encoder, simply interpolating using the signal of the previous frame causes a double image due to the phase shift. However, there is a problem that image quality degradation occurs.

In view of the above, the present invention detects the alternation state of each frame of the subsample phase information even when a memory that does not perform motion vector correction is used in the interframe interpolation circuit. An object of the present invention is to prevent image quality deterioration by switching to an output signal of a field interpolation circuit.

[0015]

In order to achieve the above object, the present invention receives a MUSE signal which has been band-compressed by offset sub-sampling, and uses a frame memory without a motion vector correction function at least from a sample point between frames. Still image interpolation means for interpolating non-sample points, moving image interpolation means for interpolating non-sample points from sample points in the field, and detecting the motion of the image of the input signal using inter-frame correlation A motion detection circuit, a mixer for mixing the output of the still image interpolation means and the output of the video interpolation means according to the detected motion, and control signal detection means for detecting a control signal included in the MUSE signal. Inputting sub-sample phase information in the control signal detected by the control detection means, and exchanging the sub-sampling phase information for each frame. Frame alternation detecting means for detecting a state, and means for switching the output of the still image interpolation means to the output of the moving image interpolation means irrespective of the motion information from the motion detection circuit based on the alternation information detected by the frame alternation detection means It is a configuration provided with.

[0016]

According to the present invention, there is provided a still image interpolation means for interpolating a non-sample point from a sample point between frames using a frame memory having no motion vector correction function in order to simplify the circuit structure. Then, when a MUSE signal whose motion vector is corrected and the sub-sampling phase information is irregular is input, the alternation state of the sub-sampling phase information for each frame is detected. By switching the output of the still image interpolation means to the output of the moving image interpolation means irrespective of the motion information, it is possible to prevent the image quality of the displayed image from being deteriorated due to an incorrect interpolation signal.

[0017]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a high-definition video signal processing apparatus according to an embodiment of the present invention.

In FIG. 1, reference numeral 11 denotes an input terminal for inputting a MUSE signal; 12, a still image interpolation circuit for performing frame interpolation using a signal delayed by one frame period; A video interpolation circuit for interpolating the sample points, a motion detection circuit for detecting whether the image is a still image or a video,
15 is a sub-sampling phase control circuit for controlling the phase of the pixel to be interpolated, 16 is a mixer for mixing the output of the still image interpolation circuit 12 and the output of the video interpolation circuit 13, and 17 is the MU
An output terminal for extracting a high-definition video signal obtained by restoring the SE signal, 18 is a control signal detecting circuit for detecting a control signal included in the MUSE signal, 19 is a circuit for inputting sub-sample phase information in the control signal, A frame alternation detecting circuit 20 for detecting an alternation state of each frame of information, and a forced moving image setting circuit 20 forcibly setting the motion information from the motion detecting circuit 14 to a moving image.

Reference numeral 21 denotes an inter-frame interpolation circuit for inserting a sampling point of a signal delayed by one frame period into a non-sampling point decimated by inter-frame offset sub-sampling according to a sub-sampling phase to perform interpolation processing. , 22,
23 is a field memory.

FIG. 2 is a block diagram showing a configuration of the frame alternation detecting circuit 19 in FIG. 31 and 32 are one-field delay circuits, and 33 is an EX-NOR circuit.

The operation of the high-definition video signal processing apparatus according to this embodiment having the above-described configuration will be described with reference to FIGS.

The MUSE signal (B in FIG. 6) input to the input terminal 11 is input to the still image interpolation circuit 12 based on the sub-sampling phase information detected by the control signal detection circuit 18 as in the conventional example. In response to the signal for controlling the phase of the pixel to be interpolated obtained by the sub-sampling phase control circuit 15, the field memory 22,
The pixel (A in FIG. 6) of the signal one frame period before, which is delayed by 23, is inserted in the inter-frame interpolation circuit 21 and the sample point of the previous frame is interpolated to the non-sample point of the current signal (FIG. 6). C).

On the other hand, the MUSE input to the input terminal 11
The signal is subjected to interpolation of non-sampled pixels from sampled pixels in the field in a moving image interpolation circuit 13 for performing field interpolation.

The motion detection circuit 14 detects the motion of the image based on the signals before and after the field memory, and outputs the still image processing signal output from the still image interpolation circuit 12 and the video signal output from the moving image interpolation circuit 12. The moving image processing signal that has only been processed in the field is mixed by the mixer 16 in accordance with the detected amount of motion, and the restored high-quality image is not degraded even in a moving image without generation of a double image or the like. A video signal is obtained at output terminal 17.

However, the motion vector correction is performed on the encoder side, and the sub-sampling phase information (YS
S) becomes irregular and the MUS input to the input terminal 11
When the sub-sampling phase of the E signal is shifted by 180 ° (BB in FIG. 4), if the frame memory composed of the field memories 22 and 23 is an inexpensive one that does not perform motion vector correction, the signal just before the previous frame is simply output. (AA in FIG. 4) are inserted in the inter-frame interpolation circuit 21, so that the sample point at the same position one frame before the current signal is interpolated to the sample point of the current signal (CC in FIG. 4). Since the pixels do not have a "nested" relationship with each other for each frame, if this is repeated, the pixels at the sample points of the output signal will always be the same, and image quality degradation such as a double image will occur.

Therefore, the sub-sampling phase information (YS) of the luminance signal detected by the control signal detecting circuit 18
In S), the alternation state of each frame is detected by the frame alternation detection circuit 19 shown in FIG. 2 from the polarity before and after one frame, and the alternation state of the sub-sampling phase information is detected as shown in FIG. When no frame alternation is performed, the motion information from the motion detection circuit 14 is forcibly converted into a moving image by the forced moving image setting circuit 20, so that the still image interpolation in which the erroneous interpolation is performed from the mixer 16 is performed. Control is performed so that the output of the moving image interpolation circuit 13 is selected instead of the output of the circuit 12.

As described above, according to this embodiment, when the motion vector correction is performed on the encoder side and the sub-sampling phase information (YSS) of the luminance signal becomes irregular, the frame of the sub-sampling phase information (YSS) Detecting alternation between the frames and, when the alternation is not performed, regardless of the motion information from the motion detection circuit, outputting a signal interpolated in the field for the moving image, thereby preventing a malfunction of the interpolation process. Can be.

In this embodiment, the malfunction of the interpolation processing due to the motion vector correction on the encoder side is prevented by detecting the alternating state of the sub-sample phase information for each frame. Since the motion vectors (horizontal and vertical) included therein are standing, a forced moving image setting may be performed when any of the motion vectors is standing, so that a malfunction of the interpolation processing may be prevented.

However, in a device having a simple circuit configuration such as a MUSE-NTSC converter, the sub-sampling phase information of the luminance signal can be extracted with a simple configuration as a control signal that has not been subjected to error correction or the like. If the control is performed by detecting the alternating state of each frame of the sub-sample phase information as in the present embodiment, it is possible to prevent the malfunction of the interpolation processing by the motion vector correction with a simpler configuration.

In this embodiment, the alternation state of the sub-sample phase information for each frame is detected, and when the alternation is not made between the frames, the motion information from the motion detection circuit is forcibly set in the moving image. Although the signal from the video interpolation circuit is output, a configuration may be adopted in which a separate switch is provided to output the signal from the video interpolation circuit.

Further, the still picture interpolation circuit is configured to perform only inter-frame interpolation. However, a circuit for performing an operation between fields as in the conventional example may be added. Similarly to the above, a configuration may be adopted in which a scanning line conversion circuit is provided to convert the signal into a current standard television signal.

[0032]

As described above, according to the present invention, in a high-definition video signal processing apparatus having a frame interpolation function using a memory without motion vector correction, an alternating state of each frame of a sub-sampling phase is detected. To provide a circuit to
By not interpolating between frames when no alternation is performed, a malfunction of the interpolation process can be prevented with a simple configuration, and the practical effect is large.

[Brief description of the drawings]

FIG. 1 is a block diagram of a high-definition video signal processing apparatus according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a frame alternation detection circuit for sub-sample phase information according to the embodiment;

FIG. 3 is a timing chart for explaining the operation of the frame alternation detection circuit according to the embodiment;

FIG. 4 is a pixel configuration diagram for explaining the embodiment.

FIG. 5 is a block diagram of a conventional high-definition video signal processing device.

FIG. 6 is a configuration diagram of the pixel.

FIG. 7 is a layout diagram of the scanning lines.

[Explanation of symbols]

 11 MUSE signal input terminal 12 Still image interpolation circuit 13 Video interpolation circuit (field interpolation circuit) 14 Motion detection circuit 15 Sub-sampling phase control circuit 16 Mixer 17 High quality video signal output terminal 18 Control signal Detection circuit 19 Inter-frame alternation detection circuit 20 Forced video setting circuit 21 Inter-frame interpolation circuit 22, 23 Field memory

────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor: Yoichiro Miki 1006 Kazuma, Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (58) Field surveyed (Int. Cl. ⁶ , DB name) H04N 7/015

Claims (3)

(57) [Claims] 1. A still image interpolation means for inputting a MUSE signal band-compressed by offset subsampling and interpolating at least non-sample points from sample points between frames using a frame memory, and a sample in a field. Moving image interpolation means for interpolating non-sample points from points, a motion detection circuit for detecting the motion of the image of the input signal using inter-frame correlation,
A mixer for mixing the output of the still image interpolation means and the output of the moving image interpolation means in accordance with the detected movement;
Control signal detection means for detecting a control signal included in the USE signal; and sub-sample phase information in the control signal detected by the control detection means, and detecting an alternating state of the sub-sampling phase information for each frame. Frame alternation detecting means,
Means for switching the output of the still image interpolation means to the output of the video interpolation means irrespective of the motion information from the motion detection circuit based on the alternation information detected by the frame alternation detection means. High-definition video signal processing device. 2. The high-definition video signal processing apparatus according to claim 1, wherein the frame alternation detecting means detects whether the polarity of one frame before or after one frame is the same or different in the sub-sampling phase information of the luminance signal. 3. The frame memory according to claim 1, wherein said frame memory is a simple delay means having no motion vector correction function.
The high-definition video signal processing apparatus according to the above.