JP2903357B2 - Input protection circuit and IC - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an input protection circuit and an IC, and more particularly, to an input protection circuit built in an IC as a part of the IC and an IC having the same.

[0002]

2. Description of the Related Art FIG. 5 shows an example of a pattern of an IC having a single metal wiring layer such as aluminum. This type of IC is frequently used in ASICs and the like because it has a small number of processes, a short delivery time, and is inexpensive. Power supply line VDD and ground line GND through which large current flows
Consists of a pattern of a metal wiring layer having a small resistance. Note that the power supply line VDD is indicated by upward-sloping hatching, and the ground line GND is indicated by downward-sloping hatching (the same applies to other drawings). Since there is only one metal wiring layer, there is a restriction in the layout that these power supply line VDD and ground line GND cannot cross. Further, it is necessary to provide a protection circuit 100 described later in close contact with the pad 20 receiving the input signal A from the outside, the power supply line VDD and the ground line GND.

For this reason, in this type of IC, a power supply line VDD connected to a pad 30 for receiving a power supply voltage from the outside is usually arranged on the outermost peripheral side of the IC, and the pad 20 and the like are arranged inside the IC. The ground line GND connected to the pad 40 that is grounded by the above is arranged inside the pad 20 and the like, and further inside this, an internal circuit such as the transistor Tr1 is arranged. That is, the pad 20 receiving the input signal A from the outside is disposed between the power supply line VDD and the ground line GND, and the transistor Tr1 receiving the input signal A after passing through the pad 20 is connected to the pad via the ground line GND. 20 is located on the opposite side.

FIG. 5 shows a protection circuit 1 for a transistor Tr1.
A circuit diagram for 00 is shown. This is a protection diode D for clamping a positive surge voltage to the power supply line VDD.
1, a protection diode D2 for clamping a negative surge voltage to the ground line GND, and a resistor R1 as an input protection resistor of the transistor Tr1. In order to sufficiently exhibit the function, the protection diode D1 is provided in the pattern of the power supply line VDD, and the protection diode D2 is provided in the pattern of the ground line GND.

[0005] Because of the above-mentioned restriction that the pattern of the metal wiring layer cannot be crossed, the diode D1, the pad 20, and the diode D2 are connected by a nonmetallic wiring pattern such as polysilicon. Since the connection between the pad 20 and the transistor Tr1 is also made of the same polysilicon or the like, the wiring pattern between the pad 20 and the diode D2 is changed from the diode D2 to the transistor T1.
It takes a form extended to r1 and is provided in the area 50 of the internal circuit. With such an input protection circuit, the transistor Tr1 is protected from an abnormal input such as a surge voltage externally applied to the pad 20.

[0006]

In such a conventional input protection circuit, an internal circuit is protected from abnormal input by two protection diodes provided in parallel with the input line and an input protection resistor provided in series. doing. An IC whose internal circuit is protected by the input protection circuit seems to be perfect as long as an abnormal input of less than the current capacity of the protection diode is received. However, in practice, even if the abnormal input has a value much smaller than its capacity, the internal circuit is often not protected. An IC actually used is often destroyed by an abnormal input having a very small amount of current, for example, electrostatic discharge.

However, it is known that the resistance value of the input protection resistor can be increased in order to increase the resistance against electrostatic breakdown and the like. However, since the input protection resistor is provided in series with the signal line, if the value is increased, the operation speed of the internal circuit is reduced accordingly. Therefore, the resistance value of the input protection resistor cannot be increased unnecessarily, and the internal circuit cannot be sufficiently protected from abnormal input. This is inconvenient.

The wiring pattern including the input protection resistor is provided in the area of the internal circuit, and the wiring pattern is a relatively elongated pattern in order to have a predetermined resistance value. For this reason, there is an inconvenience that the degree of freedom in layout in the region of the internal circuit is limited. SUMMARY OF THE INVENTION An object of the present invention is to solve such a problem of the prior art, and it is possible to sufficiently protect an internal circuit of an IC from abnormal input, and to reduce a layout restriction on the internal circuit. And an IC having the same.

[0009]

FIG. 3 shows an input protection circuit 1 according to the present invention.
FIG. 4 shows an enlarged schematic diagram of a pattern layout including 00. The power supply line VDD is indicated by hatching rising to the right, and the ground line GND is indicated by hatching falling to the right. A detailed examination of the input protection circuit revealed that, when a large voltage was applied momentarily such as discharge, the existence of the parasitic circuit 21a in the wiring pattern 21 between the pad 20 and the diode D1 could not be ignored. The parasitic circuit 21a
Equivalently, it is recognized as a circuit composed of a resistor and a capacitor, and acts as a delay circuit for an abnormal input. Similarly,
Wiring pattern 22 between pad 20 and diode D2
Also acts as a delay circuit for the abnormal input.

FIG. 4 shows an input protection circuit 1 taking these factors into consideration.
00 shows an equivalent circuit. According to this, when there is a positive abnormal input from the outside to the pad 20, the diode D
1 should clamp the voltage at the pad 20 to the voltage of the power supply line VDD, but the voltage at the pad 20 may be higher than the voltage at the anode of the diode D1 due to the presence of the parasitic circuit 21a. And
This high voltage is applied to the input line of the transistor Tr1 depending on the difference in characteristics between the parasitic circuit 21a and the parasitic circuit 22a, and the voltage cannot be reduced only by the input protection resistor R1.

For this reason, even if the abnormal input has a current value much smaller than the capacity of the protection diode, the internal circuit of the IC may be destroyed. When the external abnormal input to the pad 20 is a negative voltage, the parasitic circuit 2
Since 2a acts to enhance the protection function of the input protection resistor R1, the internal circuit of the IC is protected in this case. The present invention has been made with consideration given to the pattern layout in addition to considerations based on such a survey.

In order to achieve this object, the configuration of the input protection circuit according to the present invention comprises a single metal wiring layer, and a first line such as a power supply line and a second line such as a ground line are connected to the metal wiring layer. A pad formed of a pattern and receiving an external input signal is disposed between the first line and the second line, and an internal circuit receiving the input signal after passing through the pad is the second line. An input protection circuit provided in an IC disposed on the opposite side of the pad with the input line interposed therebetween to protect the internal circuit from an abnormal input such as a surge voltage externally applied to the pad; A cathode (or an anode) is directly connected to the first line, and an anode (or a cathode) is provided in the pattern or provided in contact with the first line; A first protection diode connected to the pad by a non-metallic first wiring pattern such as a recon, and a first protection diode disposed in the second line pattern or provided in contact with the second line; The anode (or cathode) is directly connected to the second line, and the cathode (or anode) is made of a non-metallic second material such as polysilicon.
A second protection diode connected to the pad with the wiring pattern of (a) and a second protection diode disposed in the second line pattern or provided in contact with the second line; A third protection diode directly connected to the second line and having a cathode (or anode) connected to the anode (or cathode) of the first diode by a third wiring pattern made of non-metal such as polysilicon; A fourth wiring pattern for connecting a cathode (or an anode) of the third protection diode to the internal circuit, wherein the internal circuit includes the pad, the first wiring pattern, and the third wiring pattern. And the third wiring pattern receives a predetermined resistance as an input protection resistance of the internal circuit. And it has a. According to another embodiment of the present invention, there is provided an IC having the above-described input protection circuit.

[0013]

In the input protection circuit and IC of the present invention having such a configuration, the portion of the abnormal input which is transmitted to the third wiring pattern without being completely clamped by the first and second protection diodes. , A third protection diode clamps to the second line. In addition, since the third protection diode is provided directly connected to the second line, it operates at high speed. Thus, the internal circuit can be reliably protected from abnormal input.

Further, a first protection diode is provided directly connected to the second line, a third protection diode is provided directly connected to the second line, and a third wiring pattern is provided between the first protection diode and the first protection diode. Connect to the third protection diode.
In addition, the third wiring pattern has a predetermined resistance value as an input protection resistance. As a result, the input protection resistance becomes the first
And the second line, there is no need to arrange an elongated input protection resistor in the area of the internal circuit. Therefore, the degree of freedom in the layout of the fourth wiring pattern and circuits connected thereto in the region of the internal circuit increases. Therefore, according to the present invention, the internal circuit of the IC can be sufficiently protected from abnormal input, and the layout of the internal circuit is less restricted.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below in detail with reference to the drawings. FIG. 1 shows a specific layout of the input protection circuit. This is one input protection circuit provided between the pad 20 and the transistor Tr1 as an internal circuit. The power supply line VDD is indicated by hatching rising to the right, and the ground line GND is indicated by hatching falling to the right. These power supply line VDD and ground line GND are formed of a single aluminum wiring layer pattern.

Here, VDD is a power supply line as a first line, GND is a ground line as a second line, 2
0 is a pad for receiving an external input signal A, 21 is a first wiring pattern of non-metal polysilicon, 21a is its parasitic circuit, 22 is a second wiring pattern of polysilicon, 22a is its parasitic circuit, 31 is a region of the diode D1, 41 is a region of the diode D2, 42 is a diode D
Region 3, 60 is a third wiring pattern of polysilicon,
61 is a fourth wiring pattern of polysilicon.

The overall layout of an IC provided with this input protection circuit has already been described in the prior art. That is, the power supply line VDD and the ground line GND are formed of an aluminum wiring layer pattern, and the pad 20 is formed of the power supply line VDD and the ground line G.
Transistor Tr1 arranged between the line with ND and receiving input signal A after passing through pad 20 is connected to ground line G.
It is arranged on the opposite side of the pad 20 across the ND.

The diode D1 is disposed in the pattern of the power supply line VDD, and has a cathode connected to the power supply line VDD.
, And the anode is connected to the pad 20 by the wiring pattern 21. This is for clamping a positive surge voltage to the pad 20 to the power supply line VDD. The diode D2 is arranged and provided in the pattern of the ground line GND, the anode is directly connected to the ground line GND, and the cathode is connected to the pad 2 by the wiring pattern 22.
Connected to 0. This is for clamping a negative surge voltage to the pad 20 to the power supply line VDD.

The diode D3 is arranged and provided in the pattern of the ground line GND.
ND, and the cathode is connected to the anode of the diode D1 by the wiring pattern 60. This is for clamping a negative surge voltage to the pad 20 to the power supply line VDD. However, the diode D3 complements the diode D2. That is, only the portion of the abnormal input due to the negative surge voltage to the pad 20 that cannot be completely clamped to the power supply line VDD by the diode D2 is clamped. Therefore, the region 42 of the diode D3 is replaced with the region 31 of the diode D1 and the diode D1.
Only a small area is required as compared with the second area 41. The diodes D1, D2 and D3 may be provided adjacent to the lines VDD and GND.

The wiring pattern 60 is formed as an elongated pattern and has a predetermined resistance value as the input protection resistance R1 of the internal circuit. As a result, the input protection resistor R1 is arranged not in the same internal region as the transistor Tr1, but in the region between the power supply line VDD and the ground line GND. Since the wiring pattern 60 is an elongated pattern and the area 42 of the diode D3 is also small,
These do not affect the pad arrangement.

The wiring pattern 60 is extended to the transistor Tr1, and this extended portion is the wiring pattern 61. Since the wiring pattern 61 does not need to serve also as the input protection resistor R1, the layout thereof and the arrangement of the transistor Tr1 connected thereto are no longer required.
You are not restricted by 1. Thereby, a large degree of freedom in the layout of the internal circuit can be secured. And
The input signal A is input to the transistor Tr1 via the pad 20, the wiring pattern 21, the wiring pattern 60, and the wiring pattern 61 in this order.

The operation of the protection circuit having such a configuration will be described. FIG. 2 shows an equivalent circuit in which the parasitic circuits 21a and 22a are also considered. This is different from the equivalent circuit of FIG. 4 in that one end of the input protection resistor R1 is connected to the anode of the diode D1 in addition to having the diode D3.
When there is a positive abnormal input to the pad 20 from the outside, the parasitic circuit 21a acting as a delay circuit acts to enhance the protection function of the input protection resistor R1. Therefore, in this case, the voltage at the connection point between the diode D1 and the resistor R1 is clamped to the power supply line VDD, and the transistor Tr1 is sufficiently protected by the diode D1 and the resistor R1.

When a negative abnormal input is applied to the pad 20 from the outside, basically, the diode D2 is connected to the pad 2
An attempt is made to clamp the voltage at 0 to the voltage on ground line GND. However, since the parasitic circuit 22a is interposed,
The voltage at pad 20 can be significantly lower than the ground voltage. This negative voltage is applied to the parasitic circuit 21
Due to the difference between the characteristic of “a” and the characteristic of the parasitic circuit 22a, it may be transmitted to the input protection resistor R1.

However, the abnormal input transmitted to the input protection resistor R1 is reliably connected to the ground line G by the diode D3.
Clamped to ND. Therefore, the transistor Tr1 is not destroyed. Therefore, even if the external abnormal input to the pad 20 is either positive or negative voltage,
The transistor Tr1 is reliably protected. Therefore, in the IC having the input protection circuit having the above-described layout, the internal circuit is reliably protected from abnormal input such as a surge voltage applied to the pad from the outside.

The case where the voltage supplied to the first line is higher than the voltage supplied to the second line has been described as an example, but the voltage supplied to the first line is higher than the voltage supplied to the second line. The present invention is also effective when the voltage is lower than the voltage supplied to. In this case, the polarities of the first, second, and third protection diodes may be inverted. Either of the first and second lines may be a power supply line and the other may be a ground line, or a source and drain line.

[0026]

As can be understood from the above description, the input protection circuit and the IC having the same according to the present invention have a single metal wiring layer and the first line and the second line are formed of the metal wiring layer. The pad is composed of a layer pattern
An input protection circuit provided in an IC disposed between a second line and an internal circuit disposed on the opposite side of the pad across the second line, provided directly in connection with the first line and connected to the pad A first protection diode, a second protection diode directly connected to the second line and connected to the pad, and a third protection diode directly connected to the second line.
And an internal circuit receives an input signal through a wiring pattern that sequentially connects the pad, the first and third protection diodes, and the internal circuit, and a wiring pattern between the first and third protection diodes is provided. It has a predetermined resistance value. As a result, the internal circuit of the IC can be sufficiently protected from abnormal input, and an input protection circuit having a configuration with less restrictions on the layout of the internal circuit can be realized.

[Brief description of the drawings]

FIG. 1 is an enlarged schematic diagram of a pattern layout of an embodiment of an input protection circuit having a configuration of the present invention.

FIG. 2 is an equivalent circuit thereof.

FIG. 3 is an enlarged schematic diagram of a conventional pattern layout of an input protection circuit, in which equivalent circuit symbols are added.

FIG. 4 is an equivalent circuit diagram thereof.

FIG. 5 is a schematic diagram of a pattern layout of a conventional IC having one metal wiring layer.

FIG. 6 is a basic circuit of a conventional input protection circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 IC VDD Power supply line as 1st line GND Ground line as 2nd line 20 Pad which receives input signal A from the outside 21 First wiring pattern of polysilicon 21a Parasitic circuit 22 Second of polysilicon Wiring pattern 22a Parasitic circuit 30 Power supply pad 31 Diode D1 area 40 Grounding pad 41 Diode D2 area 42 Diode D3 area 60 Third wiring pattern of polysilicon 61 Fourth wiring pattern of polysilicon

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H01L 21/8234-21/8238 H01L 21/8249 H01L 27/04-27/06 H01L 27/08 331 H01L 27 / 088-27/092 H01L 29/78

Claims (2)

(57) [Claims] A first line such as a power supply line and a second line such as a ground line are formed of a pattern of the metal wiring layer, and a pad for receiving an external input signal is provided on the first line. And an internal circuit disposed between the second line and the second line and receiving the input signal after passing through the pad is provided in an IC disposed on the opposite side of the pad across the second line. An input protection circuit for protecting the internal circuit from an abnormal input such as a surge voltage applied to the pad from the outside, wherein the input protection circuit is disposed in a pattern of the first line or is in contact with the first line. And a cathode (or anode) is directly connected to the first line, and an anode (or cathode) is connected to the pad with a first wiring pattern of a nonmetal such as polysilicon. A first protection diode provided in the second line pattern or provided in contact with the second line, and an anode (or a cathode) is directly connected to the second line. A second protection diode having a cathode (or anode) connected to the pad with a second wiring pattern made of a non-metal such as polysilicon; and a second protection diode disposed in the second line pattern, or 2, the anode (or cathode) is directly connected to the second line, and the cathode (or anode) is a non-metallic third wiring pattern of polysilicon or the like. A third protection diode connected to the anode (or cathode), and a cathode (or anode) of the third protection diode
And a fourth wiring pattern for connecting the internal circuit to the internal circuit. The internal circuit sequentially passes through the pad, the first wiring pattern, the third wiring pattern, and the fourth wiring pattern. An input protection circuit, wherein the third wiring pattern has a predetermined resistance value as an input protection resistance of the internal circuit after receiving the input signal later. 2. A semiconductor device according to claim 1, wherein a metal wiring layer is a single layer, and a first line such as a power supply line and a second line such as a ground line are formed of the pattern of the metal wiring layer. An internal circuit disposed between the line of the second line and the second line and receiving the input signal after passing through the pad, the internal circuit being disposed on the opposite side of the pad across the second line; The cathode (or anode) is disposed in the pattern of the first line or provided in contact with the first line, the cathode (or the anode) is directly connected to the first line, and the anode (or the cathode) is a non-conductive material such as polysilicon. A first protection diode connected to the pad by a first metal wiring pattern, and a first protection diode disposed in the second line pattern or provided in contact with the second line; A second protection diode whose anode (or cathode) is directly connected to the second line and whose cathode (or anode) is connected to the pad by a second wiring pattern of a non-metal such as polysilicon; And the anode (or cathode) is provided in contact with the second line and is directly connected to the second line and the cathode (or anode) is made of a non-metal such as polysilicon. A third protection diode connected to the anode (or cathode) of the first diode by a third wiring pattern, and a third protection diode connecting the cathode (or anode) of the third protection diode to the internal circuit. Wherein the internal circuit includes the pad, the first wiring pattern, the third wiring pattern, and the fourth wiring pattern. And the third wiring pattern has an input protection circuit having a predetermined resistance value as an input protection resistance of the internal circuit, and a surge applied from the outside to the pad. An IC for protecting the internal circuit from abnormal input such as voltage.