JP2901438B2 - Driving method of liquid crystal display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for driving a liquid crystal display device used for AV (audio visual) equipment, OA (office automation) equipment, computer terminal equipment with a communication function, and the like.

[0002]

2. Description of the Related Art In recent years, with the development of a highly information-oriented society, a demand for a large-sized display having a large display capacity has been increasing. To respond to such a request,
The development of high-definition CRTs (Cathode Ray Tubes), also known as the "kingdom of displays", is progressing, while the size is up to 40 inches for direct-view and 200 inches for projection. Have been. However, the weight and depth problems of CRTs are large and large.
Since the realization of a large display capacity becomes more serious, a drastic solution is strongly desired.

[0003] Flat-panel displays that perform display based on a principle different from those of conventional CRTs have departed from the current situation used in applications such as word processors and personal computers, and have achieved high display requirements for high-vision and high-performance EWS (engineering workstation) displays. Research is progressing steadily toward quality improvement.

[0004] As the flat panel display, there are ELP (electroluminescent panel), PDP (plasma display panel), VFD (fluorescent display tube), ECD (electrochromic display device), LCD (liquid crystal display device) and the like. Among these, LCDs are regarded as the most promising because of the easiness of realizing full color and the compatibility with LSI (Large Scale Integrated Circuit), and the technological progress is the most remarkable.

There are two types of LCDs: a simple matrix drive type LCD and an active matrix drive type LCD. A simple matrix drive type LCD has a structure in which liquid crystal is sealed in an XY matrix type panel in which a pair of glass substrates are opposed to each other so that striped electrodes formed on each other are orthogonal to each other. The display is performed by utilizing. On the other hand, an active matrix drive type LCD has a structure in which a non-linear element is directly added to a picture element, and performs display by positively utilizing the non-linear characteristics (switching characteristics and the like) of each element. Therefore, as compared with the former simple matrix drive type LCD, a display with less dependence on the display characteristics of the liquid crystal itself and with high contrast and high response can be realized. This type of nonlinear element includes a two-terminal type and a three-terminal type. MIM (metal-insulator-metal), diode, and the like exist as two-terminal nonlinear elements, while TFTs are used as three-terminal nonlinear elements.
(Thin film transistor), Si-MOS (silicon metal oxide semiconductor), SOS (silicon-on-sapphire)
Etc. exist.

However, a simple matrix drive type LC
In the case of D, the manufacturing process is easy and the cost is advantageous because the panel structure is simplified.

In the simple matrix drive type LCD, the ratio of the effective voltage applied to the selected picture element electrode and the non-selected picture element electrode approaches 1 with an increase in the number of scanning lines, thereby realizing high contrast. For this purpose, the display characteristics of the liquid crystal itself must be sharp. In order to obtain this characteristic, liquid crystal molecules are twisted from 180 ° to about 270 °, and a so-called STN (Super Twisted) in which a polarizing plate is combined.
Nematic) -LCD is usually used. A STN-LCD incorporating a compensator made of a liquid crystal or a polymer film has also been commercialized.

On the other hand, the response characteristic required for the liquid crystal display device generally has a relation opposite to the contrast characteristic. One of the reasons is known to be caused by the drive waveform. An XY matrix driving method usually used for a simple matrix driving type LCD sequentially selects each scanning line electrode one by one and synchronizes a signal corresponding to display data with a data line intersecting the scanning line electrode. This is a method of simultaneously applying the voltage to the electrodes. In this method, as shown in FIG. 6A, the voltage applied to each picture element is such that the high voltage T is applied once in a cycle (frame) for selecting all the scanning lines to be turned on, and During the main period of time, a constant low bias voltage U is applied.

FIG. 6B shows a case where a high-speed response type LCD is realized by optimizing the physical properties of the liquid crystal material, particularly the viscosity and the thickness of the liquid crystal layer in order to shorten the response time. As described above, a phenomenon (hereinafter referred to as a frame response phenomenon) that changes in response to the waveforms of the voltages T and U described above occurs in the transmittance (vertical axis), and the transmittance is represented by a broken line obtained by the cumulative response of the applied voltage. There is a drawback that the value deviates from the normal value shown and the contrast is impaired.

In recent years, the following two driving methods have been proposed to improve the frame response phenomenon. One of the driving methods is to apply a positive or negative voltage derived from a Walsh (Walsh) function to all the scanning line electrodes at the same time, and in synchronization with this application, to correlate display data inputted from the outside with a display data inputted from the outside. This is a method of applying a data signal taken to a data line electrode (a so-called active addressing method) (TJ Scheffer, eta).
l. SID'92, Digest, p. 228). Another driving method is to apply a positive or negative voltage based on a binary method or a voltage of 0 to a plurality of scanning line electrodes, and to combine the display contents with the applied voltage when this potential is combined with the potential of a data line. Is applied to all the data line electrodes (so-called multiple line simultaneous selection method) (TN Ruckm).
ongathan, 1988 IDRC p. 80).

Next, an example of a specific procedure of both methods will be described. In the case of the active addressing method, the operation is performed as follows. First, a scanning-side signal Y ₁ to Y ₅ dot matrix five rows and five columns shown in FIG. 7, is determined using a Walsh function shown in FIG. Specifically, each different in each of the scanning signals Y ₁ to Y ₅ as shown in FIG. 8 (a) 5
8B. One frame period is divided into eight periods t _{1 to} t ₈ , and each scanning-side signal Y _{1 to} Y ₅ is set, as shown in FIG. Is determined.

Next, a data-side signal is obtained. For example, as shown in FIG. 9, taking the second column as an example, first, the display data I _{12 to} I ₅₂ of each dot in the second column are turned on by −1,
Off expressed in two values of ± 1 +1, subjected to FIG 10 (a) to the display data I ₁₂ of which the first line as shown in the first row scanning side signal Y _1. Next, the same calculation is performed for the second to fifth rows. Subsequently, the calculation result of each column obtained as described above is added for each of the periods t _{1 to} t ₈ to obtain an addition value g ₂ . 10 (b) is a diagram showing the sum value g ₂ at the voltage level.

The data signal X shown in FIG.
₂ is expressed by multiplying the addition value g ₂ by a coefficient C as shown in the following equation. The coefficient C depends only on the number N of the scanning-side signals, and when N is 5, C ≒ 0. 425.

X ₂ = C · g ₂ where C = [1 / (2 (N−√N))] ^1/2 All scanning side signals Y _{1 to} Y ₅ and data When the side signals X _{1 to} X ₅ are applied simultaneously to perform surface scanning, display data is displayed on the panel. FIG. 11B
Shows a voltage waveform applied to turn on the third row in the second column shown in FIG. 11A at this time (●).
Similarly, FIG. 11C shows that the fourth row in the second column is in the off state (○).
FIG.

Next, a method for simultaneously selecting a plurality of lines will be described. For example, as shown in FIG. 12, a case where three lines are simultaneously selected as one set will be described. First, three scanning line electrodes are simultaneously selected, and scanning is performed sequentially by applying a voltage of + Vr or -Vr. Therefore, the scanning voltage to be applied requires three values of ± Vr and 0 V when not selected. Next, as the display pattern, on is set to 1 and off is set to 0, + Vr of the scanning line electrode is set to 1 and -Vr is set to 0, and an exclusive OR is taken for each bit to determine the voltage of one data line electrode. At this time, if the number of lines is n, the data voltage is (n +
Level 1) is required.

Next, the scanning voltage and the data voltage determined as described above are simultaneously applied to the first set of lines. From then on, the same voltage is determined in the same manner as before, and the simultaneous scanning is repeatedly performed for each set composed of a plurality of lines. Thereby, the display is performed on the panel.

As can be understood from the above description, in the case of both methods, selection is performed a plurality of times during one frame.
The peak value of the applied voltage during one frame can be changed in a direction in which the peak value is averaged as much as possible, and the frame response phenomenon that occurs in the case of the conventional method of performing one selection during one frame can be improved.

As a specific circuit example, FIG. 13 shows an example of a liquid crystal display device system provided with the drive circuit of the active addressing system. This liquid crystal display device system includes an XY matrix type liquid crystal display device 1. The liquid crystal display device 1 includes a liquid crystal layer, and a column electrode 1a as a data line electrode and a row electrode 1b as a scanning line electrode which are disposed to face each other while sandwiching the liquid crystal layer. For example, the column electrode 1a having fifteen to the data side signal X ₁ to X ₁₅ is inputted, the row electrode 1b having fifteen to scan side signal Y ₁ to Y ₁₅ are inputted. The intersection of the column electrode 1a and the row electrode 1b is a display dot.

A column driving circuit 4 is connected to the column electrode 1a.
Are connected, and the row drive circuit 5 is connected to the row electrode 1b. As shown in FIG. 14, the row drive circuit 5 includes, for each output system, a transfer gate 5a to which a voltage of + Vr is applied and a transfer gate 5b to which a voltage of -Vr is applied. 12 see) the basis by selecting two voltage levels of + Vr and -Vr, and is configured to output the scan-side signal Y ₁ to Y ₁₅ to row electrode 1b.

On the other hand, the column drive circuit 4 comprises a sample gate 4a, a transfer gate 4b, a sampling capacitor 4c, a transfer capacitor 4d, and an output buffer 4e for each output system as shown in FIG. The data-side signals X _{1 to} X _15, which are operation results, are sequentially sampled based on an input timing signal (see FIG. 13), and are output to the column electrode 1 a when one line is completed. I have.

An output signal from the orthogonal transform operation circuit 3 is supplied to the column drive circuit 4. The orthogonal transform operation circuit 3 supplies an image data signal, a timing signal, and a scanning signal output from the Walsh function generator 2. Y ₁ and so on. Further, the Walsh function generator 2 is provided with a timing signal. On the other hand, the row drive circuit 5 includes a timing signal and the scanning side signal Y ₁ from the Walsh function generator 2.
And so on.

The contents of signal processing in the active addressing type driving circuit having such a configuration are as follows. The Walsh function generator 2 obtains positive or negative scanning signals Y _{1 to} Y ₁₅ derived by the Walsh function. This signal is applied to the row electrode 1b via the row drive circuit 5. Further, the orthogonal transform operation circuit 3 decomposes the image data signal input from the outside into binary signals of +1 and −1, and converts these signals into scanning signals Y _{1 to} Y given from the Walsh function generator 2. multiplied by _15, followed by the addition value g ₂ calculated as described above, obtaining the data side signal X ₂ is a value obtained by multiplying the coefficient C in the added value g _2. This signal is applied to the column electrode 1a of the liquid crystal display device 1 via the column drive circuit 4. When the voltage application for one frame is completed in this way, the original image is reproduced on the liquid crystal display device 1.

[0023]

[SUMMARY OF THE INVENTION Incidentally, in the case of the driving circuit of a conventional active addressing method described above, shows one frame of voltage waveform of the data side signal X ₁ in FIG. 16 (a), scanning-side Y ₁ , 1 of Y ₇ and Y ₁₅
16 (b), (c) and (d) show voltage waveforms for each frame. Further, the signals Y ₁ -X ₁ , Y ₇ -X ₁ and Y ₁₅
Each voltage waveform of one frame in the display dot -X ₁ is applied FIG. 16 (e), shown in (f) and (g).
The vertical axis in each figure is the voltage value, and the horizontal axis is time. Also, ± Vγ
Is the output voltage level of the scanning line driving circuit, and Vc (t)
Shows the voltage level of the data side signal X _1. Here, the image data is all ON.

As can be understood from FIGS. 16 (e) to 16 (g), the voltage waveform applied to the display dot is the signal applied to the low electrode even when the image data is all ON. The drive voltage waveform and the frequency component are greatly different for each of Y ₁ , Y ₇ and Y ₁₅ . That is, FIG. 16E has many low-frequency components, whereas FIG. 16F and FIG.
As shown in (g), the component becomes smaller, and conversely, the high frequency component increases.

Therefore, there is a problem that even if an attempt is made to display in the same state, the effective voltage value applied to the display dots becomes non-uniform due to the difference in the frequency components, causing a difference in the display. To explain the reason in detail, an actual liquid crystal display device forms a low-pass filter by a resistance component such as an electrode resistance and a capacitance component of a liquid crystal layer. Therefore, the frequency component of a voltage applied to each display dot is different due to the low-pass filter. This is because the effective voltage value becomes non-uniform.
In addition, as a cause of the non-uniformity of the effective voltage value, frequency dependency may be caused by the characteristics of the liquid crystal material and the alignment film. A similar problem also occurs in the multiple line simultaneous selection method. As a result, in the case of using both methods, display unevenness such as crosstalk occurs, and display quality is significantly impaired.

An object of the present invention is to solve such a problem of the prior art, and an object of the present invention is to provide a driving method of a liquid crystal display device capable of high-quality display without display unevenness. I do.

[0027]

According to the driving method of the liquid crystal display device of the present invention, a scanning dot electrode and a data line electrode sandwiching a liquid crystal layer are disposed opposite to each other so as to intersect each other, and the display dots intersect each other. In a method of driving a liquid crystal display device configured to perform display by a method using an orthogonal function system, a scan signal applied to the scan line electrode and a data signal applied to the data line electrode In addition, a pause period in which the applied voltage at the display dot is kept at a constant level is periodically provided so as to exist a plurality of times during one frame, and driving is performed using a scanning signal and a data signal having both the pause periods. Thereby, the above object is achieved.

The constant level voltage during the idle period may be set to 0 V by grounding a wiring for transmitting the scanning signal and a wiring for transmitting the data signal.

[0029]

According to the present invention, multiple times during one frame,
A scanning signal and a data signal in which there is a pause period in which the applied voltage at the display dot is periodically set to a constant level are applied to the display dot. At this time, if the timings of the pause period in the scanning signal and the data signal are aligned, the signal applied to the display dot is divided into narrower time widths in the pause period. As a result, the frequency of the signal applied to each display dot is increased, and there is little difference in frequency. As a result, even if a low-frequency component is removed by a low-pass filter existing in the liquid crystal display device, the frequency components between the voltage waveforms applied to the respective display dots are averaged.

[0030]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be specifically described below.

FIG. 1 is a block diagram showing an entire liquid crystal display system including a driving circuit according to this embodiment. The same parts as those in FIG. 13 are given the same numbers. This liquid crystal display device system includes a liquid crystal display device 1 for displaying.
And a column drive circuit 14 for supplying a signal to the liquid crystal display device 1
And a row drive circuit 15, an orthogonal transform operation circuit 3 that supplies a signal to the column drive circuit 14, and the orthogonal transform operation circuit 3
Function generator 1 for giving a signal to the row driving circuit 15
Comprising a 2, and a DIS signal generator circuit 6 to provide a DIS signal rest period Z ₀ is provided at a fixed period to be described later to the column drive circuit 14 and the row driver circuit 15. An image data signal is given to the orthogonal transformation operation circuit 3, and D
A timing signal is given to the IS signal generation circuit 6, the orthogonal function generator 12, the column drive circuit 14, and the row drive circuit 15.

The liquid crystal display device 1 includes a liquid crystal layer, and a column electrode 1a as a data line electrode and a row electrode 1b as a scanning line electrode which are opposed to each other while sandwiching the liquid crystal layer. For example, as the column electrode 1a, the data side signal X
Has fifteen _{to 1} to X ₁₅ is applied, as the row electrode 1b having fifteen to scan side signal Y ₁ to Y ₁₅ is applied. The intersection of the column electrode 1a and the row electrode 1b is a display dot.

The column driving circuit 1 is connected to the column electrode 1a.
4, and a row drive circuit 15 is connected to the row electrode 1b. As shown in FIG. 2, the row drive circuit 15 includes, for each output system, a transfer gate 15a to which a voltage of + Vr is applied, a transfer gate 15b to which a voltage of -Vr is applied, and a DIS to which a DIS signal described later is applied. Transfer gate 15c. Two transfer gates 15a and 15b are timing signals inputted by selecting two voltage levels of + Vr and -Vr based on (see FIG. 1), and outputs the scan-side signal Y ₁ to Y ₁₅ to row electrode 1b .

The DIS transfer gate 15c, as shown in FIG. 4 (a), type the DIS signal rest period Z ₀ is provided at a fixed period, off in response to the pause period Z ₀ of the DIS signal State, and turns on corresponding to the other periods. That is, each output system is grounded at a constant period based on the DIS signal. Therefore, in each output system,
+ When Vr or the -Vr voltage level is output to the row electrode 1b, a voltage at a constant period is set rest period Z ₂ of 0V. For example, as shown in FIGS. 4C, 4D, and 4E, the scanning-side signals Y ₁ , Y _7, and Y ₁₅ applied to the three row electrodes 1b respectively include the pause period Z of the DIS signal.
₀ rest period Z ₂ corresponding to is set.

As shown in FIG. 3, one column drive circuit 14 includes a sample gate 14a, a transfer gate 14b, and a sampling capacitor 14 for each output system.
c, a transfer capacitor 14d, an output buffer 14e, and a DIS transfer gate 14f. The sample gate 14a outputs the operation result data Vc based on the input timing signal (see FIG. 1).
(T) are sequentially sampled, and the transfer gate 14
b is output to the column electrode 1a side when one line is completed.

The transfer gate 14f is for DIS, as shown in FIG. 4 (a), type the DIS signal rest period Z ₀ is provided at a fixed period, off in response to the pause period Z ₀ of the DIS signal State, and turns on corresponding to the other periods. That is, each output system is grounded at a constant period based on the DIS signal. Thus, the data side signal X ₁ to X ₁₅ output from the transfer gate 14b to the column electrode 1a, a voltage at a constant cycle rest period Z ₁ of 0V is set. For example, as shown in FIG.
The data side signals X _1, rest period Z ₁ corresponding to the idle period Z ₀ of the DIS signal is set.

An output signal from the orthogonal transform operation circuit 3 is supplied to the column drive circuit 14, and the image data signal, the timing signal, and the function signal output from the orthogonal function generator 12 are supplied to the orthogonal transform operation circuit 3. Is given. Further, a timing signal is supplied to the orthogonal function generator 12. On the other hand, a timing signal and an output signal from the orthogonal function generator 12 are supplied to the row drive circuit 15.

In the liquid crystal display device configured as described above, signal processing is performed as follows. The orthogonal function generator 12 uses the Walsh function to apply 15 different signal patterns to each of the scanning-side signals, divides one frame period into a plurality of 15 periods, and turns on one for each period. , And off are obtained as -1 and output to the row drive circuit 15.

The row drive circuit 15 switches between the transfer gates 15a and 15b according to the positive or negative of the input signal, and outputs a desired signal. At this time, the DIS transfer gate 15c is ON / OFF controlled by the DIS signal, and gives a pause period at a constant time pitch to the signal to be output as described above. It is preferable that the on / off control of the DIS transfer gate 15c be performed a plurality of times during one frame. In this embodiment, the operation is performed 16 times during one frame.

[0040] Thus, the illustrated one frame as a scanning-side signal Y ₁ to Y ₁₅ output from the low-drive circuit 15, for example, FIG. 4 (c), the as shown in (d) and (e), DIS signal Are the scanning side signals Y ₁ , Y ₇ and Y ₁₅ in which the pause period Z ₂ corresponding to the pause period Z ₀ is set. In addition,
It becomes a signal pause period Z ₂ is set similarly for the remaining 12 of the scanning signal _{Y 2 ~Y 6, Y 8 ~Y} 14. The scanning-side signals Y _{1 to} Y ₁₅ thus obtained are applied from the row driving circuit 15 to the corresponding row electrodes 1b.

The orthogonal transform operation circuit 3 converts the image data signal input from the outside into +1 and -1 for each data side signal.
, And the first data signal is multiplied by a voltage signal provided from the orthogonal function generator 12 and set to +1 for ON and -1 for OFF in each period. Ask for. Next, similarly, the second data-side signal is multiplied by the voltage signal, and the same is repeated for the third and subsequent data. Subsequently, for each of the above-mentioned predetermined periods, the value of the product of the fifteen signal patterns is added to obtain an added value, and the data-side signal which is a value obtained by multiplying the added value by the coefficient C is obtained. This signal is applied to the column drive circuit 14.

The column drive circuit 14, DIS transfer gates 14e are on-off controlled by the DIS signal, imparts a rest period Z ₁ at predetermined time intervals in the signal outputted from the order column driving circuit 14. In addition,
The ON / OFF control of the DIS transfer gate 14e
This is performed in the same manner as the DIS transfer gate 15c that inputs the same DIS signal.

Accordingly, when one frame of the data-side signal X ₁ output from the column drive circuit 14 is illustrated,
For example, as shown in FIG. 4 (b), rest period Z ₁ corresponding to the idle period Z ₀ of the DIS signal is set signal. The remaining 14 data-side signals X _{2 to} X ₁₅ are also signals in which the idle period Z ₁ is set. The data-side signals X _{1 to} X ₁₅ thus obtained are applied to the column electrodes 1 a of the liquid crystal display device 1.

When the voltage application for one frame is completed in this way, the original image is reproduced on the liquid crystal display device 1.

Therefore, in the case of the present invention, the scanning signals Y _{1 to} Y ₁₅ and the data signals X _{1 to} X _{15 in} which the pause periods Z ₂ and Z ₁ periodically exist a plurality of times during one frame. Is applied to the display dots. At this time, the scanning side signals Y _{1 to} Y
Rest period at ₁₅ and the data side signal X ₁ ~X ₁₅ Z _2, keep to align the timing of Z _1. For example, the signal X ₁
And Y _1, the voltage waveform applied to each display dot signals X ₁ and Y ₇ and signals X ₁ and Y ₁₅ are applied, respectively Figure 4 (f),
(G) and (h) are obtained. That is, it is divided into narrower time widths.

FIGS. 5A and 5B show the relationship between the order of the frequency component (horizontal axis) and the relative voltage intensity (vertical axis) in the signal applied to the display dot by the method of the present invention. (A) who is obtained by decomposing the voltage waveform to a display dot signals X ₁ and Y ₁₅ to shown in FIG. 4 (h) is applied to each order of the frequency component, the direction of (b), FIG. 4
In which signals X ₁ and Y ₁ shown in (f) was decomposed voltage waveform for each order of frequency components relating to the display dots to be applied. For comparison, FIGS. 5C and 5D show the relationship between display dots to which X ₁ and Y ₁₅ and X ₁ and Y ₁ are applied by the conventional method. In the above-mentioned order, the left end indicates a first-order frequency component, and the closer to the right, the higher-order frequency component. Further, the relative voltage strength is a strength with respect to a certain fixed value. Further, FIG.
Is a case where one pause period is set to 8 μs.

As can be understood from this figure, in the case of the method of the present invention, the frequency of the signal applied to each display dot is higher than that in the case of the conventional method, and the presence of the quiescent period Z ₃ exists. As a result, there is little difference in frequency. To explain in more detail, FIG.
In the case of (1), the voltage intensity of the primary frequency component is high, but in the case of FIG. 5B according to the method of the present invention corresponding thereto, the voltage intensity of the primary frequency component is low, The voltage intensity of the frequency component is increased. FIG.
5 (c) and FIG. 5 (d).
In the case of the method of the present invention shown in (a) and (b), the difference in the frequency component between the display dots is smaller.

As a result, even if the low-frequency component is removed by the low-pass filter existing in the liquid crystal display device, the frequency component between the voltage waveforms applied to each display dot is averaged, and therefore the frequency component is It is possible to eliminate display unevenness such as crosstalk that occurs due to the difference between. According to an experiment conducted by the inventor of the present application, in a liquid crystal display device having a frame frequency of 60 Hz, 256 × 320 dots, and a size corresponding to 5 inches, the time width of the pause period is set to 5 to 8 μs, so that there is no display unevenness. Images are obtained.

In the above embodiment, the pause periods Z ₂ and Z ₁ for the scanning side signal and the data side signal are set by grounding the wiring for transmitting the scanning side signal and the data side signal. However, the present invention is not limited to this, and it is needless to say that the present invention can be implemented by an electric method using an electric circuit or the like.

The above-mentioned design of the pitch, time width, etc. of the quiescent period Z ₀ is performed while actually observing the display state on the liquid crystal display device, or is calculated based on the liquid crystal display device and the driving frequency characteristics. May be performed. Also, well even pitch rest period Z ₀ is not constant, the time width may be set to a value other than 5~8μs described above.

Further, in the above embodiment, the pause periods Z ₂ and Z ₁ are applied to the scanning side signal and the data side signal with the same time width and timing.
However, the present invention is not limited to this, and pause periods Z ₂ and Z ₁ having different time widths may be present in the scanning signal and the data signal. However, a part of the pause periods Z ₂ and Z ₁ in both signals must always overlap in time. Otherwise, the voltage level in each idle period changes, and a constant level idle period cannot be obtained.

In the above embodiment, the active addressing method using the Walsh function is used. However, the present invention is not limited to this, and other orthogonal functions, for example, Radema
Needless to say, the present invention can be similarly applied to a system using the orthogonal function of cher and the orthogonal function of haar.

[0053]

As described above, according to the present invention, 1
Since the liquid crystal display device is driven using a scanning line signal and a data line signal in which a pause period exists a plurality of times between frames,
The frequency components between the display dots can be averaged, and display unevenness such as crosstalk can be eliminated, so that a high-quality liquid crystal display device can be provided.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an entire liquid crystal display device including a drive circuit according to an embodiment.

FIG. 2 is a configuration diagram showing a row drive circuit provided in the liquid crystal display device of FIG. 1;

FIG. 3 is a configuration diagram showing a column drive circuit provided in the liquid crystal display device of FIG.

FIG. 4 is a waveform chart of various signals used in the liquid crystal display device of FIG.

FIG. 5 is a diagram showing the relationship between the order of the frequency component and the relative voltage intensity in the case of the method of the present invention, in comparison with the relationship in the case of the conventional method.

FIG. 6 is a diagram for explaining a conventional driving method.

FIG. 7 is a diagram for explaining a conventional active addressing method.

FIG. 8 is a diagram for explaining a conventional active addressing method.

FIG. 9 is a diagram for explaining a conventional active addressing method.

FIG. 10 is a diagram for explaining a conventional active addressing method.

FIG. 11 is a diagram for explaining a conventional active addressing method.

FIG. 12 is a diagram for explaining a conventional multiple line simultaneous driving method.

FIG. 13 is a block diagram showing a liquid crystal display device to which a conventional active addressing method is applied.

FIG. 14 is a diagram showing a row drive circuit provided in the liquid crystal display device of FIG. 11;

FIG. 15 is a diagram showing a column drive circuit provided in the liquid crystal display device of FIG.

16 is a waveform chart of various signals used in the liquid crystal display device of FIG.

[Explanation of symbols]

1 liquid crystal display device 1a column electrodes 1b row electrodes 12 orthogonal function generator 3 orthogonal transform calculating circuit 14 column driving circuit 15 row driving circuit 6 DIS signal generation circuit X ₁ to X ₁₅ data side signal Y ₁ to Y ₁₅ scanning side signal Z _{0, Z 1, Z 2,} Z 3 rest period

──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Norio Anzai 22-22, Nagaikecho, Abeno-ku, Osaka-shi, Osaka Inside Sharp Corporation (72) Inventor Hiroshi Ishii 22-22 Nagaikecho, Abeno-ku, Osaka-shi, Osaka Sharp Corporation (72) Inventor Hiroki Taniguchi 22-22 Nagaikecho, Abeno-ku, Osaka-shi, Osaka Inside Sharp Corporation (56) References JP-A-4-50919 (JP, A) J. Scheffer, B .; Clifton, "Active Addless Method for High-Contrast Video-Rate STN Displays", SID 92 DIgest, (United States), Japan Science and Technology Corporation, Science and Technology Information Headquarters. , P. 228-231 (58) Field surveyed (Int. Cl. ⁶ , DB name) G02F 1/133 G09G 3/36

Claims (2)

(57) [Claims] 1. A liquid crystal display device in which a scanning line electrode and a data line electrode sandwiching a liquid crystal layer intersect each other so as to face each other, and which is configured to perform display on display dots where both electrodes intersect, is orthogonal to a liquid crystal display device. In a method for driving a liquid crystal display device driven by a method using a function system, a scan signal applied to the scanning line electrode and a data signal applied to the data line electrode are set to a constant voltage applied at the display dot. A driving method of a liquid crystal display device in which a period is periodically provided so as to exist a plurality of times during one frame, and driving is performed using a scan signal and a data signal having both the pause periods. 2. The method of driving a liquid crystal display device according to claim 1, wherein a constant level voltage during the idle period is set to 0 V by grounding a wiring for transmitting the scanning signal and a wiring for transmitting the data signal.