JP2899001B2 - Digital signal processing method - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a digital signal processing method, and more particularly to a method for removing noise.

[Prior Art] FIG. 3 is a block diagram of a digital signal processing circuit of a conventional solid-state imaging device that extracts a digitized video signal from an output of a solid-state imaging device.

Reference numeral 101 denotes a lens, and 102, a solid-state imaging device that converts light projected from the lens 101 into an electric signal. An A / D conversion circuit 103 performs A / D conversion on the output of the solid-state imaging device 102. 104 is
This is a low-pass filter that extracts only the low-frequency component of the output of the A / D conversion circuit 103. Reference numeral 105 denotes a contour compensation circuit that compensates for a high-frequency component of a signal that is dull due to lens characteristics or the like.

The contour compensation circuit 105 includes a delay circuit 106 for delaying the original signal by a predetermined time, a subtraction circuit 107 for subtracting the original signal and the delayed signal and outputting a contour signal, a multiplication circuit 109 for multiplying the contour signal by a constant to enhance the contour signal, It comprises an addition circuit 108+ for adding the signal and the contour signal.

[Problems to be Solved by the Invention] However, in the above conventional example, there is a problem that noise is easily generated in the video signal. FIG. 4 is a diagram showing the relationship between the original signal and the contour signal. FIG.
The contour signal contains noise of the image sensor and quantization noise at the time of A / D conversion that are emphasized by taking the difference between digital data and multiplying it by a constant, and this signal is added to the original signal. There is a problem that noise becomes conspicuous.

[Means and Actions for Solving the Problems] Under such a background, in the digital signal processing method of the present invention, when processing a digital signal indicating a negative value by a two's complement, the input digital signal is negative. Sometimes, after inverting the input digital signal, a signal obtained by adding 1 is obtained, the signal is non-linearly converted by a table conversion circuit, and after inverting again, 1 is added, and when the input digital signal is positive, Non-linear conversion is performed by a table conversion circuit.

With this configuration, in the present invention, in order to share a table conversion circuit for non-linear conversion for suppressing a noise component between a positive value and a negative value, a negative value represented by a two's complement is used. In the process of 1
Is added, 1 is added after processing, and the circuit size of the table conversion circuit is reduced.

FIG. 1 is a circuit block diagram of a noise clipping circuit to which a digital signal processing method according to the present invention is applied. In FIG. 1, reference numeral 1 denotes a sign bit discriminating circuit for discriminating the sign of a signal based on the sign bit of an input signal. Reference numeral 2 denotes an inverting circuit for inverting all bits of the input signal. Reference numeral 3 denotes an adding circuit for adding 1 to the output of the inverting circuit 2. By the operation of the inverting circuit 2 and the adding circuit 3, the 2's complement of the input signal is taken, and the sign of the signal is inverted.

Reference numeral 4 denotes a switch controlled by the output of the sign bit discriminating circuit 1. The sign is switched to the A side when the sign is positive, and to the B side when the sign is negative. That is, a positive signal is always output as the output of the switch circuit 4.

Reference numeral 11 denotes a table conversion circuit that clips noise, and causes the table conversion circuit 11 to perform a noise conversion operation by performing a non-linear conversion. In this circuit 11, by replacing the table, a great degree of freedom can be given to the noise clip operation.

Next, 7 is an inversion circuit similar to 2 and 8 is an addition circuit similar to 3, which inverts the sign of the output of the table conversion circuit 11. Reference numeral 9 denotes a switch controlled by the output of the sign bit discriminating circuit 1. The switch 9 is switched to the side A when the input signal is negative and to the side B when the input signal is positive.

In this way, the input signals are all once converted to the positive polarity, and after the noise clipping by the table conversion circuit 11, the positive signals are left as they are, and the negative signals are again inverted in polarity and output. By the operation of this circuit, a signal close to zero level is clipped as noise, and a signal with a good S / N ratio can be obtained.

FIG. 2 shows the circuit of FIG.
FIG. 9 is a block diagram that is incorporated in the contour compensation circuit 105 as 0. By clipping the noise of the contour signal in this way, a contour signal without noise can be obtained as shown in FIG. 4 (c).

[Effects of the Invention] As described above, according to the main building of the present invention, a signal such as noise included in a digitized signal can be effectively removed with a relatively simple circuit configuration.

[Brief description of the drawings]

FIG. 1 is a diagram showing an embodiment of the present invention, FIG. 2 is a circuit block diagram of a solid-state imaging device incorporating the circuit of FIG. 1, and FIG.
FIG. 4 is a block diagram of a conventional solid-state imaging device, and FIG. 4 is an explanatory diagram showing a relationship between an original signal and a contour signal from which a contour signal and noise are removed. 1 is a sign bit discriminating circuit, 2 and 7 are inverting circuits, 3 and 8 are adding circuits, 4 and 9 are switch circuits, and 11 is a table converting circuit.

Claims (1)

(57) [Claims] 1. A method for processing a digital signal indicating a negative value by a two's complement, wherein when the input digital signal is negative, a signal obtained by inverting the input digital signal and adding 1 is obtained. Is converted by a table conversion circuit into a non-linear signal, inverted again, and then added, and when the input digital signal is positive, the non-linear conversion is performed by the table conversion circuit.