JP2891426B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention has a package of a semiconductor device, specifically, a QFP, SOP, SOJ, a lead chip carrier, etc.
The present invention relates to an improvement of a semiconductor device having a package of a multi-pin, high-speed, high-heat, low-cost integrated circuit such as a microcomputer and a microcomputer.

(Prior Art and Its Technical Issues) In recent years, with the increase in the scale of integrated circuits, the number of signals has been remarkably increased, and it has become necessary to satisfy the required characteristics of high-speed signal processing and high heat dissipation. On the other hand, it is necessary to meet these demands at low cost,
Molded with a plastic resin such as epoxy for the lead frame, especially in a 0.5mm surface mount package
QFP, SOP, SOJ, lead chip carrier, etc. are considered as effective packages.

It is said that 0.5mm lead pitch is the limit of surface mounting soldering (Nikkei Electronics, December 1988
Monthly publications P145-158).

Assuming a 0.5 mm pitch, it is necessary to increase the side length of the package body as well as increase the number of pins, resulting in a larger package. This increases the wiring length in the package and hinders high-speed signal processing.

It is a serious problem for an integrated circuit that needs to be processed at a higher speed than in the past to have a package with reduced electrical characteristics. On the other hand, the power consumption of integrated circuits has also been reduced from 1W or less to 2-5W class, and is being developed to 6-25W class. ,
Although it may be as small as 0.35 mm and 0.3 mm, the progress of multi-pin is also rapid, and it is clear that high-speed signal processing and high-efficiency heat dissipation are the major tasks imposed on the package.

For this purpose, various measures have recently been considered. US
In the specification of P. 4680613, there is a proposal to provide a multi-layer lead structure by providing a ground plane below a lead frame wiring layer in order to prevent noise generation due to fluctuations in ground potential in package wiring.

In addition, US Pat. No. 4,835,120 proposes a three-layer lead frame structure in which a power plane is added to improve fluctuations in power supply potential in addition to ground potential.

The heat dissipation structure is described in JP-A-63-73541 and JP-A-59-283.
No. 64 and No. 48-22548 propose a two-layer structure in which a heat block is inserted under a lead frame. This deformation is described in Nikkei Microdevices November 1988, pages 74-75.
And point out that heat dissipation of 2 to 3.5 W is possible without any special consideration after mounting on a printed circuit board.

There is another problem in increasing the number of pins. The electrodes of the semiconductor chip are taken out from the periphery, but the chip size is small. When trying to ground a multi-pin electrode, the pitch between the electrodes becomes narrower, and the limit pitch for connection by normal gold wire ball bonding (130 μm pitch at φ32 μm) Smaller.

Also, the tip pitch of the inner leads facing the chip electrodes must be reduced. For the former, bonding using a tape carrier has been proposed. For example, JP-A-60-241241 and JP-A-61-95539 are examples thereof,
Japanese Patent Application Laid-Open No.
There is 61-242051. Japanese Patent Application Laid-Open No. 58-122765 discloses an example in which fine processing is achieved by using an insulating substrate in which the internal wiring of a lead frame is metallized.

Each of the known examples introduced above is based on the premise that a molded package is used.

The resin mold package can achieve cost reduction by a simple structure in which a chip is mounted on a single-layer lead frame and completed through a molding process. Along with the increase in the number of pins of the corn, distortion in the resin mold increases due to an increase in size, and a great deal of improvement is required in selecting a structure or resin that absorbs the distortion and in optimizing the process, resulting in an increase in cost. Further, the multi-layer structure and the heat dissipation structure as described above further complicate this problem and increase the cost of manufacturing the structure. The simplicity of the structural process, which was an advantage, is no longer there. As a countermeasure, various types of resin potting type structures have been devised. For example, IMC1986 Proceedings, Kob
e May 28-30, P186-193), Electronic Materials, September 1988, P
59-64, Nikkei Microdevices September 1989, pages 68-70, and JP-A-55-95348, all of which have the potential to easily form a multilayer structure, but each of which has disadvantages. An example of IMC1986 is a ceramic substrate,
Generally, the dielectric constant is twice or more higher than that of the resin, and is not suitable as a high-speed wiring structure material. In addition, it is necessary to use expensive silicon carbide or aluminum nitride to take a heat dissipation structure. In the case of electronic materials, 1988.9, the chip is attached to a material based on a printed circuit board.Multilayering is easy, and the heat dissipation structure has many advantages such as preparing a printed circuit board with a copper heat sink. The application of pitched lead-in / out leads is a technically unfinished field and is used in areas with relatively few pins in the form of connecting leads to large area electrodes. The example of Nikkei Micro Device 1989.4, P68-70 is based on a tape carrier and has a potted type structure suitable for multi-pin as a tape carrier package. However, multilayering in the tape carrier technology (TAB) has not been technically established. TAB with 200-pin derived input
Is the same unit price as the lead frame, but is tripled for two layers and three times
It is expected that the cost will be five times higher for each layer, and the unestablishment of technology is causing high costs. As described above, there are various disadvantages in miniaturization of the wiring pitch around the chip, and no good package has been proposed with the increase in the number of pins, the speed, and the power consumption.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a semiconductor device capable of high-speed signal propagation and having high heat dissipation capability at a low cost by solving the above-mentioned conventional problems.

(Means for Solving the Problems) The semiconductor device of the present invention has a package structure in which a heat diffusion plate on which a semiconductor chip is mounted is provided on one surface of a wiring structure, and a resin mold portion is provided on the other surface. The basic configuration is such that a plurality of depressions are provided in the resin mold portion.

In the basic configuration, a through hole is formed through the wiring structure and the heat diffusion plate, and the through hole is in open communication with the recess. In the configuration, the through hole is filled and sealed with a molding material (Claim 2). In the constitution according to Claim 3, the molding material further penetrates the wiring structure and the heat diffusion plate, and is formed in the depression. It is characterized by having a through hole that does not open and having the through hole filled with a mold material (claim 3).

(Function) According to the present invention, since the semiconductor chip is directly mounted on the heat diffusion plate in the basic configuration, a high-output semiconductor chip can be mounted and the wiring structure can be arranged in a multilayer wiring structure. Therefore, a wiring structure suitable for high-speed signal propagation is prepared.

The above-described basic configuration is a structure in which the mold portion is not formed only on one surface side of the wiring structure, and a stress imbalance occurs in the wiring structure, and warpage or peeling of the wiring structure from the molding material (resin) occurs. However, the problem can be solved by the depression of the mold part.

Further, by filling and sealing the through-hole penetrating the wiring structure and the heat diffusion plate with the molding material, the bonding strength between the wiring structure and the molding portion is increased by increasing the anchoring effect of the molding material and the bonding area.

Furthermore, due to rapid heating of the solder reflow during surface mounting, moisture in the resin is turned into steam at the interface between the semiconductor chip and the resin, and at the interface between the wiring structure and the resin, which causes a problem of resin cracking. Through holes
A route through which the moisture of the resin and the wiring structure is diffused and released is obtained, and the release of the moisture through the route can prevent the occurrence of the resin crack.

(Embodiment) An embodiment of the present invention will be described with reference to the drawings. In FIG. 1 and FIG. 2, a semiconductor chip 1 is thermally conductive to a heat diffusion plate 3 made of copper or a copper-based alloy having good thermal conductivity and low cost. Bonded with adhesive 19 considering the degree. The printed wiring board 2 made of a triazine, polyimide or maleimide material is bonded to the heat diffusion plate 3 with an adhesive 17 in advance. Also,
External lead-in / out lead frame 4 or a metal brazing material or solder material 11 is previously joined to electrodes on the outer peripheral portion of the wiring board. Further, through holes 7 and 8 penetrating the heat diffusion plate 3 and the wiring board 2 are formed in advance. After the chip 1 is mounted, the electrodes of the chip 1 and the wiring board 2 are connected by an appropriate bonding means, for example, a wire bonding 9.

Thereafter, the assembly structure is put into the mold 20 (FIG. 3). Ejector pin provided on the tip side of mold 20
23 is designed to be the male type of the recess 6 after molding. This mold is molded with a modified silicone epoxy containing a silica glass sphere filler to form a mold portion 5.
The resin is not filled in the through hole 7 by the ejector pins 23 of the upper mold 21 and the lower mold 22. However, resin is filled in the through holes 8 to which the ejector pins 23 are not pressed.
The arrangement of the through holes 7, 8 will be better understood from FIG. The positions of the depressions 6 and the through holes 7 and 8 are merely examples, and the size, number, and location can be changed as appropriate.

Then, a tie bar portion (not shown) of the lead frame 4
Is cut and press-formed into a shape as shown in FIG. Of course, the unmolded portion of the lead 4 is subjected to a surface treatment suitable for soldering, and the inner bonding portion is, of course, subjected to a surface treatment suitable for bonding.

FIG. 4 shows a second embodiment. This is an example in which the ejector pins 33 of the mold 30 do not abut against the wiring board 2 as shown in FIG. 3, but are molded with a gap therebetween (FIG. 5).
Figure). It is characterized in that the through holes 7 'are filled with resin.

FIG. 6 is a partially enlarged cross-sectional view showing a modification of the mounting structure of the lead frame 4 'in which the wiring board 2' has a multilayer structure. The layers 14 are bonded together. Where 18
Is a solder resist. The sixth also describes an example of a method of reinforcing the connection of the lead 4 'to the wiring board 2'. Through hole 1 at the junction between the electrode part of the wiring board and the lead
5 and 16, which are filled with a brazing or solder material 11 '.

Thus, according to the above embodiment, the chip 1 is
Is transmitted, and the surface of the heat diffusion plate is exposed, and the heat can be released from the surface to the next cooling means.
As the next cooling structure, aluminum fins, water cooling, liquid cooling heat sink contact, heat pipe contact, simple air flow, and any other cooling means can be taken, so that the package has a low thermal resistance.

Needless to say, the wiring board 2 'has a multilayer structure, and can provide wiring with good electrical characteristics. This board is a so-called printed board made of organic resin containing glass fiber,
A flexible substrate, a TAB substrate, or a ceramic substrate may be used. The recess 6 and the through hole 7 in FIG. 1 constitute a path for releasing the moisture absorption of the wiring board 2 and the moisture absorption of the mold resin 5. It is more effective than the one without the depression 6 'in FIG.

It can be understood that the recesses 6 and 6 'in FIGS. 1 and 4 can alleviate the thermal and mechanical mismatch between the heat diffusion plate 3, the wiring board 2 and the mold resin 5 by the space. More areas may be drilled if desired. Note that the wiring 10 is exposed in the case of FIG. 1, so that the solder resist 18 is protected. Needless to say, the through holes 7 and 8 do not cut the wiring 10 (including the inner layer).

It will be easily understood that the through holes 8 and 7 'filled with the mold resin provide a means for firmly joining and integrating the wiring board 2 and the mold resin 5 by a mechanical anchor effect.

The recess 6 "in FIG. 4 does not break the chip because there is a gap between the ejector pin 33 of the mold 30 and the chip 1, but it is found to be effective in relieving the mismatching stress of the chip and releasing the resin moisture. It goes without saying that each of the depressions and through holes can be combined in any combination and can be appropriately deleted and added as needed.

In addition, in the case of FIG. 3, there is an effect that the resin is pushed up to the surface of the heat diffusion plate 3 by pushing up the wiring board 2 with the ejector pins, and the resin is prevented from flowing around at the time of molding. Therefore, it is also possible to partially perform such a pin arrangement in FIG.

(Effects) The present invention provides a high-output semiconductor device capable of high-speed signal propagation by providing a multilayer wiring structure with a high heat dissipation effect by the above-described basic configuration and providing a recess in a mold portion. This can prevent the occurrence of stress imbalance and warpage of the wiring structure during molding, prevent separation of the wiring structure from the molding material, and increase the bonding strength.

By adopting the characteristic structure of claims 1 to 3, the bonding strength between the wiring structure and the mold portion is further increased, and the occurrence of cracks in the mold portion is prevented. Equipment can be provided.

[Brief description of the drawings]

1 is a cross-sectional view of the semiconductor device of the present invention, FIG. 2 is a partially cutaway bottom view, FIG. 3 is a cross-sectional view showing a molding process,
FIG. 4 is a cross-sectional front view of the second embodiment, FIG. 5 is a cross-sectional view of the molding step, and FIG. 6 is a partially enlarged cross-sectional view showing a modification of the wiring structure and the lead frame mounting structure. In the figure, 1 ... semiconductor chip, 2,2 '... wiring board, 3 ...
... heat diffusion plate, 4 ... lead frame, 5 ... molded part (resin), 6, 6'6 "... recess 7,7'8" ... through hole

──────────────────────────────────────────────────続 き Continuation of the front page (56) References Japanese Utility Model Showa 60-33449 (JP, U) Japanese Utility Model Showa 62-131449 (JP, U) Japanese Utility Model Showa 53-66171 (JP, U) (58) Survey Field (Int.Cl. ⁶ , DB name) H01L 23 / 28,23 / 36

Claims (3)

(57) [Claims] 1. A package structure in which a heat diffusion plate having a semiconductor chip mounted thereon is provided on one surface of a wiring structure and a resin mold portion is provided on the other surface, and a plurality of recesses are formed in the resin mold portion. In a semiconductor device, a through hole penetrating a wiring structure and a heat diffusion plate is formed, and the through hole is opened in the recess. 2. The semiconductor device according to claim 1, wherein a mold material of the same quality as the mold material of the mold portion is filled and sealed in said through hole. 3. The molding material according to claim 2, further comprising a through hole penetrating through the wiring structure and the heat diffusion plate and not opening in the recess. A semiconductor device characterized by being filled with: