JP2890156B2 - Automatic gain adjustment circuit in optical playback device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic gain adjusting circuit in an optical reproducing apparatus. More specifically, with an automatic gain control circuit A drain <br/> scan information (ID signal) for reproduction
The present invention relates to an automatic gain adjustment circuit for reproducing recorded information (MO signal) which constitutes a data reproduction circuit . The present invention relates to an automatic gain adjustment circuit for a data reproduction circuit built in an optical recording / reproduction device such as a magneto-optical disk. Applied to adjustment circuits.

[0002]

2. Description of the Related Art FIG. 4 is a block diagram of a data reproducing circuit in a conventional optical recording / reproducing apparatus.

In FIG. 1, reference numeral 1 denotes an optical pickup for picking up an optical signal from a magneto-optical disk and performing photoelectric conversion;
Is an AGC (Automatic Gain Control) amplifier, 3 is a low-pass filter for extracting a signal component, 4 is a differentiator for detecting a peak position of the reproduced signal by differentiating the reproduced signal passed through the filter 3, and 5 is a reproduced signal. A comparator that generates a gate signal by extracting a portion where the amplitude value is equal to or higher than a predetermined level
Reference numeral 6 denotes a gate circuit that passes a signal from the differentiator 4 based on a gate signal from the comparator 5 to remove high-frequency noise components included in the differential output and extract only original data. Further, 7 is a rectifier for converting the amplitude value of the reproduced signal from the filter 3 to the DC voltage V _DC, 8 compares the AGCSET is a target value of the amplitude is set from the DC voltage V _DC and the outside of the rectifier 7 , DC voltage V _DC
When the larger of the outputs "H" level as the gain control signal S _G for AGC amplifier 2, when towards the DC voltage is small is AGC comparator outputs "L" level. S _H is a hold signal supplied to the AGC amplifier 2.

Since the signal amplitude of the reproduced signal output from the optical pickup 1 fluctuates depending on the recording state of the magneto-optical disk, changes in the reflectivity and laser power, the input signal amplitude of the differentiator 4 and the comparator 5 is reduced. An automatic gain adjustment circuit (AGC circuit) for stabilization is required. In FIG. 4, AGC amplifier 2, rectifier 7 and AGC
The comparator 8 forms an automatic gain adjustment circuit.

FIG. 5 is a block circuit diagram showing details of a portion related to gain control of the AGC amplifier 2 in FIG.
2a is a variable gain amplifier circuit, J1 is a constant current power supply, Tr
1 is a gain control signal S from the AGC comparator 8
A gain control transistor that is ON / OFF controlled by _G (“H” or “L”), R1 is a charging resistor, C1
Is a capacitor for gain control, R2 is a resistor for discharge, SW1
Is a control voltage holding switch.

A gain control capacitor C1 to be charged and discharged
Is connected to the gain control terminal of the variable gain amplifier circuit 2a, and the gain of the variable gain amplifier circuit 2a is controlled by the gain control voltage Vc appearing at the positive terminal. Control voltage holding switch SW1 is ON / OFF controlled by a hold signal S _H from the main control section (not shown). The control section includes a variable gain amplifier circuit 2a
Should be made to respond to the amplitude value of the reproduced signal output from the filter 3, ie,
And it outputs an ON signal as a hold signal S _H when there is to be reproduced data to close the control voltage holding switch SW1, the hold when no data to be reproduced in order to hold the gain control voltage Vc to the predetermined value and it outputs the OFF signal as the signal S _H control voltage holding switch SW1
Is configured to be opened.

FIG. 6 is a gain characteristic diagram for the variable gain amplifier circuit 2a. When the gain control voltage Vc increases as indicated by an arrow a, the gain of the gain variable amplifier circuit 2a decreases as indicated by an arrow a '. Conversely, when the gain control voltage Vc decreases as indicated by an arrow b, the gain decreases as indicated by an arrow b'. The characteristic is such that it becomes higher.

Next, the operation will be described. In this description, it is assumed that there is data to be reproduced and the control voltage holding switch SW1 is in a closed state.

The optical pickup 1 photoelectrically converts the light into an AGC signal.
When the amplitude value of the reproduced signal amplified by the amplifier 2 and the signal component of which is extracted by the filter 3 is larger than the target value, the DC voltage _VDC from the rectifier 7 is larger than the AGCSET. "H" level is output as _G. Then, the gain control transistor Tr1 is turned on, and the current from the constant current power supply J1 charges the gain control capacitor C1 via the gain control transistor Tr1 and the charging resistor R1, thereby increasing the gain control voltage Vc. When the gain control voltage Vc increases, the gain of the variable gain amplifier circuit 2a decreases linearly as can be seen from the characteristic diagram of FIG.

As a result, the amplitude value of the reproduced signal decreases and approaches the target value.

[0011] Contrary to the above, if the amplitude value of the reproduced signal from the filter 3 is smaller than the target value, AGC comparator 8 outputs "L" level as the gain control signal S _G.

Then, the gain control transistor Tr1 is turned off, and the gain control capacitor C1 is no longer charged from the constant current power supply J1. Instead, the gain control capacitor C1 is supplied via the discharge resistor R2 and the control voltage holding switch SW1. , And the gain control voltage Vc is decreased. When the gain control voltage Vc decreases, the gain of the variable gain amplifier circuit 2a increases linearly. As a result, the amplitude value of the reproduction signal increases and approaches the target value.

The information picked up from the magneto-optical disk by the optical pickup 1 includes address information (ID signal) and recorded information (MO signal). This I
Since the D signal and the MO signal have different recording methods, a large difference occurs in the output amplitude of the optical pickup 1. If a single common automatic gain adjustment circuit is used for the ID signal and the MO signal, a circuit for adjusting the amplitude of the ID signal and the MO signal is required.

However, as a simpler measure, I
It is conceivable to provide an automatic gain adjustment circuit for D signal reproduction and an automatic gain adjustment circuit for MO signal reproduction separately,
Actually, there are many optical recording / reproducing apparatuses of the type provided with these two automatic gain adjustment circuits. That is, the automatic gain adjustment circuit having the configuration surrounded by the one-dot chain line in FIG. 5 is for MO signal reproduction , and the automatic gain adjustment circuit for MO signal reproduction is
Provided together with an automatic gain adjustment circuit for ID signal reproduction
That make up the data reproduction circuit by.

The automatic gain adjustment circuit for reproducing the ID signal is not shown. In the automatic gain adjustment circuit for reproducing the ID signal, the control voltage holding switch SW1 is not required because it is not necessary.

The reason why the control voltage holding switch SW1 is provided in the automatic gain adjustment circuit for reproducing the MO signal is as follows. In the data unrecorded area during the MO signal period, the state where no reproduction signal is input continues. Then, a low DC voltage V _DC from the rectifier 7, because the AGC comparator 8 continues to output the "L" level as the gain control signal S _G, the gain control transistor Tr1 OF
The F state is maintained and the gain control capacitor C1 is not charged. In such a case, temporarily
There is no control voltage holding switch SW1 and the discharging resistor R2
Is directly grounded, the discharge from the gain control capacitor C1 continues, and the gain control voltage Vc continuously drops. As a result, the gain of the variable gain amplifier circuit 2a continuously increases, reaches the maximum value, and saturates. Next, when the MO signal of the data recording area is input in the gain saturated state, the reproduced signal is distorted or a reproduction error occurs because the gain is the maximum value.

In order to prevent the above inconvenience, the MO
In the automatic gain adjustment circuit for signal reproduction, a control voltage holding switch SW1 is provided. When the MO signal is detected to be a data unrecorded area is opened the control voltage holding switch SW1 and outputs the OFF signal as a hold signal S _H. Then, the discharge from the gain control capacitor C1 via the discharge resistor R2 is stopped, the gain control voltage Vc is held at the level immediately before the switch is opened, and the gain of the variable gain amplifier circuit 2a is also held at the current gain. Is done. In the data unrecorded area, the gain control transistor Tr1 is not turned on, and the gain control capacitor C1 is not charged.

On the other hand, since the ID signal (address information) is recorded on the magneto-optical disk at specified regular intervals,
There is no possibility that the reproduced signal is not continuously input. That is, it is always input at regular intervals. Therefore, in the automatic gain adjustment circuit for reproducing the address information (ID signal), the discharge and the charge are always repeated, and the control voltage holding switch SW
There is no need to provide one.

[0019]

SUMMARY OF THE INVENTION MO signal (recorded information)
In the automatic gain adjustment circuit for reproduction, when the state in which the reproduction signal is not input due to the data unrecorded area continues, the gain control voltage Vc is set to the voltage immediately before the opening by opening the control voltage holding switch SW1. Hold is performed to prevent the gain of the variable gain amplifier circuit 2a from being saturated.

However, even if the control voltage holding switch SW1 is opened in this manner, even spontaneous discharge cannot be prevented. When the gain control capacitor C1 discharges spontaneously, the gain control voltage Vc gradually decreases, and the gain of the variable gain amplifier circuit 2a increases. As the gain control voltage Vc held immediately after the control voltage holding switch SW1 is opened is lower and the period of the data non-recording area is longer, the gain increase due to the spontaneous discharge is larger. Therefore, if the gain approaches the maximum value or is saturated when the next MO signal in the data recording area is input, the circuit is saturated at the beginning of the MO signal, and the reproduced signal is still distorted. There was a risk that a reproduction error would occur.

Therefore, as a next countermeasure, it is conceivable to add a memory circuit so that the memory circuit retains the data value of the gain control voltage Vc over the period of the data unrecorded area. Then, it is not affected by the natural discharge. Alternatively, the automatic gain adjustment circuit is designed and redesigned so that the response speed is sufficiently high so that the next time an MO signal is input, the gain becomes a steady-state gain quickly, and a period during which saturation or distortion occurs. Can be considered as short as possible.

However, in the case of a countermeasure for adding a memory circuit, a control circuit for the memory circuit is required in addition to the memory circuit, and a function of determining whether or not an MO signal is input is also required. There is a drawback that it becomes. In the case of a measure to increase the response speed, the automatic gain adjustment circuit also responds to a change in signal amplitude caused by a scratch or noise on the disk, which causes a data reproduction error.

The present invention has been made in view of such circumstances, and has a very complicated structure for an automatic gain adjustment circuit for reproducing an MO signal, which solves the problem of gain saturation caused by an unrecorded area. The purpose is to solve the problem without making it.

[0024]

Automatic gain control circuit in the first optical reproducing apparatus according to the present invention SUMMARY OF THE INVENTION may, address information (ID signal) provided with an automatic gain control circuit for reproduction
Recording information (MO signal) that constitutes the data reproduction circuit
An automatic gain adjustment circuit for reproduction, comprising: means for raising and lowering a gain control voltage for the variable gain amplifier circuit according to a magnitude relationship between an output side level of the variable gain amplifier circuit and a target value; and Means for forcibly shifting and holding the gain control voltage to a specified value.

Further, the automatic gain control circuit in the second optical reproducing apparatus according to the present invention, address information (ID signal) is provided with an automatic gain control circuit for reproducing data
An automatic gain adjustment circuit for reproducing recorded information (MO signal) that constitutes a data reproduction circuit, wherein the variable gain amplifier is adapted to correspond to a magnitude relation between an output side level of a variable gain amplifier circuit and a target value. Means for raising and lowering a gain control voltage for a circuit; means for forcibly shifting and holding the gain control voltage to a specified value having a higher gain than a middle point of a normal operation range during an address information reproducing period; In the reproduction period, means is provided for causing a high-speed response of the gain control voltage in the gain-down direction and a low-speed response in the gain-up direction.

[0026]

The address information (ID signal) is always input at a constant period unlike the recording information (MO signal). Therefore, if the gain control voltage is forcibly shifted and held at the specified value every time the address information reproducing period starts, as in the first automatic gain adjusting circuit for reproducing the recorded information, the gain of the variable gain amplifier circuit becomes longer. Automatically adjusts the gain for reproducing address information (ID signal) even if the state where the reproduction signal is not input due to the data unrecorded area continues and spontaneous discharge continues. Similarly to the circuit, in the automatic gain adjustment circuit for recording information (MO signal) reproduction, the gain of the variable gain amplifier circuit is prevented from being excessively increased and saturated.

VF which is the head of recording information (MO signal)
The O portion (information recording a prescribed frequency for adjusting the reference clock) has the highest frequency and a slightly smaller amplitude than the data portion. When the input of the recording information (MO signal) is restarted, the automatic gain adjustment is restarted from the VFO unit having a smaller amplitude. According to the second automatic gain adjustment circuit for recording information reproduction, since the specified value of the gain control voltage to be forcibly shifted and held is set to the side where the gain is higher than the middle point of the normal operation range, the automatic gain adjustment is restarted. Even if the amplitude of the VFO unit is small, the reproduction of the VFO unit is ensured.

In most cases, in the actual operation, the gain is reduced in the VFO section to return to the steady state. However, in the gain down direction, the gain control voltage is made to respond at high speed. Although the gain is set higher than the middle point of the operation range, the automatic gain adjustment operation can be promptly returned to the steady state in the initial portion of the VFO unit. In addition, since the gain control voltage is configured to respond slowly in the gain-up direction, the gain is excessively increased even if the state where the reproduction signal is not input due to the unrecorded area continues and the spontaneous discharge continues. And saturation are alleviated.

[0029]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of an automatic gain adjusting circuit in an optical reproducing apparatus according to the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a block circuit diagram showing an automatic gain adjusting circuit for reproducing recorded information (MO signal) in a data reproducing circuit in an optical recording / reproducing apparatus (magneto-optical disk apparatus) according to the embodiment. Note that an automatic gay
Provided together with an adjustment circuit to form a data recovery circuit
Automatic gain adjustment circuit for reproducing address information (ID signal)
Is omitted from illustration.

An optical pickup 1 picks up an optical signal from a magneto-optical disk (not shown) and performs photoelectric conversion on the optical signal.
A GC (automatic gain control) amplifier 2 is connected, a low-pass filter 3 for extracting a signal component is connected to the next stage of the AGC amplifier 2, and an output terminal of the filter 3 is input to a differentiator 4, a comparator 5, and a rectifier 7. It is connected. The differentiator 4 detects the peak position of the reproduced signal by differentiating the reproduced signal that has passed through the filter 3. The comparator 5 extracts a portion of the reproduced signal whose amplitude value is equal to or higher than a predetermined level and converts the gate signal into a signal. The gate circuit 6 removes a high-frequency noise component included in a differential output by passing a signal from a differentiator 4 based on a gate signal from a comparator 5 and extracts only original data. .

The rectifier 7 converts the amplitude of the reproduced signal from the filter 3 into a DC voltage _VDC and outputs the DC voltage to the AGC comparator 8. The AGC comparator 8
DC voltage V _DC from rectifier 7 is compared with AGCSET which is a target value of the amplitude set from outside, and DC voltage V DC
When towards _DC is larger outputs "H" level as the gain control signal S _G for AGC amplifier 2, DC voltage V _DC
When the value is smaller, an "L" level is output.

The AGC amplifier 2 is configured as follows. A variable gain amplifier circuit 2a is connected between the optical pickup 1 and the filter 3. NPN that is ON / OFF controlled by inputting gain control signal S _G (“H” or “L”) from AGC comparator 8 as a base
The gain control transistor Tr1 has a collector connected to the constant current power supply J1 and an emitter connected to the charging resistor R1.
Is connected to the gain control capacitor C1 via the. The positive terminal of the gain control capacitor C1 is connected to the gain control terminal of the variable gain amplifier circuit 2a, and the gain of the variable gain amplifier circuit 2a is controlled by the gain control voltage Vc appearing at the positive terminal. The positive terminal of the gain control capacitor C1 is connected to a discharge resistor R2 and a control voltage holding switch S.
It is connected to the ground line via a series circuit of W1. Control voltage holding switch SW1, O by the hold signal S _H from the main control section (not shown)
N / OFF control is performed. Its control unit, ON the gain control voltage Vc to be applied to the variable gain amplifier circuit 2a when to be responsive to the amplitude value of the reproduced signal outputted from the filter 3, i.e., as a hold signal S _H when there is to be reproduced data signal outputs by closing the control voltage holding switch SW1 and a control voltage holding and outputs the OFF signal to hold the gain control voltage Vc to the predetermined value as a hold signal S _H when there is no data to be reproduced The switch SW1 is configured to be opened.

The above configuration is the same as that of the conventional example (FIGS. 4 and 5), but in this embodiment, the following circuit elements are added in addition to the above configuration. That is, as shown in FIG. 2, as a means for forcibly shifting and holding the gain control voltage Vc to the specified voltage Vr during the reproduction period of the address information (ID signal), the DC constant voltage for outputting the specified voltage Vr is used. A power supply 9, a PNP-type control voltage shift holding transistor Tr2 having an emitter connected to the DC constant voltage power supply 9 and a collector connected to the positive terminal of the gain control capacitor C1, and a control voltage shift holding transistor Tr2; Control signal Sc for base
Is provided. The control circuit 10 determines whether the currently reproduced signal is an ID signal (address information) or an MO signal (recording information),
In the case of an ID signal, an "L" level is output as a control signal Sc to turn on the control voltage shift holding transistor Tr2, and in the case of an MO signal, an "H" level is output as a control signal Sc to turn off the transistor Tr2. It is configured as follows.

FIG. 3 is a gain characteristic diagram of the variable gain amplifier circuit 2a. The horizontal axis indicates the gain control voltage Vc output from the gain control capacitor C1, and the vertical axis indicates the gain. The gain has a linear characteristic that the gain decreases when the gain control voltage Vc increases, and increases when the gain control voltage Vc decreases. An
Is the gain control voltage V for the variable gain amplifier circuit 2a.
c shows a normal operation range. Regarding the specified voltage Vr output from the DC constant voltage power supply 9, in the case of the first aspect of the present invention, the specified voltage Vr may be anywhere within the normal operation range An.

On the other hand, in the case of the second aspect of the present invention, as shown in FIG.
It is set on the side lower than the middle point V _{O of} n, that is, on the side of higher gain in terms of gain. Further, in the second invention, during the reproduction period of the MO signal (recorded information), the gain control voltage Vc is made to respond quickly in the gain down direction as shown by the arrow P in FIG. As shown, the gain control voltage Vc is configured to respond slowly.

The response speed of the gain control voltage Vc is determined by the constant current power supply J1, the gain control capacitor C1, and the discharge resistor R.
2 is determined by each value. Fig. 3 Gain down direction
As is clear from FIG. 5, the direction of increasing the gain control voltage Vc is related to the charging speed of the gain control capacitor C1. The gain-up direction is a direction in which the gain control voltage Vc decreases, which is related to the discharge speed from the gain control capacitor C1. To increase the charging speed in the gain-down direction, the capacity of the gain control capacitor C1 may be set small. To decrease the discharge speed in the gain-up direction, the resistance value of the discharge resistor R2 may be set to a large value. According to the second aspect of the invention, the gain control voltage Vc is set as the high-speed response P in the gain-down direction and the low-speed response Q in the gain-up direction by setting as described above.

FIG. 1 shows a portion related to an automatic gain adjustment circuit for reproducing recorded information (MO signal). Although illustration is omitted, actually, other than this, the address information (I
An automatic gain adjustment circuit for (D signal) reproduction is provided. The configuration is such that the control voltage holding switch SW1 does not exist,
The configuration is the same as that of the illustrated automatic gain adjustment circuit for reproducing the MO signal, except that the DC constant voltage power supply 9, the control voltage shift holding transistor Tr2, and the control circuit 10 are not provided.

Hereinafter, an automatic gain adjustment circuit in the optical recording / reproducing apparatus configured as described above , that is, not shown.
Automatic gain for reproducing address information (ID signal)
Note that the data reproduction circuit is provided together with the adjustment circuit.
The operation of the automatic gain adjustment circuit for reproducing recorded information (MO signal) will be described.

First, a general operation will be described. A recording signal of a magneto-optical disk is picked up as an optical signal by an optical pickup 1, photoelectrically converted, amplified by an AGC amplifier 2 with its gain adjusted, and filtered. Extracts the signal component.

[0041] When the amplitude of the reproduced signal is larger than the target value, DC voltage V _DC rectifier 7 is larger than AGCSET, AGC comparator 8 for outputting the "H" level as the gain control signal, the gain control The transistor Tr1 is turned on, and the current from the constant current power supply J1 charges the gain control capacitor C1 via the gain control transistor Tr1 and the charging resistor R1, thereby increasing the gain control voltage Vc. When the gain control voltage Vc increases, the gain of the variable gain amplifier circuit 2a decreases linearly as can be seen from the characteristic diagram of FIG. As a result, the amplitude value of the reproduced signal decreases and approaches the target value.

Conversely, when the amplitude value of the reproduction signal from the filter 3 is smaller than the target value, the AGC comparator 8 outputs the "L" level as the gain control signal, and the gain control transistor Tr1 is turned off. Then, the charging of the gain control capacitor C1 from the constant current power supply J1 is stopped. Instead, discharging is performed from the gain control capacitor C1 via the discharge resistor R2 and the control voltage holding switch SW1, and the gain control voltage Vc is reduced. When the gain control voltage Vc decreases, the gain of the variable gain amplifier circuit 2a increases linearly. As a result, the amplitude value of the reproduction signal increases and approaches the target value.

The above operation has been described with reference to the MO signal (recording information).
In the state where the reproduction signal of the data recording area is being input.

Next, the operation according to the essence of the present invention will be described.

Assuming that the reproduced signal is in the state of the MO signal (recorded information), the control circuit 10 outputs the "H" level as the control signal Sc, and the control voltage shift holding transistor Tr2 is turned off.
In state. Order to respond to the amplitude value of the reproduced signal, ON signal is output as a hold signal S _H, the control voltage holding switch SW1 is in the closed state. The general operation described above is for such a state.

Next, the reproduced signal is an MO signal (recorded information).
Is switched to an ID signal (address information).
The ID signal is always input at a constant cycle.
When detecting the switch to the ID signal, the control circuit 10 switches to the state of outputting the “L” level as the control signal Sc, and inverts the control voltage shift holding transistor Tr2 to the ON state. Also opens the control voltage holding switch SW1 as a hold signal S _H OFF signal is output. By turning on the control voltage shift holding transistor Tr2, the positive terminal of the gain control capacitor C1 is connected to the DC constant voltage power supply 9 having the specified voltage Vr, and the gain control voltage Vc is forcibly set to the specified voltage Vr. Is shifted to and held.

It is assumed that during the period of the MO signal before switching to the ID signal, the state in which the reproduced signal is not input because the MO signal is an unrecorded area has continued.
Then, although the charge of the gain control capacitor C1 is prevented from being discharged by the opening of the control voltage holding switch SW1 at the time of switching to the ID signal, a drop of the gain control voltage Vc due to spontaneous discharge occurs. , The gain of the variable gain amplifier circuit 2a increases. If the degree of drop of the gain control voltage Vc is large, the gain will be saturated.

However, in the case of the present embodiment, the control voltage shift holding transistor Tr2 is turned on as described above by utilizing the period of the ID signal input at regular intervals.
Then, the gain control voltage Vc is forcibly shifted to and held at the specified voltage Vr.
An excessive drop of c is prevented, and therefore, the gain of the variable gain amplifier circuit 2a is also prevented from being saturated. That is, the gain of the variable gain amplifier circuit 2a can be periodically returned to the specified value. Thereby, when the MO signal of the data recording area is input next time, it is possible to reliably prevent the reproduction signal from being distorted at the head portion and the reproduction error from occurring. As a configuration for exhibiting such a function, only a relatively simple improvement of adding the DC constant voltage power supply 9, the control voltage shift holding transistor Tr2 and the control circuit 10 is required.

Returning to FIG. 2, when the reproduced signal is M
It is assumed that the signal has been switched to the O signal. The beginning of the MO signal is VF
O section. The VFO section is information in which a prescribed frequency for adjusting the reference clock is recorded. The VFO section has the highest frequency, and has a slightly smaller amplitude than that of the subsequent data section as indicated by a ΔV drop. Thus, MO
When the input of the signal is restarted, the automatic gain adjustment is restarted from the VFO unit having a smaller amplitude.

As shown in FIG. 3, since the specified voltage Vr is set at a position lower than the middle point V _O of the normal operation range An and near the lower limit of the normal operation range An, the amplification gain for the VFO section is considerably increased. It is in the state of. Therefore, even if the amplitude of the VFO section is small, the VFO section can be reliably reproduced from the initial portion.

Since the specified voltage Vr is set close to the lower limit of the normal operation range An, when returning to the steady state by restarting the automatic gain adjustment for the VFO section, as shown in FIG. In the direction of decreasing the gain of the variable gain amplifier circuit 2a. As shown in FIG. 3, since the gain control voltage Vc is set to have a high-speed response P in the gain down direction (by reducing the capacity of the gain control capacitor C1), the specified voltage Vr is set to the normal operation. The gain control voltage Vc can be promptly returned to the steady state despite being set to be far away from the middle point V _{O of the} range An. Therefore, as shown by the circle m in FIG. 2, the VFO portion can be returned to the steady state from its initial portion promptly, and good reproduction can be performed without reproduction error.

On the other hand, setting the gain control voltage Vc so as to have a low-speed response Q in the gain-up direction has the following advantages. It is assumed that, as indicated by the two-dot chain line n in FIG. 2, during the reproduction of the MO signal, a data unrecorded area has entered and the gain control voltage Vc has started to drop due to spontaneous discharge. The drop of the gain control voltage Vc corresponds to the gain-up direction. At this time, since the response is the low-speed response Q (by increasing the resistance value of the discharging resistor R2), the drop of the gain control voltage Vc is made slow. In addition, it is possible to prevent the gain of the variable gain amplifier circuit 2a from excessively increasing or saturating, thereby preventing the occurrence of a data reproduction error due to a scratch or noise on the magneto-optical disk.

[0053]

The automatic gain adjusting circuit in the first optical reproducing apparatus according to the present invention , that is, the address information (ID)
Signal) provided together with an automatic gain adjustment circuit for reproduction.
For reproducing recorded information (MO signal) constituting a data reproduction circuit.
According to the automatic gain adjustment circuit , even if the state in which the reproduction signal is not input due to the data unrecorded area continues and the spontaneous discharge continues, the gain control voltage is set at regular intervals (every time the address information reproduction period is started). Is forcibly shifted to the specified value, and it is possible to prevent a problem that the gain of the variable gain amplifier circuit is excessively increased and is saturated. That is, it is possible to reliably prevent the reproduction signal from being distorted or causing a reproduction error at the head of the recording information (MO signal). Then, the configuration does not need to be complicated as in the case of adding a memory circuit, and can be realized by adding a relatively simple configuration.

According to the automatic gain adjusting circuit in the second optical reproducing apparatus according to the present invention, the specified value of the gain control voltage for forcibly holding the shift is set to a higher gain side than the middle point of the normal operation range. Therefore, when the automatic gain adjustment is restarted, it is possible to reliably reproduce the VFO section having a smaller amplitude. Nevertheless, since the gain control voltage is made to respond at high speed in the gain down direction, the automatic gain adjustment operation can be returned earlier in the initial portion of the VFO unit to return to the steady state. In addition, since the gain control voltage is configured to respond at a low speed in the gain-up direction, even if the state where the reproduction signal is not input due to the data unrecorded area continues and the spontaneous discharge continues, the gain may be excessively increased or increased. Saturation can be sufficiently suppressed, and the occurrence of a data reproduction error due to scratches or noise on the disk can be prevented.

[Brief description of the drawings]

FIG. 1 is a block circuit diagram showing an automatic gain adjustment circuit for reproducing recorded information (MO signal) of a data reproducing circuit in an optical recording / reproducing device (magneto-optical disk device) according to one embodiment of the present invention.

FIG. 2 is a waveform chart for explaining the operation of the embodiment.

FIG. 3 is a gain characteristic diagram of a variable gain amplifier circuit showing a set position of a prescribed voltage, a high-speed response in a gain-down direction, and a low-speed response in a gain-up direction in the embodiment.

FIG. 4 is a block diagram showing a data reproducing circuit of an optical recording / reproducing apparatus according to a conventional example.

FIG. 5 is a block circuit diagram showing details of a portion related to gain control of an AGC amplifier in a conventional example.

FIG. 6 is a gain characteristic diagram of the variable gain amplifier circuit.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Optical pick-up 2 ... AGC amplifier 2a ... Gain variable amplifier circuit 3 ... Low-pass filter 4 ... Differentiator 5 ... Comparator 6 ... Gate circuit 7 ... Rectifier 8 ... AGC comparator 9 ... DC setting Voltage power supply 10 Control circuit J1 Constant current power supply Tr1 Gain control transistor Tr2 Transistor for control voltage shift holding C1 Gain control capacitor R1 Charge resistor R2 Discharge resistor SW1 control voltage holding switch S _G ...... gain control signal S _H ...... hold signal Sc ...... control signal Vc ...... gain control voltage Vr ...... specified voltage MO ...... recording information ID ...... address information

Claims (2)

(57) [Claims] [Claim 1] address information (ID signal) Automatic for reproduction
Provided together with gain adjustment circuit to form data recovery circuit
An automatic gain adjustment circuit for reproducing recorded information (MO signal) to be reproduced , comprising: means for raising and lowering a gain control voltage for the variable gain amplifier circuit according to a magnitude relationship between an output side level of the variable gain amplifier circuit and a target value. Means for forcibly shifting and holding the gain control voltage to a specified value during an address information reproduction period, and an automatic gain adjustment circuit in the optical reproduction apparatus. 2. The method of claim 1] address information (ID signal) Automatic for reproduction
Provided together with gain adjustment circuit to form data recovery circuit
An automatic gain adjustment circuit for reproducing recorded information (MO signal) to be reproduced , comprising: means for raising and lowering a gain control voltage for the variable gain amplifier circuit according to a magnitude relationship between an output side level of the variable gain amplifier circuit and a target value. Means for forcibly shifting and holding the gain control voltage to a specified value having a higher gain than the middle point of the normal operation range during the address information reproduction period, and decreasing the gain control voltage during the recording information reproduction period. Means for making a high-speed response in the direction and a low-speed response in the gain-up direction.