JP2886859B2 - Image processing device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to image data read in correspondence with a document image.
And an image processing device for processing and converting the image data. [Prior Art] Process and convert read image corresponding to original image
A conventional image reading device has a micro computer,
This microcomputer performs the above processing and conversion. When
Rolling, but the processing speed of the micro computer is limited
There is a real-time editing process for each pixel
It was difficult to output the information at high speed. Therefore, the present applicant has disclosed in Japanese Patent Application Laid-Open No. 59-62885, etc.
Image processing equipment that enables high-speed, real-time image processing
Proposed. The devices disclosed in these applications employ the main scanning 1
Batch processing information for multiple lines of lines or main scanning
Preset to hardware and process corresponding to each pixel
Is performed by hardware. That is, the address of the change point of the processing condition in each editing process
The address of the change point and the address of the main scan
Is always compared by the comparator, and the result of this comparison matches
To perform the desired editing process when
You. However, in such an apparatus, a single main scanning
As the number of areas and types of processing increases, the number of change points increases,
The problem is that the number of comparators increases by the amount of change points.
is there. For example, for one main scan (5000 pixels)
Process, and find 10 change points in one type of process.
If so, 8 × 10 = 80 comparators and registers (13
Bit) and hardware circuits increase rapidly.
There is a problem of adding. [Purpose] The present invention has been made in view of the above points, and has
Data processing for multiple types of data
It is intended to be executable without causing
Is a line of image data representing each of a plurality of pixels.
Image data input means for inputting the image data
Each pixel of one line of image data input from the input means
Or use multiple image processing conditions for multiple consecutive pixels
The plurality of bits of the image editing data,
One or more lines of image data from input means
Means for forming image editing data for each input of
For each pixel or continuous pixels
Image editing that can store multi-bit image editing data
Data storage means, and the image editing data storage means
For one line formed by the image editing data forming means
Multiple pixels for each pixel or consecutive pixels of the image data
While writing several bits of image editing data,
For one line previously stored in the edit data storage means
Multiple pixels for each pixel or consecutive pixels of the image data
The image data input means,
Each pixel of one line of image data input from
Image editing data writing to read out for multiple consecutive pixels
Reading means, read from the image editing data storage means
Represented by each bit of multi-bit image editing data
According to the plurality of image processing conditions set, the image data is input.
Each pixel of one line of image data input from the input means
Or multiple types of image processing for continuous multiple pixels
To provide an image processing apparatus having image processing means for performing
And the image editing data storage means comprises:
Each pixel of the image data for the line or multiple consecutive pixels
That can store multi-bit image editing data for
Image editing data writing and reading means
Is the image editing data previously stored in one of the memory means.
Data reading and new image editing to the other memory means
Provide an image processing device that executes data writing in parallel
And the image processing means includes a plurality of
The data represented by each bit of the image editing data
Image data for one line according to each of the number of image processing conditions
Each pixel of the data or multiple consecutive pixels
Image processing apparatus having a plurality of conversion means for performing different image conversions
Is provided. Embodiment FIG. 1 is an external view of an image reading apparatus. This apparatus includes a document table 101, a document holder 102,
Approximately 5000 light-receiving elements arranged in a line
Line sensor CCD 103, document illuminating fluorescent lamp 104, and mirror
105, 106, and 107, and an imaging lens 108. Fluorescent light
First optical unit including 104 and mirror 105 and mirror 10
The second optical unit with 6,107 has a 2: 1 speed ratio.
The original is scanned in the Y direction by moving
The images are sequentially formed on the CCD 103. FIG. 2 is a diagram showing the overall rotation of the image reading apparatus shown in FIG.
It is a block diagram which shows a road structure. CCD103 (for example, Toshiba TCD106C, 5000 pixels)
Receives light from the original, and converts analog signals indicating the pixel density
Realistic output. This analog signal is an 8-bit A / D
8-bit digital signal for each pixel by the converter 201
The digital signal is sequentially converted to
This is corrected by the ringing correction circuit 20. The shading correction circuit 202 outputs light outside the document placing area.
Bring a science system and illuminate the white plate attached to it
Then, the data for one main scan when reading and scanning with the CCD 103 is
Accumulates in the memory, and based on this memory data, the actual
Add correction to image data. Shading corrected
The data is sent to the image recognition unit 204 and the editing circuit unit 203.
Can be In addition, buffer 205, main scan address generation
Circuit, CCD drive 206, buffer control circuit 207, CPU circuit section 20
8, an operation unit 209 is provided, and image data from the buffer 205 is provided.
The data is supplied to an external device such as the image recording unit 210. FIG. 3 shows a document placed on the platen 101 of the document reading apparatus.
FIG. From the reference coordinates SP of the platen 101 to the main scanning direction (the CCD 103
The sub-scanning direction (first and second optics)
When the unit movement direction is Y, the original image is read.
The optical unit is moved before
And point P1 (X, Y1), point P2 (X2, Y2), point P3 (X3, Y3),
The point P4 (X4, Y4) is detected by the image recognition unit 204. Manuscript
The image data in the area other than the area where the
The document cover 110 is mirror-finished so that
You. Main scan and sub-scan as if prescanning the entire glass surface
I do. FIG. 4 is a circuit diagram showing details of the image recognition unit 204.
You. The main scanning counter 351 is a down counter,
This shows the scanning position in one inspection line. This counter 35
1 is a horizontal synchronization signal HSYNC generated prior to each main scan.
Is set to the maximum value in the main scanning direction (X direction) by
Counts every time the image data clock CLK is input
Down, indicating the pixel position in the main scanning direction. The sub-scanning counter 352 is an up counter,
VSYNC (the image destination
Edge signal) is reset to "0" at the rise of HSYNC
Counts up by signal and scans in the sub-scanning direction.
Indicates the inspection position. During scanning, the shading correction circuit 202
After the shading correction, a comparator (not shown)
The binary image data VIDEO is shifted by 8 bits
Sent to register 301. At each scan, the CPU 208
Sets a predetermined fixed slice level
Data. When the 8-bit input is completed, the gate circuit 302
All of the 8-bit data in shift register 301
Check whether the image is a white image (0 level) representing the skin
Gate 302 outputs "1" if all images are white.
Power. First 8-bit continuous image after starting the prescanning of the original
Flip when all data is white (0 level)
The flop 304 is set. The flip flop 304 is
VSYNC (image leading signal output at the start of forward movement)
And have been reset in advance. After that, the next VSYNC will come
Maintain the set state until. The main scanning counter 351
The clock synchronized with the pixel output of the image data from the comparator
Counts down by clock CLK.
When the lip flop 304 is set, the
At this time, the value of the main scanning counter 351 is loaded. This value
Is the coordinate value of X1. The sub-scanning counter 352 is the same for scanning every line.
The expected signal is up-counted.
When the value of the sub-scanning counter 352 at the time when the
Is loaded into the latch 306. This value is Y1
It is a standard value. Therefore, the point P1 (X1, Y1) is found
You. Also, every time the gate 302 outputs “1”, the main scanning
The value from the counter 351 is loaded into the latch 307. At first
When all the continuous 8-bit image data is white
The value from the main scan counter 351 is loaded into the latch 307.
Then, this value and the latch 310 (this is the X direction at the time of VSYNC)
Data is set to the maximum value of the
Compared by 309. If the data of the latch 307 is small,
The output of data 309 is active,
The data of the switch 307 is loaded on the latch 310. Also this
When the value of the sub-scanning counter 352 is loaded into the latch 311
It is. In this operation, the next 8 bits are stored in the shift register 301.
It ends until it enters. Thus, the data comparison between the latch 307 and the latch 310 is performed.
When the processing is performed for all image areas, the original area X
The minimum value in the direction remains, and the coordinate in the Y direction at this time is
Remain in 311. That is, the main scanning counter 351
The coordinates corresponding to the minimum value in the X direction are
Represents coordinates farthest from SP in direction. This coordinate is the point P3
(X3, Y3). The flip-flop 312 is first set for each main scan line.
If image data representing a continuous white image of 8 bits appears
This is a flip-flop that is set when
8 consecutive bits reset by HSYNC
Set when the image data of all
Hold up to YNC. This flip flop 312 is set
The white signal position that first appeared in one line
The corresponding value of the main scanning counter 351 is loaded into the latch 313.
You. Then, the value of the latch 313 and the value of the
Parator 316 compares. Latch 315 generates VSYNC
The minimum value in the X direction, that is, “0” is preset.
Have been If the data of latch 315 is larger than the data of latch 313
If less or equal, the output of comparator 316
The signal becomes active and latch 313 data is latch 3
Loaded at 15. This operation is performed between HSYNC and HSYNC.
It is. When the above comparison operation is performed for all image areas, the latch
Reference numeral 315 denotes the maximum value of the document coordinates in the X direction, that is, the main scanning
The X coordinate of the white signal at the point closest to the scanning start point in the direction remains.
You. This is X2. Also, the output of comparator 316 is
When active, the value from sub-scan counter 352
Is loaded on the latch 318. This becomes Y2 and the point P2 (X
2, Y2) is obtained. Latches 319 and 320 are 8 bits in the entire image area.
Each time continuous white image data appears, the main scan at that time
The value of the counter 351 and the value of the sub-scanning counter 352 are loaded.
It is. Therefore, when prescanning of the original is completed,
Counter 35 when 8-bit color image data appears
The count values of 1,352 remain on the latches 319 and 320. this
Is a point P4 (X4, Y4). The above eight latches 308, 311, 320, 318, 305, 310, 31
5, 319 data lines are connected to the CPU 208 bus,
U208 reads this data at the end of the forward scan
No. As a result, the position and size of the original on the platen 101 can be adjusted.
judge. FIGS. 5 and 6 show the editing circuit shown in FIG.
FIG. 203 is a circuit diagram showing the details of 203. The editing memories 401 and 402 store the desired
Image editing data for executing image processing
That is, the RAM stores information for performing image processing). MSEL
(Memory select signal) at “H” level
The Q output of the flip-flop 407 becomes high level, and the selector 4
03, 405 is selected on the A side, and the editing memory 401
CCD address from the address generation circuit 206 (main scanning address
). At this time, the selectors 404, 40
6 is B side, edit memory 402 is microcomputer address
Is controlled by In this state, the edit memory 402 stores C
The address bus and data bus of the microcomputer of the PU circuit unit 208
Connected to the microcomputer and the microcomputer can read and write freely
Can be. By the way, the edit memories 401 and 402 are connected to the CCD address.
The address of the edit memories 401 and 402 and the pixels of the CCD 103
The address corresponds. In other words, at memory address 1
Corresponds to the first pixel of the CCD, and the nth
Pixels correspond to the editing memory using a CCD of 5000 pixels
And at least 5000 addresses of memory, for example 8K bytes
(8K bits x 8) is used. Therefore, the m-th
The processing data for processing the pixel is written at address m in the image memory.
To be included. The editing memories 401 and 402 have 8 bits per address.
In the above embodiment, bit 0 is used.
Is "image output prohibition" and bit 1 is "image output prohibition area".
Is black, bit 2 is negative, bit 3 is black
Power, bits 4 and 5 for γ correction level, bit 6 for
"Photo area" is shown in bit 7, and "AE area" is shown in bit 7.
Image editing data is stored. 8 and 9, the editing memory 401 or 402
Set by the U circuit unit 208. Examples of image editing data
explain. Fig. 8 shows the contents of processing on the original ORG, three optional
The operator selects the areas (I), (II), and (III) using the operation unit 209.
And for the image in area (I),
/ Black inversion processing and the second γ correction processing are performed, and the area (I
A third gamma correction process and a photographic process
Run and also white mask for the image in area (III)
It is assumed that the user is instructed to execute the processing. Note that S0 to S8 indicate pixel positions in the main scanning direction. The CPU circuit unit 208 responds to each of the scanning lines according to the above instruction.
An image memory for forming image editing data for an image signal
Set to 401,402. The designated areas (I), (II),
First gamma correction for images in document areas other than (III)
Execute the process. FIGS. 9 (1), (2) and (3) show the scanning shown in FIG. 8, respectively.
Edit memory corresponding to lines (A), (B) and (C)
Shows the image editing data set. That is, the specified area
Image editing for areas other than (I), (II) and (III)
The data is (00000100) and the area (I) is (001010).
00), (00001110) for area (II), and area (II
For (I), (10000000) is the pixel position S in the main scanning direction.
Written to addresses corresponding to 0 to S8. In addition, in FIG.
In order to prevent the drawing from becoming complicated,
Is indicated by the symbol "~". Furthermore, there are two memories, such as edit memories 401 and 402.
MSL exists for each line or multiple lines
(Memory select signal) to “H” and “L”
Edit memory and CCD address access
In order to switch between the editing memory
You. In other words, leave the access to the microcomputer and
The editing information about the contents is written to one editing memory
When reading from the other edit memory that has already been written
Read and use information on bus 409 for CCD image editing
ing. To switch image editing data to new data, use MSEL
By switching the level of
New edit data to the microcontroller
What is necessary is just to switch to the edited memory in which the data has been written. Sand
If the level of MSEL is changed for each line, the maximum is 1
Edit data can be changed for each line. Image editing data
If you do not change, that is, if you do not change the MSEL, always
The same image editing data written in the same editing memory
Used repeatedly. The CPU circuit unit 208 relating to the formation of the above pixel edit data
The operation procedure will be described. FIG. 10 is an external view of the operation unit 209.
Digit for inputting editing conditions and editing coordinates
It consists of an Iser part 162. Coordinate input of digitizer 162
Standard by pressing on the part 150 with the pointing pen 151
The X and Y coordinates from point 166 are transmitted to the CPU circuit 208.
You. 152 to 161 are keys for inputting various editing conditions.
Press these keys with a pointing pen 151.
By doing so, data indicating the corresponding editing conditions
It is transmitted to the road section 208. In addition, image reading other than the original presser 102
The numeric keypad and clear key 17
0, Display 173 for numerical display, Start image reading operation
Instruct the start key 171 and stop the image reading operation.
A stop key 172 as shown is provided. These keys 170-
The information of 172 is also transmitted to the CPU circuit unit 208. FIGS. 11 (A) and (B) and FIGS. 12 (A) and (B)
Micro of the CPU circuit unit 208 related to the formation of image editing data
FIG. 4 is a flowchart showing a computer control procedure.
This procedure uses the built-in memory RO of the microcomputer.
M is written in advance. FIGS. 11 (A) and 11 (B) show the results from the digitizer section 162.
FIG. 6 is a flowchart showing a control procedure regarding input determination.
You. When the keys 152 to 160 of the digitizer section 162 are pressed,
If any edit key is turned on by step 701
The data indicating the editing conditions corresponding to the key that was determined and pressed
The data is stored in the built-in memory RAM of the CPU circuit unit 208. next
On the diagonal of the coordinate input unit 150 with the pointing pen 151
Are pressed (indicating the two corners of the desired rectangular area)
And coordinates (X1, Y1, X2, Y) indicating two points by steps 702 to 705
2) is stored in the memory RAM. Next, the editing conditions of the pressed editing keys 152 to 160 are determined.
Depending on the conditions, Flag1 to Flag9 on the memory RAM
Turn on (steps 706 to 723). That is, the key 152 or the key for instructing trimming of the designated area
If 153 is pressed, step 706 to step 707
Go to, and press the key to make the outside of the trimming area black
If 152, Flag1 is turned on in step 708. Also,
If the key 153 makes the outside of the trimming area white,
At step 709, Flag2 is turned on. In addition, the key 154 or
If 154 is pressed, go to steps 706 and 710.
Proceed to step 711, and if the key 154 is to be masked with black
For example, in step 712, Flag3 is turned on. Also mask on white
Key 155, turn on Flag 4 in step 713.
You. Also, specify that the specified area should be processed in the photo mode.
If the key 156 is to be displayed, the steps 706, 710, and 714 are repeated.
Go to Step 715 and turn on Flag5. In addition, specify that processing outside the designated area is performed in the photo mode.
If the key 157 is shown, the steps 706, 710, 714, 716
Proceed to step 717 to turn on Flag6. Outputs the specified area as a negative image
Step 706, 710, 71
From 4,716,718, proceed to step 719 to turn on Flag7. It is also possible to output outside the designated area as a negative image.
Step 706, 710, 714, 7
From 16,718,720, proceed to step 721 to turn on Flag8. Also, it is supported to output the specified density in the designated area.
Key 160, steps 706,710,714,718,720,722
To 723 and turn on Flag9. As described above, the original input by the operator
Coordinate data representing the desired area and within the desired area or
Indicates the data corresponding to the editing conditions for the outside image
Set in RAM. In addition, on a manuscript,
May be specified, and a different
You can set different types of editing conditions. FIGS. 12A and 12B show that the start key 171 is pressed.
Before the CPU circuit
The coordinate data and editing conditions stored in the memory RAM of the unit 208
After the start key 171 is pressed,
A flowchart showing a control procedure of the CPU circuit unit 208 when reading a document.
FIG. When the start key 171 is pressed, the CPU circuit unit 208
What mode is set in the collection area (memory RAM)
The following processing is performed depending on whether or not. First, initial values, for example, character modes are set in the edit memories 401 and 402.
No trimming, no masking, medium density level
Set the data so that the
9). Then, in steps 750, 751, 752, the current
Scanning position (read line by CCD103)
Whether it corresponds to the area (editing area) specified by
Judge. Steps 753 to 788 indicate which flags are stored in the memory RAM.
Judge whether it is set and edit the version corresponding to the flag.
A bit set indicating the collection condition is stored in the edit memory. Note that steps 753 to 769 perform scanning positions in the designated area.
Before the device reaches and after passing the designated area
And steps 771 to 788 are performed while scanning the designated area.
This is the process to be performed. Now, assume that key 152 is pressed and Flag1 is turned on.
You. When reading a document, go from step 750 to step 757.
No. Therefore, when it is determined in step 753 that Flag1 is on,
Until the scanning position reaches the editing area, the processing of step 754
In the editing memory so that black is output without outputting the image.
Set bit 0 of the entire area to bit 1 and set bit 1 to 1.
You. Next, when the editing area is reached by step 770
If it is determined, the process proceeds from step 771 to step 772,
Only the editing area is output as an image (bit 0 is 0, bit 1 is
1), the area outside the editing area is black (bit 0 is 1, bit 1 is
The editing memory is set as shown in FIG. Then step
If it is determined in step 752 that the user has passed through the editing area, the
And go to step 754 to edit the entire memory so that the image becomes black.
Set bit 0 of the area to 1 and bit 1 to 0. Also, the trimming white key 153 is pressed and Flag2 is turned on.
The editing area by steps 755 and 756
1 to bit 0 in the edit memory so that white is output until
When 0 is set in the cut 1 and the edit area is reached,
Images are output only in the editing area by steps 773 and 774 (Bit
0 for bit 0, 0 for bit 1), otherwise the image is prohibited
And white is output (1 for bit 0, 0 for bit 1)
The editing memory is set. Next, at the end of the editing area
Once again, the image is prohibited again at step 756 and the whole white appears
Bit 0 of the entire edit memory is 1 and bit 1 is
Is set to 0. Also, the masking black key 154 is pressed and Flag3 is turned on.
The editing area is reached by steps 757 and 758
Bit 0 in edit memory so that all images are output until
Is set to 0 and 1 to 1 and the editing area is reached.
In step 775, 776, only the edit area is black
(1 for bit 0, 1 for bit 1), otherwise output image
Editing memory to be powerful (0 for bit 0, 1 for bit 1)
Is set. Next, at the end of the editing area,
Are all output so that bit 0 of the entire edit memory is 0,
Bit 1 is set to 1 (steps 757, 758). Also, the masking white key 155 is pressed and Flag4 is turned on.
The editing area has been reached through steps 759 and 760.
Until it reaches the end of the editing memory so that all images are output
Bit 0 is set to 0, bit 1 is set to 1, and
When it reaches, only the image in the editing area is
The image becomes white (1 for bit 0, 0 for bit 1), and
Outside, image output (0 for bit 0, 1 for bit 1)
Edit memory is set. Next, when the editing area ends
Bit 0 of the entire edit memory is set so that all images are output
0, bit 1 is set to 0 (step 75
9.760). In addition, the photo key 156 in the area is pressed and Flag5 is turned on.
The editing area is reached by steps 761 and 762
Until the editing memory, so that the image is output in character mode
Bit 6 of the whole area is set to 0. And we reach the editing area
If it reaches, the photo processing is performed only in the editing area according to steps 779 and 780.
(1 in bit 6), otherwise it is character processing
The edit memory is set as (0 in bit 6). Next
At the end of the collection area, the entire image is in text mode processing.
Is set to bit 6 of the edit memory so that
761,762). Also, the out-of-area photo key 157 is pressed and Flag6 is turned on.
The editing area is reached by steps 763 and 764
Until you do so, all images will be output in photo mode
Bit 6 of the entire edit memory is set to 1. And
When the editing area is reached Edit according to steps 781 and 782
Only the area is in character mode (bit 6 is 0), otherwise
Saves the editing memory so that it becomes photo processing (1 in bit 6)
Set. Next, when the editing area ends, the entire image is
Bit 6 of the entire edit memory is set to 1 so as to process in true mode.
(Steps 763, 764). Also, the negative key 158 in the area is pressed and Flag7 is turned on.
The editing area is reached by step 765,766
Until you do so, the entire surface is output as a positive image
0 is set in bit 2 of the entire memory area. And edit
If you reach the area, edit the editing area according to steps 783 and 784.
Only the area becomes negative mode (1 for bit 2)
Mode is set to positive mode (bit 2 is 0)
Set memory. Next, at the end of the editing area,
Bits of the entire editing memory so that the entire image becomes a positive image
Set 0 in step 2 (steps 765 and 766). Also, the negative key 159 outside the area is pressed and Flag8 is turned on.
The editing area by steps 767 and 768
Edit so that the entire image is output as a negative image until
Bit 2 of the entire collection memory is set to 1. And edit
When the area is reached, edit the editing data according to steps 785 and 786.
Only the rear is in the positive mode (bit 2 is 0).
Other than that, it becomes negative mode (bit 2 is 1)
Set collection memory. Next, when the editing area ends,
In order to make the entire image a negative image,
Bit 2 is set to 1 (steps 767 and 768). Also, the area density key 160 is pressed and Flag9 is turned on.
If so, reach the editing area by step 769
Up to the density "F5" in the normal first gamma correction processing
0 is set to bits 4 and 5 of the entire edit memory
I do. If you reach the editing area, step 787,
Corresponds to gamma correction processing where only the editing area is specified by 788
Set the bits to bits 4 and 5; otherwise,
Set 0 to 4 and 5. Next comes the end of the editing area
And an editing memory for performing the first γ processing on the entire surface of the image.
0 is set to bits 4 and 5 of the whole area (step 769). As described above, the scan position is
Then, appropriate conditions are set in the edit memory by the CPU circuit unit 208.
Is determined. Next, the image processing according to the image editing data will be described.
I do. The image data subjected to the shading correction is shown in FIG.
It is sent to the trimming block 410. The image of this embodiment
In the image data, "FF" represents black and "00" represents white.
The higher the number, the closer to black. Bits 0 to 6 shown in FIG. 6 correspond to the cells shown in FIG.
Signal sent from the collector 405 or 406.
Data. The trimming block 410 has an OR circuit with the AND circuits 450 and 451.
A set consisting of the path 452 and the inverter 453
8 sets of 8 bit digital image data are provided for each bit
And the other seven sets are omitted. Editing memory 401
Or bit 0 of the image editing memory sent from 402
When “1”, the output of the image signal is performed by the gate 450.
It is prohibited and the information of bit 1 of the editing memory is
Output as data. For this purpose, bit 0
Specify bit 1 for the area where image data is prohibited
Thus, it can be selected as a black or white output. The circuit block 411 has eight OR gates 454 (part 7).
Are omitted in the figure), and the image signal is
The signal can be forced black. The circuit block 412 has eight EX-OR gates 455 (the
7 are omitted), and bit 2 is set to "H".
Then, the image signal is inverted to become a negative image. The γ conversion ROM 413 (for example, MB71) has addresses 0 to
7 receives the image data and uses the image data as an address.
To output a γ-converted signal. In this case, bits 4 and 5
Therefore, four types of gamma conversions stored in the ROM 413 in advance
One can be selected from the conversion table. Bit 6 is stored in buffer 205 as one of the image data.
Sent. Bit 7 (not shown) is a signal indicating the area where AE of the document is to be performed.
AE sun only when bit 7 is “H”
Used as a gate signal for pull information. FIG. 7 shows the buffer 205 and the buffer system in FIG.
FIG. 3 is a diagram illustrating details of a control circuit 207. Buffer 205 enlarges, reduces, and moves the image
Image data synchronized with the CCD reading clock (each CCDCLK).
Data synchronized with the printer synchronization clock (PCLK)
It is to be converted to data. Image memories 506 and 507 have a double buffer memory configuration.
, Each of which can store one line of image data
Noh. In other words, a memory with an 8K bit × 9 configuration
I'm using Next, an example of writing image data to the image memory 506 will be described.
To explain. First, when the address selector 504 selects A, the write
The address of the address counter 502 is input to the image memory 506.
The image data 220 is written to the memory. at the same time,
The address selector 505 of the memory 507 sets the read address
And the selector 509, and the memory 507 is selected.
The output is selected and taken out as image data. Soshi
In the case of the next line, the horizontal synchronization signal (HSYNC)
Thus, switching between read and write is performed, and the reverse of the above is performed.
Perform the operation. In addition, during a write operation, the BRM (binary rate
CCDC by a multiplier, eg SN7497)
By thinning out LK, the write address counter 502
When operated, the image memory 506 or 507 stores
The image data of the place is skipped and stored. Accordingly
Thus, the image data is reduced. Similarly, the read address counter 50 is set by the BRM510.
By thinning out the clock input to 3,
Image data 221 is duplicated and output only at the clock
You. Therefore, image data is expanded according to the degree of thinning.
Great. In this case, the write address counter 502, read address
The start address of the address counter 503 can be set freely by the microcomputer.
However, if both counters are set to the same value,
If you set a different address without moving,
To move the image. Further, the image data 220 includes a one-bit photographic area signal.
8 bits of image and 1 bit of control signal for a total of 9 bits
Cut data from the editing circuit 203 as
The control signal of 1 bit is also sent to the image 205.
It expands and contracts in the same way as. Therefore, after scaling
Also, the control signal and the image correspond one to one. Scaled edit
The received image data and control signal are sent to the recording unit 210.
You. In the recording unit 210, although not shown, each pixel
According to the control signal of the photo character added to the image data,
Change the recording characteristics to match images for text / photo
To form In the above embodiment, only one bit of the control signal is transmitted to the image signal.
Signal is enlarged and reduced with the
The image may be enlarged or reduced together with the image signal. this
Can send various signals corresponding to the image signal
it can. In the above embodiment, the editing is performed corresponding to one CCD pixel.
Although it has a memory, it has a plurality of continuous pixels (for example, 8 pixels).
Pixel) as one block, and edit corresponding to this block
It may have a memory. According to this,
The capacity of the moly can be reduced. However, in this case,
Of the microcomputer becomes faster, but the operation of the microcomputer becomes faster. Further, in this embodiment, input of a trimming area or the like is performed.
It was performed using a digitizer as a force means.
Key and X and Y keys. For example, X (150
"X" when trimming Y (50-100 mm)
Key “150 * 200 *”, “Y” key “50 * 100 *”
In this case, the same thing can be realized by sequentially inputting with the ten keys. Also, voice input is used as other input means such as a trimming area.
It is also possible to use the force
You can also input the voice as it is and use it instead of the numeric keypad
I can do it. Also, as another input means, another micro computer
Input by serial communication the area determined by
It can also be realized by things. Also, as another input means, an IC card or a memory card
CPU reads the data stored in
Can be realized. Also, as a way to use the editing RAM,
Configuration information to be written,
It can also be realized by writing only the data to the memory. This hand
Method saves time writing data to memory
However, the operation becomes complicated. Also, although the capacity of the editing RAM is the same as the number of main scanning pixels,
(In this embodiment, a 5000 pixel CCD is used.
Therefore, 5K pixels of 8K x 8bit memory are used) 2 pixels, 3
A memory corresponding to one bit can be used for pixels,...
In this case, the editing accuracy is deteriorated (for example, one bit for every two pixels).
0.125mm unit for 3 bits, 0.1 for 1 bit per 3 pixels
875mm), but the memory capacity is half, 1/3, etc.
Memory capacity decreases and processing speed increases. Only
However, the same effect as the present invention can be obtained. In this embodiment,
Sets the pixel edit data to 8 bits for each pixel, and
Several editing processes can be executed for each element.
More types of editing processing by increasing the number of
It can also make the type of editing process
If you do n’t need that much, you can reduce the number of bits
You. [Effect] As described above, according to the present invention, the image for one line
Multiple for each pixel of raw data or multiple consecutive pixels
Multi-bit image editing data representing the image processing conditions
Formed for each input of one or more lines of image data
Image editing data forming means for
Multiple images represented by each bit of image editing data
Each pixel of the image data for one line according to the image processing conditions
Or multiple types of image processing for continuous multiple pixels
So that multiple types of image data for each line
Image processing is performed in units of each pixel or continuous multiple pixels.
Can be selectively executed, and the image for two lines
Multiple pixels for each pixel of data or multiple consecutive pixels
Edit data memo that can store image edit data
The image editing data memory has an image for one line.
Multiple for each pixel or continuous multiple pixels of image data
Write the bit image editing data and store it first.
Of each line of image data for one line
Input multi-bit image editing data for multiple pixels.
Each pixel or continuous image data of one line
Read in accordance with the image data of a plurality of pixels
Represented by each bit of multi-bit image editing data
Image data for one line according to the plurality of image processing conditions
Data for each pixel of the data or multiple consecutive pixels.
And perform multiple types of image processing.
Selectively execute multiple types of image processing on data
Large memo to store one page of image editing data
Main scan address for detecting changes in image data and image processing conditions
Hardware, such as a comparator, that always compares the point of change
Increase the change points of multiple image processing conditions without using
It is possible to provide an image processing device that can handle
You.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is an external view of an image processing apparatus, FIG. 2 is a block diagram of the image processing apparatus, FIG. 3 is a view showing a state where a document is placed on a document table, FIG. 5 and 6 are block diagrams showing details of an editing circuit, FIG. 7 is a block diagram showing details of a buffer and a buffer control circuit, and FIG. 8 is a block diagram showing details of a buffer control circuit. 9 shows an example of image editing data in the example shown in FIG. 8, FIG. 10 shows an external view of the operation unit, FIGS. 11 (A), (B) and FIG. Figures 12 (A) and (B) show CPU
FIG. 3 is a flowchart showing a control procedure of the circuit unit, 103 is a CCD, 203 is an editing circuit unit, 208 is a CPU circuit unit, 209 is an operation unit, and 401 and 402 are edit memories.

Claims (1)

(57) [Claims] Image data input means for inputting image data representing each of a plurality of pixels line by line; and a plurality of image processing conditions for each pixel or a plurality of continuous pixels of one line of image data input from the image data input means Image editing data forming means for forming image editing data of a plurality of bits each time one line or a plurality of lines of image data are input from the image data inputting means; Image editing data storage means capable of storing a plurality of bits of image editing data for a plurality of pixels; and each pixel or a plurality of pixels of one line of image data formed by the image editing data forming means in the image editing data storage means. Writing a plurality of bits of image editing data for a pixel; A plurality of bits of image editing data corresponding to each pixel of the one-line image data or a plurality of continuous pixels stored earlier is converted to each pixel of the one-line image data input from the image data input means or a plurality of continuous pixels. Image editing data writing / reading means for reading in correspondence with a plurality of pixels; and a plurality of image processing conditions represented by each bit of the plurality of bits of image editing data read from the image editing data storage means. An image processing apparatus comprising: an image processing unit that performs a plurality of types of image processing on each pixel of one line of image data input from the data input unit or on a plurality of continuous pixels. 2. 2. The image editing data storage unit according to claim 1, wherein the image editing data storage unit includes two memory units capable of storing a plurality of bits of image editing data for each pixel or a plurality of continuous pixels of one line of image data,
The image editing data writing / reading means executes, in parallel, reading of image editing data previously stored in one memory means and writing of new image editing data to the other memory means. Characteristic image processing device. 3. 2. The image processing device according to claim 1, wherein the image processing unit is configured to output each pixel of one line of image data or a continuous image according to a plurality of image processing conditions represented by each bit of the plurality of bits of image editing data. An image processing apparatus comprising: a plurality of conversion units for performing different image conversions on a plurality of pixels.