JP2885588B2 - Motor drive control circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a motor drive control circuit, and more particularly to a means for selectively using one of a plurality of types of FG signals in speed control or the like.

[0002]

2. Description of the Related Art When controlling the speed of a motor, a phase locked loop (PLL) or a speed discriminator is used. When this kind of speed control circuit is used, an FG signal indicating the rotation state of the motor is compared with a reference clock signal, and the driving force of the motor is adjusted based on the comparison result.

As the FG signal, for example, a hole FG obtained by a Hall element and a pattern FG obtained by an FG coil are known. The hole FG is, for example, an FG signal obtained by detecting the angular position of the motor by a Hall element fixed to the stator of the motor, and the pattern FG is formed as a coil pattern on the substrate, for example, fixed to the stator of the motor. This is an FG signal obtained by detecting an alternating magnetic field by the FG coil. The speed control described above can be performed using any of the FG signals, and any one of them can be selectively switched depending on the circuit design.

FIG. 8 shows an example of the configuration of a motor drive IC capable of selectively using the holes FG and the patterns FG. The motor drive IC 1 shown in FIG.
Reference numeral 0 denotes an IC for driving a three-phase motor, which has OUT1 to OUT3 as output terminals to each phase coil of the motor. The respective phase voltages supplied from the output terminals OUT1 to OUT3 to the respective phase coils L1 to L3 of the motor
Generated by The drive circuit 12 includes, for example, output transistors provided one by one corresponding to the output terminals OUT1 to OUT3. The output transistor of each phase receives the supply of the motor power from the motor power supply terminal VCC2, and receives the voltage feedback of the output current via the voltage feedback terminal RF. PGND is a ground terminal for the output transistor of the drive circuit 12.

[0005] Each phase output transistor of the drive circuit 12
It is controlled by a signal supplied from the Hall logic 14. The hall logic 14 has three pairs of hall input terminals I
Signals from the three Hall elements 44 are input via N1 to IN3, the input signals are subjected to predetermined processing, and supplied to the drive circuit 12. Each Hall element 44 is arranged at a predetermined electrical angle on the stator of the motor, and the Hall logic 14 performs a current / voltage conversion on the output signals of these Hall elements, for example, after differential current amplification. It is supplied to the drive circuit 12 as a control signal.

[0006] The IC 10 of this figure further has a speed control circuit 16 configured as a PLL. The speed control circuit 16 compares the phase of the clock signal CLK obtained by dividing the output of the oscillator 18 by the divider circuit 20 with the FG signal supplied via the switch 22, and according to the result of the phase comparison. The driving circuit 12 is controlled. That is, the speed control circuit 16 controls the speed of the motor by controlling the motor driving force of the drive circuit 12 according to the value of the FG signal.

The switch 22 is a circuit for switching the FG signal supplied to the speed control circuit 16 between the hole FG and the pattern FG. Hall FG has three pairs of hall input terminals IN
An FG signal obtained by extracting a signal from any one of 1 to IN3, for example, the hall input terminal IN1 by the hall amplifier 24. The hole FG is supplied to the A terminal of the switch 22 via the hysteresis comparator 26 and the noise filter 28.

On the other hand, a pattern FG is obtained by an FG obtained through an FG amplifier 30 and a hysteresis comparator 32.
Signal. A predetermined reference voltage Vref1 is applied to the non-inverting input terminal of the FG amplifier 30, and the inverting input terminal is connected to the pattern FG input terminal FGIN of the IC 10. The FG coil 40 is connected to the pattern FG input terminal FGIN. More specifically, the FG coil 40 is connected to the pattern FG input terminal FGIN via the coupling capacitor 31 and the input resistor 33, and the pattern FG input terminal FGIN and the pattern FG output terminal FG
A feedback resistor 42 is connected between OUT. Diodes Q1 and Q2 constituting a diode limiter are connected in anti-parallel between the inverting input terminal and the output terminal of the FG amplifier 30, and the output terminal of the FG amplifier 30 is connected to an IC.
It is connected to ten pattern FG output terminals FGOUT. The output of the FG amplifier 30 is supplied to the terminal B of the switch 22 as a pattern FG via the hysteresis comparator 32.

Therefore, if the terminals A and B of the switch 22 are switched and connected to the FG signal input of the speed control circuit 16, it is possible to selectively use the hole FG and the pattern FG as the FG signal which is the basis of the speed control. It is possible. This switching is performed by a signal supplied from the FG signal switching terminal SW of the IC 10 in the configuration of FIG. That is, the user who intends to use the hall FG as the FG signal serving as the basis of the speed control needs the FG switching signal input terminal SW.
, The switch 22 is tilted to the terminal A side, and conversely, a user who intends to use the pattern FG tilts the switch 22 to the terminal B side for use. In addition,
The switch 22 is usually configured as a selector using a logic circuit.

As described above, in the conventional example shown in FIG. 8, a hall FG is used as an FG signal serving as a basis for speed control.
And the pattern FG can be switched and selectively used. Such switching is effective, for example, when the motor is small and cannot form a coil pattern related to the FG coil, or when a so-called sensorless motor having no Hall element is used.

In FIG. 8, VCC1 is a terminal for supplying a power supply voltage to each circuit inside the IC 10, and GND1 is provided.
Is the ground terminal for these circuits.

[0012]

However, in the conventional motor drive control circuit having such a configuration, when switching between the hole FG and the pattern FG, a signal related to the switching must be supplied from the outside. There was a problem that it did not become. This particularly makes the circuit
When it is configured as C, the number of terminals is increased, and thus the IC
This caused a problem of limiting the functions that can be installed on the device.

Further, when the hole FG is used as the FG signal, the circuit relating to the pattern FG, for example, the FG amplifier 30 and the hysteresis comparator 32 are not required in the configuration shown in FIG. However, in the conventional motor drive control circuit, even though the pattern FG is not used, power is consumed by these circuits, and an IC mounting the circuit, and further, a device such as a CD, etc. Power saving.

In order to prevent such a problem, the terminal FGIN may be pulled up. Then, the output of the FG amplifier 30 becomes low. However, a diode limiter is connected to the FG amplifier 30, and the FG amplifier 3
When the output of 0 goes low, a large amount of current flows through the diode Q1 constituting the diode limiter.

An object of the present invention is to solve such a problem .
An object of the present invention is to make it possible to switch between an FG signal and a combined signal from a Hall element without using an increased number of terminals. Another object of the present invention is to reduce power consumption by a circuit relating to an unused FG signal when using a combined signal from a Hall element .

[0016]

In order to achieve such an object, a motor drive control circuit according to the present invention comprises an FG coil
Type with brushless motor and FG coil
Can be connected to a brushless motor of the same type
Motor drive control circuit, comprising a FG coil
If connected to a brushless motor of type
Type brush with no FG coil connected
When a motor is connected, pull it to a specific potential.
FG signal input terminal to be connected and this FG signal input terminal
Amplifier that amplifies and outputs the signal input from
Has a diode connected between the input and output terminals of the amplifier
Input circuit and FG coil supplied via the input circuit
Or multiple signals to detect the rotational phase of the rotor
One of the signals from the Hall element is used as the speed feedback signal
Control means for performing speed feedback control using
Detects a change in the potential of the G signal input terminal and inputs the FG signal.
Certain signals input from the FG coil to the input terminal
Means for comparing and determining whether or not the potential is pulled up;
As a result of the comparison, a signal from the FG coil is input.
Control signal from the input circuit when it is determined that
And is determined to be pulled up to a specific potential.
Control signals from multiple Hall elements
FG signal switching means for supplying to the stage and this FG signal switching means
Stage supplies the composite signal from the Hall element to the control means
Amp-off means for turning off the amplifier of the input circuit when
And the following.

[0017]

In the present invention, the FG signal input terminal from the FG coil is also used as a switching terminal for selectively supplying the FG signal. That is, when the user is supplying FG signal from the FG coil FG signal input terminal, F
The G signal switching means operates to supply a signal from the input circuit to the control means based on the result of the comparison determination of the potential of the FG signal input terminal. In this state, the control means controls the motor based on the FG signal. On the contrary, the user FG signal
When the potential of the input terminal is pulled up to a specific potential ,
FG signal switching means, based on the comparison result of the determination of the potential of F G signal input terminal, and supplies the combined signal from the Hall element to the control means. In this state, the control means is a Hall element
The motor is controlled by the combined signal from the controller. Therefore, in the present invention, the FG signal from the FG coil (in the embodiment,
Is a pattern FG) and a composite signal from a Hall element.
A signal (referred to as a hole FG in the embodiment) is selectively used for controlling the motor.

Also, in the present invention, the Hall element
When combined signal is supplied to the control unit, the amplifier is turned off by the FG signal switching means. This amplifier is FG
A circuit for amplifying a FG signal from the signal input terminal, Ho
This is an unnecessary circuit when controlling the motor based on the combined signal from the rule element . In the present invention, by turning off such a circuit, power consumption when using the combined signal from the Hall element is suppressed. Also, no current flows through the diode connected between the input and output terminals of the amplifier.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings. The same components as those in the conventional example shown in FIG.

FIG. 1 shows the internal configuration of a motor drive IC 34 according to a first embodiment of the present invention. The IC 34 shown in this figure is a conventional FG signal switching terminal SW
FG input terminal F
A comparator 36 for comparing the potential of GIN with a predetermined reference voltage is provided. The pattern FG input terminal FGIN is connected to the non-inverting input terminal of the comparator 36, and a predetermined reference voltage Vref2 is applied to the inverting input terminal. This voltage Vref2 is set to be much higher than the reference voltage Vref1 for the FG amplifier 38. The output of the comparator 36 is supplied to the FG amplifier 38 and the switch 22 as an FG signal switching signal FGSW. That is, in this embodiment, the switch 22 is switched by the output of the comparator 36 instead of the signal supplied through the dedicated terminal. In other words, the pattern FG input terminal FGIN has the function of the conventional FG signal switching terminal FGSW. Further, unlike the FG amplifier 30 in the conventional example, the FG amplifier 38 is turned on / off by the output of the comparator 36.
It is configured so that it can be turned off.

FIG. 2 shows the manner of use and operation of this embodiment. In particular, FIG. 2A shows the case where the pattern FG is used as the FG signal, and FIG. 2B shows the case where the hole FG is used.

First, when using the pattern FG,
As shown in FIG. 2A, the pattern FG input terminal FG
The FG coil 40 is connected to IN via the coupling capacitor 31 and the input resistor 33, and the resistor 42 is connected between the pattern FG output terminal FGOUT and the pattern FG input terminal FGIN. At this time, the voltage Vref2 becomes the voltage Vr
Since ef1 is set to be very high, the output of the comparator 36 is always the L value in the connection state shown in FIG. When the output of the comparator 36 has the L value, the FG amplifier 38 is turned on, and the switch 22 is tilted to the B side. Therefore, in this state, the pattern FG obtained by the FG coil 40, the FG amplifier 38, and the hysteresis comparator 32 is used as the FG signal in the speed control circuit 16.

Conversely, when the hole FG is used, the pattern FG input terminal FGIN is pulled up to a voltage higher than the voltage Vref2, for example, a power supply voltage. Then, the output of the comparator 36 changes to the H value, and accordingly, the FG amplifier 38 is turned off and the switch 22 is tilted to the A side. Therefore, in this state, the Hall amplifier 24, which is obtained by the Hall element 44 connected to the Hall input terminal IN1,
Hysteresis comparator 26 and noise filter 28
The hole FG supplied to the switch 22 through is used as an FG signal in the speed control circuit 16. Also, no current flows through the diode Q1.

As described above, the first feature of the present embodiment is that, by using the pattern FG input terminal FGIN by pulling it up, the switching of the switch 22 can be performed without providing the IC 34 with a terminal for switching the switch 22. It is in the point which made possible. The second feature is that the FG amplifier 38, which is unnecessary when using the hole FG, is turned off to reduce power consumption.

Next, means for realizing these features will be described more specifically. FIG. 3 shows an example configuration of the switch 22. As shown in this figure, the switch 22 can be configured as a selector using a logic circuit.

That is, the pattern FG and the hole FG
Are AND5 via inverters 46 and 48, respectively.
Input to 0 or 52. The FG signal switching signal FGSW output from the comparator 36 is supplied to another input terminal of the AND 52 via the inverter 54 and to the inverter 54.
And 56 to the other input terminals of the AND 50 respectively. Therefore, the FG signal switching signal FGSW becomes H
When the value is a value, the inverted value of the pattern FG is output from the AND 50, and when the value is the L value, the inverted value of the hole FG is output from the AND 52. The outputs of AND50 and 52 are connected to AND6 via inverters 58 and 60, respectively.
2 has been entered. Therefore, the FG signal switching signal FGS
When W is at the H value, the pattern FG is output from the AND 62. Conversely, when W is at the L value, the hole FG is ANDed.
62. The output of the AND 62 is supplied to the speed control circuit 16 as an FG signal.

By using the switch 22 having such a configuration, it is possible to selectively supply the pattern FG and the hole FG to the speed control circuit 16. In this embodiment, this switching is performed using the output of the comparator 36, and the FG amplifier 38 is turned off when the hall FG is used. Thereby, the power consumption of the IC 34 is reduced. FIG. 4 shows an example of the configuration of the FG amplifier 38 capable of reducing the power consumption.

As shown in this figure, the FG amplifier 38
Is a differential amplifier 6 having the potential of the pattern FG input terminal FGIN as one input and the voltage Vref1 as the other input.
4 built-in. The output of differential amplifier 64 is applied to the base of transistor Q3 and to the collector of transistor Q4 via capacitor C1. The transistors Q3, Q5 and Q4 are transistors for driving the output transistors Q6 and Q7 of the FG amplifier 38. The output transistors Q6 and Q7 operate in a push-pull manner, and an amplified pattern FG is extracted from a connection point between the resistors R1 and R2 connected between the emitters.

When the pattern FG input terminal FGIN is pulled up, that is, when the output of the comparator 36 becomes H level, the base potential of the transistor Q4 becomes low, so that the transistor Q8 connected to the base side of the output transistor Q6. No more current flows from Q4 to Q4. Then, a bias is applied to the output transistor Q6 and a current flows, and conversely, the transistor Q7 does not flow a current. However, since the connection point between the resistors R1 and R2 is connected to the pull-up pattern FG input terminal FGIN via the diode Q1, no current flows through the resistors R1 and R2. That is, no current flows through the resistors R1 and R2, which are elements that consume power in the FG amplifier 38. Thereby, in the present embodiment, I
The power consumption of C34 is reduced.

As described above, according to the present embodiment, the IC 34
Pattern FG without using an FG signal switching terminal
And the holes FG are selectively supplied to the speed control circuit 16, so that additional functions can be mounted on the IC 34, and the IC 34 with higher functionality is realized. Furthermore, since the FG amplifier 38 related to the pattern FG is turned off when the hole FG is used as the FG signal, the power consumption is reduced, and the power consumption of a device equipped with the IC 34, such as a CD, is reduced. Can be realized. In addition, a current is prevented from flowing through the diode Q1.

FIG. 5 shows the internal structure of a motor drive IC 66 according to a second embodiment of the present invention. The IC 66 shown in FIG.
In addition to the above, a configuration for turning off the hysteresis comparator 68 is provided. That is, the pattern FG input terminal FGI
When the potential of N exceeds the voltage Vref2, a hysteresis comparator 68 connected downstream of the FG amplifier 38
Are also turned off, and the power consumption is smaller than in the first embodiment.

FIG. 6 shows the usage and operation of this embodiment. In particular, FIG. 6A shows the case where the pattern FG is used, and FIG. 6B shows the case where the hole FG is used. As shown in these figures, the present embodiment is similar to the first embodiment.
It is used in the same manner as the embodiment. Furthermore, its operation is
This is the same as the first embodiment except that the hysteresis comparator 68 is turned on / off according to the output of the comparator 36. The hysteresis comparator 68 is turned on together with the FG amplifier 38 when using the pattern FG, and is turned off together with the FG amplifier 38 when using the hole FG.

Next, the characteristic structure of this embodiment will be described more specifically. Switch 2 in this embodiment
The configuration 2 can be substantially the same as the configuration in the first embodiment, and the FG amplifier 38 is turned on / off.
The same means can be used for turning off. Therefore, hereinafter, means for turning on / off the hysteresis comparator 68 by the output of the comparator 36 will be described. FIG. 7 shows a partial circuit configuration of the comparator 36 and the hysteresis comparator 68 in this embodiment. As shown in this figure,
The comparator 36 generates a voltage Vref2 by dividing the power supply voltage applied between the terminal Vcc1 and GND by the resistors R3 and R4. The voltage Vref2 and the potential of the pattern FG input terminal FGIN are input to the comparator body 70, and the output thereof is supplied to the current mirror circuit 7.
2 to the transistor Q9. The transistor Q9 is a transistor that controls the transistors Q10 and Q11. The collector potential of the transistor Q10 is supplied to the FG amplifier 38 as an FG signal switching signal FGSW, and the collector potential of the transistor Q11 is similarly supplied to the switch 22 as an FG signal switching signal FGSW.

Here, the current for driving the comparator body 70 is determined by the current flowing through the input side transistor of the current mirror circuit 74, that is, the current supplied from the transistor Q12 to the current mirror circuit 74. Further, the transistors Q9 to Q11 include the transistor Q1.
Current is supplied from 3. Transistors Q12 and Q1
The base of 3 is connected to a constant current circuit including transistors Q14 to Q18.

The base of the transistor Q19 of the hysteresis comparator 68 is connected to the transistors Q20 to Q20.
22, Q17 and Q18.

In this figure, as means for turning off the hysteresis comparator 68, a transistor Q23
Is used. The collector of the transistor Q23 is connected to the base of the transistor Q22, and the base is connected to the collector of the transistor Q9 via a resistor. Therefore, when the base potentials of the transistors Q10 and Q11 are at the H value, the transistors Q2
Since the operation of the constant current circuit 73 is stopped by the operation of 3, the transistor Q19 is turned off, and the current supply to the differential amplifier 74 forming the Schmitt circuit is cut off. In this way, power consumption in the hysteresis comparator 68 when using the hall FG is cut off.

As described above, according to the present embodiment, the hole F
Since the hysteresis comparator 68 in the subsequent stage is turned off in addition to the FG amplifier 38 when G is used, an IC 66 with lower power consumption than in the first embodiment can be obtained.

In each of the above embodiments, the hole FG is selected by pulling up the terminal FGIN.
This can be modified to a configuration selected by pull-down.
In that case, for example, the transistor Q6 in FIG.
The terminal FGIN may be turned off by pull-down.

[0039]

As described above, according to the present invention,
According to the result of the comparison determination of the potential of the first FG signal input terminal,
A signal supplied to the control means is a first FG signal and a second FG signal.
Signal, the user sets whether to supply the first FG signal to the first FG signal input terminal or to fix the potential of the first FG signal, without providing an FG signal switching terminal. The first FG signal and the second FG signal can be selectively used for controlling the motor.
As a result, even when the circuit is realized as an IC, more functions can be mounted on the IC even under the limited number of terminals.

Also, according to the present invention, at least the amplifier of the first FG signal is turned off when the second FG signal is supplied to the control signal, so that the diode connected between the input and output terminals of the amplifier is turned off. It is possible to suppress power consumption when using the second FG signal without generating a current flowing through the second FG signal.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an internal configuration of a motor drive IC according to a first embodiment of the present invention.

2A and 2B are diagrams showing a use mode and an operation of the embodiment. FIG. 2A particularly shows a state when a pattern FG is used.
(B) is a figure which shows each at the time of use of the hall FG.

FIG. 3 is a circuit diagram showing an example of a specific configuration of a switch in this embodiment.

FIG. 4 is a circuit diagram of an FG amplifier for describing a method of reducing power consumption of the FG amplifier according to the embodiment.

FIG. 5 is a block diagram showing an internal configuration of a motor drive IC according to a second embodiment of the present invention.

6A and 6B are diagrams showing a use mode and an operation of the embodiment, and FIG. 6A particularly shows a case where a pattern FG is used;
(B) is a diagram showing when the hall FG is used.

FIG. 7 is a circuit diagram of a comparator and a hysteresis comparator for explaining a method of reducing the power consumption of the pattern FG-side hysteresis comparator in this embodiment.

FIG. 8 is a block diagram showing an internal configuration of a motor IC according to one conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 12 Drive circuit 14 Hall logic 16 Speed control circuit 18 Oscillator 20 Divider circuit 22 Switch 24 Hall amplifier 26, 32, 68 Hysteresis comparator 34, 66 Motor drive IC 36 Comparator 38 FG amplifier OUT1-OUT3 Output terminal to motor IN1-IN3 Hall input terminal FGIN Pattern FG input terminal FGOUT Pattern FG output terminal Q! , Q ”Diodes that constitute a diode limiter

Continuing on the front page (72) Inventor Hiromitsu Nakano 1006 Kadoma Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (72) Inventor Toshiki Tsubouchi 1006 Kazuma Kadoma, Kazuma, Osaka Prefecture Inside Matsushita Electric Industrial Co., Ltd. 58) Field surveyed (Int.Cl. ⁶ , DB name) H02P 6/16

Claims (1)

(57) [Claims] 1. A brushless type having an FG coil
Brushless motor without motor and FG coil
Motor drive control circuit that can be connected to
Connected to a brushless motor of the type having an FG coil
The FG coil is connected and the FG coil is
If a non-type brushless motor is connected
Is an FG signal input terminal that is pulled up to a specific potential
When, out and amplifies the signal input from the FG signal input terminal
Connected between the input and output terminals of the amplifier
An input circuit having a diode, and a signal from an FG coil supplied through the input circuit;
Or multiple Hall elements that detect the rotation phase of the rotor?
Using one of these signals as the speed feedback signal,
Control means for performing feedback control; detecting a change state of the potential of the FG signal input terminal;
Identification that the signal from the FG coil is input to the input terminal
Means to judge whether it is pulled up to the potential of
As a result of this comparison , a signal from the FG coil is input.
Control signal from the input circuit when it is determined that
And is determined to be pulled up to a specific potential.
Control signals from multiple Hall elements
A FG signal switching means for supplying to the stage, the FG signal switching means, the composite signal from the Hall element
Turn off the amplifier of the input circuit when supplying to the control means.
Motor drive control circuit comprising a Anpuofu means, for.