JP2885576B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device relating to coordinates of a semiconductor chip on a wafer and a wafer map.

[0002]

2. Description of the Related Art A wafer map of a semiconductor chip of a conventional semiconductor device will be described.
By writing the coordinates in the state to the memory address and reading the memory address of the semiconductor non-volatile memory device after assembly and sealing, the in-wafer coordinates could be known (for example, see JP-A-3-20060).

This conventional example will be further described with reference to FIG. FIG. 2 is a detailed view of a conventional semiconductor device. FIG. 2A shows a wafer map 1 and a wafer 2, and FIG. Semiconductor chips 3
FIG. 4 is a diagram showing a semiconductor device 7 schematically showing an enlarged view of FIG.

In a conventional example, as shown in FIGS. 2A and 2B, a MOS in which information on the position of a semiconductor device 7 in a wafer 2 in a wafer state is incorporated in each semiconductor device chip 3.
Type nonvolatile memory. Then, after passing through the assembly and sealing step, the position information and the like in the wafer-2 are read from the MOS nonvolatile memory incorporated in the semiconductor device 7.

[0005] By this reading, in the semiconductor device 7 having the built-in and sealed MOS type nonvolatile memory, the coordinates in the wafer-2 when the semiconductor device 7 is in the wafer state can be known. In this way, the semiconductor device after assembly and sealing is evaluated in detail, whereby the quality of the semiconductor device can be improved.

[0006]

In the above-mentioned conventional semiconductor device equipped with a semiconductor nonvolatile memory, a MOS nonvolatile memory in which positional information and the like in a wafer state of the semiconductor device in a wafer state is built in each semiconductor device chip. In addition, it has the drawback that it is complicated and that a semiconductor nonvolatile memory must be mounted without fail. Further, in a semiconductor device having no semiconductor non-volatile memory, there is a problem that it is not possible to write position information and the like in a wafer state of the semiconductor device in a wafer state.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances and provides a semiconductor device which solves the above-mentioned drawbacks and problems and is simple and capable of knowing coordinates in a wafer in a wafer state without mounting a semiconductor nonvolatile memory. The purpose is to provide.

[0008]

According to the present invention, there is provided a semiconductor device comprising an X, Y position of each semiconductor chip on a wafer.
According to the coordinates, in the X and Y directions in each of the semiconductor chips ,
The arranged pad portions, wherein each semiconductor switch on the wafer
The present invention is characterized in that markings indicating the X- and Y- coordinate positions of the tips are applied, thereby providing the above-described semiconductor device.

[0009] That is, the present invention relates to " each semiconductor on a wafer.
X position of the body tip, corresponding to the Y coordinate, X in said respective semiconductor chips, the pad portion arranged in the Y direction, the on wafers of each semiconductor chip X, a marking indicating the Y-coordinate position A semiconductor device characterized by being hit. ”.

[0010]

Next, an embodiment of the present invention will be described with reference to FIG. FIG. 1 is a detailed view of a semiconductor device showing one embodiment of the present invention. FIG. 1A shows a wafer map 1 and a wafer-2, and FIG. FIG. 2A is an enlarged schematic view of one semiconductor chip 3 in FIG. [C] is a diagram in which a part of [B] is further enlarged.

The numbers in parentheses in the wafer map in FIG. 1A indicate the X and Y coordinates. Usually, the X and Y coordinates can be obtained by probe inspection in the wafer inspection process.

In accordance with the X and Y coordinates, a laser beam from an inker (laser launcher 6), which is a defective inking device, is used.
After performing the defective inking using the sinker device, a part of the pad 4 (see FIG. 1B) arranged regularly in the X and Y directions on the semiconductor chip 3 is slightly longer than usual. Keep it. Then, the X, Y coordinates obtained by the above-described probe inspection are directed to the pad 4 where the mark of the hit point (laser mark 5) is easily put on the mark where the laser was received. Enter a dot (Laser Mark 5).

For example, in this embodiment, X = 4, Y = 2
The laser mark 5 (FIG. 1) is provided on the fourth pad in the X direction from the lower left to the right in the X direction and the second pad in the Y direction from the lower left to the upper side in the coordinates [B],
(See [C]), the laser emitting device 6 of the inker device, which is a defective inking device for probe inspection, puts a hit point (laser mark 5). Thus, the X and Y coordinates of the semiconductor chip 3 in the wafer state can be determined.

The semiconductor chip other than the semiconductor chip 3 also has a pad portion of the laser
(Laser mark 5) can be provided so that the X and Y coordinates of the semiconductor chip in the wafer state can be recognized as exactly the same as the X and Y coordinates in the probe inspection.

[0015]

According to the present invention, as described in detail above, a portion of a pad regularly arranged in the X and Y directions in a semiconductor chip is provided with a laser according to a wafer map coordinate obtained in a probe inspection process. The semiconductor device is characterized in that a mark is applied, and thus it is not necessary to mount a semiconductor nonvolatile memory in a semiconductor device, and an effect that can be easily realized is obtained. As a result, the coordinates of the wafer state of the semiconductor chip can be known, and the effect that the quality of the semiconductor device can be improved by performing detailed evaluation of the semiconductor device occurs.

[Brief description of the drawings]

FIG. 1 is a detailed view of a semiconductor device showing one embodiment of the present invention, wherein [A] is a wafer map and a wafer map;
[B] is a diagram schematically showing one semiconductor chip in [A] on an enlarged scale, and [C] is a diagram further enlarged on a part of [B].

FIG. 2 is a detailed view of a semiconductor device showing a conventional example, in which [A] shows a wafer map and a wafer,
[B] is a diagram schematically showing an enlarged one semiconductor chip in [A].

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Wafer map 2 Wafer 3 Semiconductor chip 4 Pad 5 Laser mark 6 Laser launch device 7 Semiconductor device

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H01L 21/66 H01L 21/02

Claims (1)

(57) [Claims] [Claim 1] X position of the semiconductor chip on the wafer, corresponding to the Y coordinate, X in said respective semiconductor chips, Y
The pad portion arranged in a direction, each half on the wafer
A semiconductor device characterized by forming markings indicating the X and Y coordinate positions of a conductive chip .