JP2880855B2 - Bias power supply circuit for semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bias power supply circuit for a semiconductor device, and more particularly to a bias power supply circuit used for measuring electrical characteristics of a transistor.

[0002]

2. Description of the Related Art As shown in FIG. 4, a conventional bias power supply circuit for a semiconductor device includes a transistor 1 for performing measurement.
And a feedback circuit 24 that adjusts the gate voltage 22 by the operational amplifiers 9 and 11 so that the drain current 8 becomes constant at a value determined by the voltage 13 set by the drain current setting reference power supply 12.

A drain current 8 supplied from a drain bias power supply 5 passes through a drain current detecting resistor 7 and
The current flows from the drain electrode 3 of the transistor 1 to the source electrode 4. The drain current 8 is converted to a voltage 10 by the drain current detection resistor 7 and the operational amplifier 9, and the operational amplifier 11 compares the voltage 10 with the output voltage 13 of the drain current setting reference power supply 12.

The result of comparison between the voltage 10 and the voltage 13 by the operational amplifier 11 is that the gate electrode 2 of the field-effect transistor 1
Is applied as a gate voltage 22.

[0005] The output of the operational amplifier 11 rises when the voltage 10 is lower than the voltage 13 and falls when the voltage 10 is higher than the voltage 13.

The gate of the field effect transistor 1
The relationship between the source-to-source voltage 22 and the drain current 8 is as shown in the characteristic of FIG.
The state where no current flows is called a cutoff state, and the voltage of the gate-source voltage 22 at that time is called a cutoff voltage.

As described above, the result of comparison between the voltage 10 obtained by converting the drain current 8 and the drain current setting voltage 13 is fed back to the gate electrode 2 of the field-effect transistor 1, so that the drain current 8 becomes It converges to the value set by the voltage 13.

[0008]

In the circuit of the prior art, when the switch 6 is turned off to replace the transistor 1, the drain current 8 stops flowing.
The output voltage 10 of the operational amplifier 9 becomes 0 volt. Since the voltage 10 is lower than the voltage 13 in the operational amplifier 11, the output voltage of the operational amplifier 11, that is, the gate voltage 22 increases, and the overcurrent flows because the gate 2 and the source 4 are in the forward direction. There is a disadvantage that the transistor 1 is destroyed.

Further, as shown in FIG. 5A, the higher the voltage of the gate electrode 2 is, the more the current flowing from the drain electrode 3 to the source electrode 4 is increased.

When the switch 6 is turned on, the gate voltage 22 is at a positive potential, so that a whisker-like overcurrent flows as shown in FIG. There was a drawback to do it.

In order to alleviate these problems, a method has been adopted in which a switch is also attached to the gate circuit and linked with the switch 6, but the fundamental solution could not be solved.

An object of the present invention is to provide a bias power supply circuit for a semiconductor device which solves the above-mentioned problems and prevents a transistor from being destroyed by an overcurrent.

[0013]

Configuration of the present invention SUMMARY OF THE INVENTION, as the drain or source current of the transistor is constant, the bias power supply circuit the gate voltage is automatically adjusted, the drain current measurement value and the drain current setting reference voltage
A circuit that feeds back the value obtained by comparing the value to the gate, a circuit that applies a voltage at which the transistor cuts off to the gate ,
A switch for switching between the two circuits and an integrating circuit between the switch and a gate are provided.

[0014]

FIG. 1 shows the configuration of a bias power supply circuit for measuring a semiconductor device according to one embodiment of the present invention. FIG. 2 shows the connection state of the transistor 1 to the circuit, the switching order of the switches 6 and 17, and The relationship between the change of the gate voltage 22, the drain voltage 23 and the change of the drain current 8 is shown by a waveform.

A drain electrode 3 of the transistor 1 has a drain current 8 supplied from a drain bias power supply 5.
Is applied via the switch 6 and the drain current detection resistor 7. The drain current 8 is converted into a voltage 10 by a drain current detection resistor 7 and an operational amplifier 9, and is compared with an output voltage 13 of a drain current setting reference power supply 12 by an operational amplifier 11.

The switch 17 switches between the output of the operational amplifier 11, the output of the power supply 15 in which the voltage 12 at which the transistor 1 is cut off and the voltage 12 is set, and the ground potential. By the integration circuit 19, the switch 1
7, the voltage change speed when the circuit is switched is limited,
The current is amplified by the operational amplifier 21 and fed back to the gate electrode 2 of the transistor 1 as a gate voltage 22.

In the above configuration, the switch 6 is turned off, the switch 17 is switched to the contact A side, and the transistor 1 is mounted and removed with the drain voltage 23 and the gate voltage 22 both at 0V.

When a bias is applied to the transistor 1, the switch 17 is switched to the contact B side, and a gate voltage at which the transistor 1 is cut off is applied.
Is turned on to apply the drain voltage 23, thereby preventing the drain current 8 from flowing. At this time, since the voltage drop of the current detection resistor 7 is 0 V, the output voltage 10 of the operational amplifier 9 is also 0 volt. As a result of the comparison with the voltage 18 by the operational amplifier 11, the voltage 14 is saturated with the operational amplifier 11. To a positive potential. Next, the switch 17 is switched to the contact C side in order to flow a constant drain current, and the feedback circuit 24 is formed. At this time, the output voltage of the switch 17 greatly changes from a negative voltage to a positive voltage, but the rate of change of the voltage is limited by the integration circuit 19, and the voltage 20 is
Slowly increases from negative voltage to positive voltage. The voltage 20 is subjected to current amplification by the operational amplifier 24, and the transistor 1
To the gate electrode 2. As the voltage 20 increases from the negative voltage to the positive voltage, the gate voltage 22 also increases, so that the drain current 8 starts flowing.

The drain current 8 is supplied to operational amplifiers 9, 11,
The gate voltage 22 is fed back by the feedback circuit 24 including the switch 17, the integration circuit 19, and the operational amplifier 21, and the voltage 10 and the voltage 13 converge to the same drain current 8.

When the transistor 1 is to be removed, the switch 17 is first switched to the contact B side, and the output voltage 20 of the integrating circuit 19 is lowered until it becomes the output voltage 16 of the power supply 15.
At this time, the voltage amplified by the operational amplifier 21, that is, the gate voltage 22 also decreases, so that the drain current 8
And the drain current 8 stops flowing when the gate voltage 22 becomes the cutoff voltage.

Here, the switch is turned off, and after the drain voltage 23 is reduced to 0 volt, the switch 17 is set to the contact A
And the gate voltage is set to 0 volt, and the transistor 1
Remove from circuit.

In the above process, the drain current 8 of the transistor 1 does not flow more than the current set by the power supply 12, and the gate voltage 22 only changes between the voltage set by the power supply 21 and 0V. Therefore, no voltage is applied in the forward direction, and no overcurrent flows through the gate electrode 2.

FIG. 3 shows the configuration of a bias power supply for a semiconductor device according to another embodiment of the present invention.

In FIG. 3, the present embodiment has a configuration in which the drain current 8 is measured on the source electrode 4 side.

In this embodiment, since the current flowing from the gate electrode 2 to the source electrode 4 is very small due to the characteristics of the field effect transistor, the operational amplifier 21 is omitted, and the drain current 8 is measured on the source electrode 4 side. By doing so, one end of the current detection resistor 7 can be grounded, so that the operational amplifier 9 is omitted.

Although the embodiment of FIG. 1 has been described with reference to an N-channel field effect transistor, the polarity of the power supplies 5, 12, and 15 is reversed as in the embodiment of FIG. The present invention can also be applied to a P-channel type electric field transistor.

In the embodiments shown in FIGS. 1 and 3, the description has been made with the depletion type field effect transistor shown by the characteristic of FIG. 5A. However, a plurality of terminals including the enhancement type field effect transistor and the bipolar transistor are used. The present invention is applicable as long as the current flowing through the element can be controlled by the other terminal or the current.

[0028]

As described above, according to the present invention, when a bias is applied to or cut off from a transistor to be measured, a gate voltage at which the transistor to be measured is cut off is applied, and when switching to a feedback circuit is performed. Is limited, the overcurrent does not flow between the gate and the source and between the drain and the source, so that the breakdown of the transistor can be prevented.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a bias power supply circuit for a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a timing waveform chart in the embodiment shown in FIG.

FIG. 3 is a configuration diagram of a bias power supply circuit for a semiconductor device according to another embodiment of the present invention.

FIG. 4 is a configuration diagram of a conventional bias power supply circuit for a semiconductor device.

FIG. 5 is a voltage-current characteristic diagram of a transistor.

FIG. 6 is a voltage-current waveform diagram according to FIG. 4;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Transistor 2 Gate electrode 3 Drain electrode 4 Source electrode 5 Drain bias power supply 6, 17 Switch 7 Drain current detection resistor 8 Drain current 9, 11, 21 Operational amplifier 10 Drain current voltage conversion output 12 Drain current setting reference power supply 13 Power supply 12 Output voltage 14 of the operational amplifier 11 15 transistor cutoff voltage setting power supply 16 output voltage of the power supply 15 18 output voltage of the switch 17 19 integration circuit 20 output voltage of the integration circuit 19 22 gate voltage 23 drain voltage 24 feedback circuit

Claims (1)

(57) [Claims] 1. A as the drain or source current of the transistor is constant, the bias power supply circuit the gate voltage is automatically adjusted, the drain current measurement value and the drain
A circuit for feeding back a value obtained by comparing the reference voltage value for emission current setting to the gate, a voltage at which the transistor is cut off gate
A circuit for applying to preparative, a switch for switching the two circuits of the semiconductor device for bias power supply circuit, characterized in that it comprises an integrator circuit between the switch and gate.