JP2876601B2 - Synchronization detection device for digital disk playback device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a synchronization detecting device of a digital disk reproducing device for reproducing a digital signal recorded on a disk.

2. Description of the Related Art In recent years, digital discs have become widespread, centering on compact discs for consumer use. In a compact disk, it is necessary to generate a bit clock of the signal from the signal read from the disk for the recording format, and a synchronization detecting means is indispensable.

Hereinafter, an example of the synchronization detecting device of the above-described conventional digital disk reproducing device will be described with reference to the drawings.

FIG. 3 shows a block diagram of a synchronization detecting means of the conventional digital disk reproducing apparatus. In FIG.
1 is a disk on which a digital signal is recorded, 2 is a spindle motor for rotating the disk at a predetermined speed, 3 is a pickup for reading a signal recorded on the disk, 4 is a waveform shaping for converting the output of the pickup 3 to a digital signal. , 5 is a voltage controlled oscillator for generating a bit synchronous clock of the digital signal output from the waveform shaper 4, 6 is the phase of the digital signal output from the waveform shaper 4 and the voltage controlled oscillator 5
Is a phase comparator that compares the phase of the output with the bit synchronization clock and outputs the phase error, 7 is a filter amplifier that amplifies and filters the output of the phase comparator 6, and 8 is a signal processing circuit.

The operation of the synchronization detecting means of the digital disk reproducing device configured as described above will be described below.

The disk 1 is rotated by a spindle motor 2, and signals recorded on tracks of the disk 1 are continuously read by a pickup 3. Pickup 3
Is usually an analog waveform having a small amplitude, and is input to the waveform shaper 4 and shaped into a digital signal.

Voltage controlled oscillator 5, phase comparator 6, and filter amplifier 7
Constitutes a PLL circuit. The digital signal output from the waveform shaper 4 and the bit synchronization clock output from the voltage controlled oscillator 5 are input to the phase comparator 6, and the phase error output signal is input to the filter amplifier 7. Filter amplifier 7
The amplified and filtered error signal is fed back to the voltage controlled oscillator 5, and the phase synchronization between the digital signal output from the waveform shaper 4 and the bit synchronization clock output from the voltage controlled oscillator 5 is achieved.

The output of the voltage controlled oscillator 5 is output to the signal processing circuit 8 together with the digital signal output from the waveform shaper 4 or the digital signal output from the waveform shaper 4 cut out by the bit synchronous clock output from the voltage controlled oscillator 5. Sent to

In the above configuration, when the phase of the digital signal output from the waveform shaper 4 and the bit synchronization clock output from the voltage controlled oscillator 5 are not synchronized, the oscillation frequency of the voltage controlled oscillator 5 It oscillates at a certain frequency (hereinafter referred to as a free-run frequency) determined by the characteristics of the constituent elements and the offset between the phase comparator 6 and the filter amplifier 7. This free-run frequency generally has a large variation, and the pull-in operation to the phase-locked state is performed only near the free-run frequency, which greatly affects the pull-in characteristic of the PLL. In order to reduce the variation of the free-run frequency and settle it around a predetermined frequency, a synchronization detecting means of a digital disk reproducing apparatus configured as shown in FIG. 4 has been devised.

4, reference numerals 1 to 8 denote the same constituent elements as those in FIG. 3, and are represented by the same numbers. Reference numeral 9 denotes a reference clock generator for generating a clock having a reference frequency.
Is a frequency comparator that compares the frequency of the bit synchronous clock output from the voltage controlled oscillator 5 with the frequency of the reference clock output from the reference clock generator 9 and outputs a frequency error signal.

The components 1 to 8 in FIG. 4 operate exactly the same as the basic configuration in FIG. 3, and the frequency comparator 10 operates in addition to the operation in FIG. Normally, the frequency of the clock and the frequency of the reference clock output from the reference clock generator 9 are compared with each other by dividing them by an appropriate frequency division ratio, and a frequency error signal is output. The frequency error signal output from the frequency comparator 10 is added to and superimposed on the phase error signal output from the phase comparator 6, input to the filter amplifier 7, and the output of the filter amplifier 7 becomes the control voltage of the voltage controlled oscillator 5. Added frequency comparator 10
Is controlled so that the free-run frequency of the voltage controlled oscillator 5 is settled around a predetermined frequency.

Problems to be Solved by the Invention Since the pull-in operation of the PLL is performed only in the vicinity of the free-run frequency, the configuration shown in FIG. 4 is more quickly set to a predetermined frequency than the configuration shown in FIG. This is improved in terms of pulling in and preventing false locking in other frequencies that have a simple integer ratio relationship with a given frequency.

In the normal phase synchronization state, the oscillation frequency of the voltage controlled oscillator 5 is considered to be a predetermined value, no frequency error output is output from the frequency comparator 10, and the operation of the frequency comparator 10 is turned ON / O.
FF does not affect the operation of the entire PLL. However, when the rotational speed of the disk changes due to some disturbance and the data rate of the digital signal output from the waveform shaper 4 deviates from a predetermined value, in order to maintain the phase-synchronous state, the voltage-controlled oscillator 5 has a predetermined frequency. It is necessary to oscillate at a frequency shifted from the frequency comparator 10 and the phase comparator 6 attempts to oscillate the voltage controlled oscillator 5 at the shifted frequency.
Still attempts to oscillate the voltage controlled oscillator 5 at a predetermined frequency. In other words, while the phase comparator 6 works in a direction to maintain the phase synchronization state,
The frequency comparator 10 acts in a direction that hinders its operation. That is, the frequency comparator 10 works in a direction to narrow a range in which the phase can stay in the phase-locked state (hereinafter, referred to as a lock range), which means that the synchronization stability of the PLL is deteriorated.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and provides a synchronization detection device for a high-performance digital disk playback device that achieves both a pull-in characteristic of a PLL and synchronization stability.

Means for Solving the Problems In order to solve the above problems, a synchronization detecting device of a digital disk reproducing device of the present invention comprises: a rotation speed discriminator for detecting that a rotation speed of a disk is within a predetermined range; A voltage-controlled oscillator for generating a bit-synchronous clock of the signal read from the disk, and comparing the phase of the signal read from the disk with the phase of the bit-synchronous clock of the output of the voltage-controlled oscillator, and outputting the phase error. A phase comparator for comparing the frequency of a predetermined reference clock with the oscillation frequency of the voltage-controlled oscillator and outputting a frequency error, wherein the rotation speed discriminator determines that the rotation speed of the disk is within a predetermined range. When the output indicating that the disk is within the range is output, the output is turned ON, and the rotation speed discriminator indicates that the rotation speed of the disk is not within a predetermined range. A frequency comparator for turning off the output when outputting, a filter amplifier for adding and amplifying and filtering the output of the phase comparator and the output of the frequency comparator to generate a control voltage of the voltage controlled oscillator And a configuration including:

With the above-described configuration, the synchronization detecting device of the digital disk reproducing apparatus of the present invention operates the frequency comparator at the time of phase synchronization pull-in to quickly perform the pull-in operation near a predetermined frequency, and prevents pseudo lock, If the disk rotation speed deviates from the specified value due to some disturbance after the synchronization pull-in and the phase synchronization is likely to be lost, the effect of stopping the operation of the frequency comparator and expanding the lock range to improve the synchronization stability. It has.

Embodiment A synchronization detecting device of a digital disk reproducing device according to an embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of a synchronization detecting means of a digital disk reproducing apparatus according to one embodiment of the present invention. 1 to 10 in FIG. 1 are the same components as those in FIG. 4, and are represented by the same numbers. Reference numeral 11 in FIG. 1 denotes a rotation speed discriminator for detecting that the rotation speed of the disk is within a predetermined range.

The operation of the synchronization detecting device of the digital disk reproducing device configured as described above will be described below.

First, the pull-in operation to the phase synchronization state will be described. When not in phase synchronization, the disk 1 is controlled by a rotation speed control circuit (not shown) so as to rotate around a predetermined rotation speed that is within the determination range of the rotation speed discriminator 11. The rotational speed discriminator 11 detects that the rotational speed of the disk is within a predetermined range and operates the frequency comparator 10, and the voltage controlled oscillator 5 oscillates around a predetermined frequency and has a waveform near the predetermined frequency. The digital signal output from the shaper 4 and the bit synchronous clock output from the voltage controlled oscillator 5 are pulled into a phase synchronous state.

Next, the operation in the phase synchronization state will be described. In the normal phase synchronization state, the oscillation frequency of the voltage controlled oscillator 5 is considered to be a predetermined value, that is, it is considered that it matches the data rate in the format of the signal recorded on the disk 1, and the frequency comparator 10 Does not output a frequency error, and ON / OFF of the operation of the frequency comparator 10 does not affect the operation of the entire PLL. However, when the rotational speed of the disk changes due to some disturbance and the data rate of the digital signal output from the waveform shaper 4 deviates from the data rate in the format, the voltage controlled oscillator 5 is required to maintain the phase synchronization state. It is necessary to oscillate at a frequency deviating from the frequency of the phase comparator 6, and the phase comparator 6 attempts to oscillate the voltage controlled oscillator 5 at the deviated frequency.
If the frequency comparator 10 is not operated, the frequency comparator 10 still tries to oscillate the voltage-controlled oscillator 5 at a predetermined frequency, so that the lock range is narrowed. Therefore, when the rotation number discriminator 11 detects that the rotation number of the disk has deviated from the predetermined range, the operation of the frequency comparator 10 is stopped in response to the signal. This eliminates the effect of preventing the phase comparator 6 from trying to maintain the phase-locked state, and widens the lock range.

FIG. 2 schematically shows this state. FIG. 2A shows a frequency range (hereinafter, referred to as a capture range) in which the phase can be pulled into the phase synchronization state.
FIG. 2 (b) shows the lock range during operation of the frequency comparator 10, and FIG. 2 (c) shows the lock range during stoppage of the frequency comparator 10. Capture range, exist in almost vertically symmetrical to the center of the free-running frequency f _f to lock range both, lock range is wider than the capture range.
Also, comparing FIG. 2 (b) and FIG. 2 (c),
FIG. 3C shows that the lock range is widened because the frequency comparator 10 is stopped.

Effect of the Invention As described above, in addition to the conventional configuration, the synchronization detecting device of the digital disk reproducing device of the present invention has a frequency comparator having a function of turning on and off the operation, and the rotational speed discriminator has the function of disc rotation. When the output indicates that the rotation speed is within the predetermined range, the output of the frequency comparator is turned ON, and the rotation speed discriminator outputs an output indicating that the rotation speed of the disk is not within the predetermined range. The frequency comparator output is OFF
By performing the above control, the two factors of the pull-in characteristic and the synchronization stability of the PLL can be achieved at the same time, and it is possible to realize a synchronization detection unit of a high-performance digital disk reproducing device.

[Brief description of the drawings]

FIG. 1 is a block diagram of a synchronization detecting means of a digital disk reproducing apparatus according to one embodiment of the present invention, and FIG. 2 is a capture range and lock of the synchronous detecting means of the digital disk reproducing apparatus according to one embodiment of the present invention. FIG. 3 is a block diagram of a first example of the synchronization detecting means of the conventional digital disk reproducing apparatus, and FIG. 4 is a block diagram of a second example of the synchronous detecting means of the conventional digital disk reproducing apparatus. It is a block diagram. 1 ... Digital disk, 2 ... Spindle motor, 3
...... pickup, 4 ... waveform shaper, 5 ... voltage controlled oscillator, 6 ... phase comparator, 7 ... filter amplifier, 8
…… Signal processing circuit, 9 …… Reference clock generator, 10 ……
Frequency comparator, 11 ... Rotation speed discriminator.

Continued on the front page (72) Inventor Akihiko Nishioka 1006 Kadoma, Kazuma, Osaka Prefecture Inside Matsushita Electric Industrial Co., Ltd. (56) References JP-A-63-26030 (JP, A) JP-A-58-220225 (JP) , A) JP-A-62-97428 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) G11B 20/10-20/14

Claims (1)

(57) [Claims] 1. A digital disk reproducing apparatus for reading a digital signal recorded on a concentric circular or spiral track on a disk, comprising: a rotation number discriminator for detecting that the rotation number of the disk is within a predetermined range; A voltage-controlled oscillator for generating a bit-synchronous clock of the signal read from the disk; and comparing the phase of the signal read from the disk with the phase of the bit-synchronized clock of the output of the voltage-controlled oscillator to determine the phase error. And a frequency comparator for comparing the frequency of a predetermined reference clock with the oscillation frequency of the voltage-controlled oscillator, and outputting a frequency error thereof. When an output indicating that the output is within a predetermined range is output, the output is turned ON, and the rotation speed discriminator is used to rotate the disk. A frequency comparator that turns off the output when an output indicating that the output is not within a predetermined range, and an addition amplification filtering of the output of the phase comparator and the output of the frequency comparator, and the voltage A synchronous detection device for a digital disk reproducing device, comprising: a filter amplifier that generates a control voltage of a control oscillator.